datbuffer size adjust

boards/uniboard2/designs/unb2_test/quartus/qsys_unb2_test.qsys

@@ -250,7 +250,7 @@
    {
       datum baseAddress
       {
-         value = "65536";
+         value = "5242880";
          type = "String";
       }
    }
@@ -266,7 +266,7 @@
    {
       datum baseAddress
       {
-         value = "5308416";
+         value = "5767168";
          type = "String";
       }
    }
@@ -282,7 +282,7 @@
    {
       datum baseAddress
       {
-         value = "5242880";
+         value = "65536";
          type = "String";
       }
    }
@@ -742,7 +742,7 @@
  <parameter name="hideFromIPCatalog" value="false" />
  <parameter name="lockedInterfaceDefinition" value="" />
  <parameter name="maxAdditionalLatency" value="1" />
- <parameter name="projectName" value="unb2_test_ddr.qpf" />
+ <parameter name="projectName" value="" />
  <parameter name="sopcBorderPoints" value="false" />
  <parameter name="systemHash" value="0" />
  <parameter name="testBenchDutName" value="" />
@@ -2120,7 +2120,7 @@
   <parameter name="dataAddrWidth" value="23" />
   <parameter name="dataMasterHighPerformanceAddrWidth" value="1" />
   <parameter name="dataMasterHighPerformanceMapParam" value="" />
-  <parameter name="dataSlaveMapParam"><![CDATA[<address-map><slave name='pio_system_info.mem' start='0x0' end='0x80' /><slave name='reg_diag_rx_seq_10gbe.mem' start='0x80' end='0x100' /><slave name='reg_diag_data_buffer_10gbe.mem' start='0x100' end='0x180' /><slave name='reg_diag_data_buffer_ddr.mem' start='0x180' end='0x200' /><slave name='reg_diag_data_buffer_1gbe.mem' start='0x200' end='0x280' /><slave name='avs_eth_1.mms_reg' start='0x280' end='0x2C0' /><slave name='avs_eth_0.mms_reg' start='0x2C0' end='0x300' /><slave name='reg_diag_tx_seq_10gbe.mem' start='0x300' end='0x340' /><slave name='reg_bsn_monitor_1GbE.mem' start='0x340' end='0x380' /><slave name='timer_0.s1' start='0x380' end='0x3A0' /><slave name='reg_diag_rx_seq_ddr.mem' start='0x3A0' end='0x3C0' /><slave name='reg_diag_rx_seq_1gbe.mem' start='0x3C0' end='0x3E0' /><slave name='reg_diag_bg_10gbe.mem' start='0x3E0' end='0x400' /><slave name='reg_diag_bg_1gbe.mem' start='0x400' end='0x420' /><slave name='reg_epcs.mem' start='0x420' end='0x440' /><slave name='reg_remu.mem' start='0x440' end='0x460' /><slave name='reg_unb_sens.mem' start='0x460' end='0x480' /><slave name='pio_wdi.s1' start='0x480' end='0x490' /><slave name='reg_diag_tx_seq_ddr.mem' start='0x490' end='0x4A0' /><slave name='reg_diag_tx_seq_1gbe.mem' start='0x4A0' end='0x4B0' /><slave name='reg_mmdp_data.mem' start='0x4B0' end='0x4B8' /><slave name='reg_mmdp_ctrl.mem' start='0x4B8' end='0x4C0' /><slave name='reg_dpmm_data.mem' start='0x4C0' end='0x4C8' /><slave name='reg_dpmm_ctrl.mem' start='0x4C8' end='0x4D0' /><slave name='pio_pps.mem' start='0x4D0' end='0x4D8' /><slave name='jtag_uart_0.avalon_jtag_slave' start='0x4D8' end='0x4E0' /><slave name='rom_system_info.mem' start='0x1000' end='0x2000' /><slave name='avs_eth_1.mms_tse' start='0x2000' end='0x3000' /><slave name='reg_wdi.mem' start='0x3000' end='0x3008' /><slave name='cpu_0.debug_mem_slave' start='0x3800' end='0x4000' /><slave name='reg_bsn_monitor_10GbE.mem' start='0x4000' end='0x6000' /><slave name='avs_eth_0.mms_tse' start='0x6000' end='0x7000' /><slave name='avs_eth_1.mms_ram' start='0x7000' end='0x8000' /><slave name='avs_eth_0.mms_ram' start='0x8000' end='0x9000' /><slave name='ram_diag_bg_1gbe.mem' start='0x9000' end='0xA000' /><slave name='ram_diag_data_buffer_10gbe.mem' start='0x10000' end='0x20000' /><slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' /><slave name='reg_io_ddr.mem' start='0x40000' end='0x80000' /><slave name='ram_diag_bg_10gbe.mem' start='0x80000' end='0x100000' /><slave name='reg_tr_10GbE_back1.mem' start='0x100000' end='0x200000' /><slave name='reg_tr_10GbE_qsfp_ring.mem' start='0x200000' end='0x400000' /><slave name='reg_tr_10GbE_back0.mem' start='0x400000' end='0x500000' /><slave name='ram_diag_data_buffer_ddr.mem' start='0x500000' end='0x510000' /><slave name='ram_diag_data_buffer_1gbe.mem' start='0x510000' end='0x520000' /></address-map>]]></parameter>
+  <parameter name="dataSlaveMapParam"><![CDATA[<address-map><slave name='pio_system_info.mem' start='0x0' end='0x80' /><slave name='reg_diag_rx_seq_10gbe.mem' start='0x80' end='0x100' /><slave name='reg_diag_data_buffer_10gbe.mem' start='0x100' end='0x180' /><slave name='reg_diag_data_buffer_ddr.mem' start='0x180' end='0x200' /><slave name='reg_diag_data_buffer_1gbe.mem' start='0x200' end='0x280' /><slave name='avs_eth_1.mms_reg' start='0x280' end='0x2C0' /><slave name='avs_eth_0.mms_reg' start='0x2C0' end='0x300' /><slave name='reg_diag_tx_seq_10gbe.mem' start='0x300' end='0x340' /><slave name='reg_bsn_monitor_1GbE.mem' start='0x340' end='0x380' /><slave name='timer_0.s1' start='0x380' end='0x3A0' /><slave name='reg_diag_rx_seq_ddr.mem' start='0x3A0' end='0x3C0' /><slave name='reg_diag_rx_seq_1gbe.mem' start='0x3C0' end='0x3E0' /><slave name='reg_diag_bg_10gbe.mem' start='0x3E0' end='0x400' /><slave name='reg_diag_bg_1gbe.mem' start='0x400' end='0x420' /><slave name='reg_epcs.mem' start='0x420' end='0x440' /><slave name='reg_remu.mem' start='0x440' end='0x460' /><slave name='reg_unb_sens.mem' start='0x460' end='0x480' /><slave name='pio_wdi.s1' start='0x480' end='0x490' /><slave name='reg_diag_tx_seq_ddr.mem' start='0x490' end='0x4A0' /><slave name='reg_diag_tx_seq_1gbe.mem' start='0x4A0' end='0x4B0' /><slave name='reg_mmdp_data.mem' start='0x4B0' end='0x4B8' /><slave name='reg_mmdp_ctrl.mem' start='0x4B8' end='0x4C0' /><slave name='reg_dpmm_data.mem' start='0x4C0' end='0x4C8' /><slave name='reg_dpmm_ctrl.mem' start='0x4C8' end='0x4D0' /><slave name='pio_pps.mem' start='0x4D0' end='0x4D8' /><slave name='jtag_uart_0.avalon_jtag_slave' start='0x4D8' end='0x4E0' /><slave name='rom_system_info.mem' start='0x1000' end='0x2000' /><slave name='avs_eth_1.mms_tse' start='0x2000' end='0x3000' /><slave name='reg_wdi.mem' start='0x3000' end='0x3008' /><slave name='cpu_0.debug_mem_slave' start='0x3800' end='0x4000' /><slave name='reg_bsn_monitor_10GbE.mem' start='0x4000' end='0x6000' /><slave name='avs_eth_0.mms_tse' start='0x6000' end='0x7000' /><slave name='avs_eth_1.mms_ram' start='0x7000' end='0x8000' /><slave name='avs_eth_0.mms_ram' start='0x8000' end='0x9000' /><slave name='ram_diag_bg_1gbe.mem' start='0x9000' end='0xA000' /><slave name='ram_diag_data_buffer_ddr.mem' start='0x10000' end='0x20000' /><slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' /><slave name='reg_io_ddr.mem' start='0x40000' end='0x80000' /><slave name='ram_diag_bg_10gbe.mem' start='0x80000' end='0x100000' /><slave name='reg_tr_10GbE_back1.mem' start='0x100000' end='0x200000' /><slave name='reg_tr_10GbE_qsfp_ring.mem' start='0x200000' end='0x400000' /><slave name='reg_tr_10GbE_back0.mem' start='0x400000' end='0x500000' /><slave name='ram_diag_data_buffer_10gbe.mem' start='0x500000' end='0x580000' /><slave name='ram_diag_data_buffer_1gbe.mem' start='0x580000' end='0x590000' /></address-map>]]></parameter>
   <parameter name="data_master_high_performance_paddr_base" value="0" />
   <parameter name="data_master_high_performance_paddr_size" value="0" />
   <parameter name="data_master_paddr_base" value="0" />
@@ -2372,7 +2372,7 @@
    version="1.0"
    enabled="1">
   <parameter name="AUTO_SYSTEM_CLOCK_RATE" value="125000000" />
-  <parameter name="g_adr_w" value="14" />
+  <parameter name="g_adr_w" value="17" />
   <parameter name="g_dat_w" value="32" />
  </module>
  <module
@@ -2749,7 +2749,7 @@
    start="cpu_0.data_master"
    end="ram_diag_data_buffer_1gbe.mem">
   <parameter name="arbitrationPriority" value="1" />
-  <parameter name="baseAddress" value="0x00510000" />
+  <parameter name="baseAddress" value="0x00580000" />
   <parameter name="defaultConnection" value="false" />
  </connection>
  <connection
@@ -2803,7 +2803,7 @@
    start="cpu_0.data_master"
    end="ram_diag_data_buffer_ddr.mem">
   <parameter name="arbitrationPriority" value="1" />
-  <parameter name="baseAddress" value="0x00500000" />
+  <parameter name="baseAddress" value="0x00010000" />
   <parameter name="defaultConnection" value="false" />
  </connection>
  <connection
@@ -2839,7 +2839,7 @@
    start="cpu_0.data_master"
    end="ram_diag_data_buffer_10gbe.mem">
   <parameter name="arbitrationPriority" value="1" />
-  <parameter name="baseAddress" value="0x00010000" />
+  <parameter name="baseAddress" value="0x00500000" />
   <parameter name="defaultConnection" value="false" />
  </connection>
  <connection

boards/uniboard2/designs/unb2_test/src/vhdl/mmm_unb2_test.vhd

@@ -202,6 +202,9 @@ ARCHITECTURE str OF mmm_unb2_test IS
   -- Block generator
   CONSTANT c_ram_diag_bg_1GbE_addr_w               : NATURAL := ceil_log2(g_nof_streams_1GbE  * pow2(ceil_log2(g_bg_block_size)));
   CONSTANT c_ram_diag_bg_10GbE_addr_w              : NATURAL := ceil_log2(g_nof_streams_10GbE * pow2(ceil_log2(g_bg_block_size)));
+  CONSTANT c_ram_diag_databuffer_10GbE_addr_w      : NATURAL := ceil_log2(g_nof_streams_10GbE * pow2(ceil_log2(g_bg_block_size)));
+  CONSTANT c_ram_diag_databuffer_1GbE_addr_w       : NATURAL := ceil_log2(g_nof_streams_1GbE  * pow2(ceil_log2(g_bg_block_size)));
+  CONSTANT c_ram_diag_databuffer_ddr_addr_w        : NATURAL := ceil_log2(1                   * pow2(ceil_log2(g_bg_block_size)));
 
   -- dp_offload
 --  CONSTANT c_reg_dp_offload_tx_adr_w                     : NATURAL := 1; -- Dev note: add to c_unb2_board_peripherals_mm_reg_default
@@ -617,7 +620,7 @@ BEGIN
 
       ram_diag_data_buffer_1gbe_clk_export       => OPEN,
       ram_diag_data_buffer_1gbe_reset_export     => OPEN,
-      ram_diag_data_buffer_1gbe_address_export   => ram_diag_data_buf_1gbe_mosi.address(c_unb2_board_peripherals_mm_reg_default.ram_diag_db_adr_w-1 DOWNTO 0),
+      ram_diag_data_buffer_1gbe_address_export   => ram_diag_data_buf_1gbe_mosi.address(c_ram_diag_databuffer_1GbE_addr_w-1 DOWNTO 0),
       ram_diag_data_buffer_1gbe_write_export     => ram_diag_data_buf_1gbe_mosi.wr,
       ram_diag_data_buffer_1gbe_writedata_export => ram_diag_data_buf_1gbe_mosi.wrdata(c_word_w-1 DOWNTO 0),
       ram_diag_data_buffer_1gbe_read_export      => ram_diag_data_buf_1gbe_mosi.rd,
@@ -625,7 +628,7 @@ BEGIN
 
       ram_diag_data_buffer_10gbe_clk_export       => OPEN,
       ram_diag_data_buffer_10gbe_reset_export     => OPEN,
-      ram_diag_data_buffer_10gbe_address_export   => ram_diag_data_buf_10gbe_mosi.address(c_unb2_board_peripherals_mm_reg_default.ram_diag_db_adr_w-1 DOWNTO 0),
+      ram_diag_data_buffer_10gbe_address_export   => ram_diag_data_buf_10gbe_mosi.address(c_ram_diag_databuffer_10GbE_addr_w-1 DOWNTO 0),
       ram_diag_data_buffer_10gbe_write_export     => ram_diag_data_buf_10gbe_mosi.wr,
       ram_diag_data_buffer_10gbe_writedata_export => ram_diag_data_buf_10gbe_mosi.wrdata(c_word_w-1 DOWNTO 0),
       ram_diag_data_buffer_10gbe_read_export      => ram_diag_data_buf_10gbe_mosi.rd,
@@ -689,7 +692,7 @@ BEGIN
 
       ram_diag_data_buffer_ddr_clk_export        => OPEN,
       ram_diag_data_buffer_ddr_reset_export      => OPEN,
-      ram_diag_data_buffer_ddr_address_export    => ram_diag_data_buf_ddr_mosi.address(c_unb2_board_peripherals_mm_reg_default.ram_diag_db_adr_w-1 DOWNTO 0),
+      ram_diag_data_buffer_ddr_address_export    => ram_diag_data_buf_ddr_mosi.address(c_ram_diag_databuffer_ddr_addr_w-1 DOWNTO 0),
       ram_diag_data_buffer_ddr_write_export      => ram_diag_data_buf_ddr_mosi.wr,
       ram_diag_data_buffer_ddr_writedata_export  => ram_diag_data_buf_ddr_mosi.wrdata(c_word_w-1 DOWNTO 0),
       ram_diag_data_buffer_ddr_read_export       => ram_diag_data_buf_ddr_mosi.rd,