Resolve L2SDP-291
10 unresolved threads
10 unresolved threads
Closes L2SDP-291
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requested review from @kooistra
assigned to @walle
234 238 reg_nw_10GbE_eth10g_mosi : OUT t_mem_mosi; 235 239 reg_nw_10GbE_eth10g_miso : IN t_mem_miso; 236 240 241 -- XST bsn aligner_v2 242 reg_bsn_align_copi : OUT t_mem_mosi; 243 reg_bsn_align_cipo : IN t_mem_miso; 244 245 -- XST bsn aligner_v2 bsn monitors 246 reg_input_monitor_copi : OUT t_mem_mosi; -
Better rename reg_input_monitor_copi into e.g.
reg_bsn_align_input_monitor_copi, of misschien reg_bsn_monitor_v2_bsn_align_input_copi.and similar later on:
"REG_INPUT_MONITOR" --> "REG_BSN_ALIGN_INPUT_MONITOR" "REG_OUTPUT_MONITOR" --> "REG_BSN_ALIGN_OUTPUT_MONITOR"Edited by Eric Kooistra changed this line in version 2 of the diff
37 37 - { name: c_W_beamlet, value: 8 } 38 38 - { name: c_stat_data_sz, value: 2 } 39 39 - { name: c_nof_clk_per_pps, value: c_f_adc_MHz * 10**6 } # = 200000000 40 - { name: c_nof_rx_monitors, value: 16 } # per lane 41 - { name: c_nof_tx_monitors, value: 16 } # per lane 42 - { name: c_nof_err_counts, value: 8 } # per lane 43 - { name: c_nof_mac, value: 3 } # 1 TX/RX for RING0 + 1 TX/RX for RING1 + 1 TX/RX for QSFP0 changed this line in version 2 of the diff
253 265 mm_port_names: 254 266 - REG_STAT_HDR_DAT_XST 255 267 268 - peripheral_name: dp/dp_bsn_sync_scheduler 269 peripheral_group: xsub 270 mm_port_names: 271 - REG_BSN_ALIGN 272 273 - peripheral_name: dp/dp_bsn_monitor_v2 274 peripheral_group: bsn_align_input 275 parameter_overrides: 276 - { name: g_nof_streams, value: c_P_sq } 277 mm_port_names: 278 - REG_INPUT_MONITOR changed this line in version 2 of the diff
308 parameter_overrides: 309 - { name: g_nof_streams, value: c_nof_tx_monitors } 310 mm_port_names: 311 - REG_BSN_MONITOR_V2_RING_TX_XST 312 313 - peripheral_name: dp/dp_block_validate_err 314 parameter_overrides: 315 - { name: g_nof_err_counts, value: c_nof_err_counts } 316 mm_port_names: 317 - REG_DP_BLOCK_VALIDATE_ERR__XST 318 319 - peripheral_name: dp/dp_block_validate_bsn_at_sync 320 mm_port_names: 321 - REG_DP_BLOCK_VALIDATE_BSN_AT_SYNC_XST 322 323 - peripheral_name: tr_10GbE/tr_10GbE_unb2legacy changed this line in version 2 of the diff
367 SIGNAL reg_bsn_monitor_v2_ring_rx_xst_copi : t_mem_mosi; 368 SIGNAL reg_bsn_monitor_v2_ring_rx_xst_cipo : t_mem_miso; 369 370 -- XST ring bsn monitor tx 371 SIGNAL reg_bsn_monitor_v2_ring_tx_xst_copi : t_mem_mosi; 372 SIGNAL reg_bsn_monitor_v2_ring_tx_xst_cipo : t_mem_miso; 373 374 -- XST ring validate err 375 SIGNAL reg_dp_block_validate_err_xst_copi : t_mem_mosi; 376 SIGNAL reg_dp_block_validate_err_xst_cipo : t_mem_miso; 377 378 -- XST ring bsn at sync 379 SIGNAL reg_dp_block_validate_bsn_at_sync_xst_copi : t_mem_mosi; 380 SIGNAL reg_dp_block_validate_bsn_at_sync_xst_cipo : t_mem_miso; 381 382 -- XST ring MAC changed this line in version 2 of the diff
57 reg_bsn_sync_scheduler_xsub_mosi : IN t_mem_mosi := c_mem_mosi_rst; 58 reg_bsn_sync_scheduler_xsub_miso : OUT t_mem_miso; 59 reg_crosslets_info_mosi : IN t_mem_mosi := c_mem_mosi_rst; 60 reg_crosslets_info_miso : OUT t_mem_miso; 61 reg_nof_crosslets_mosi : IN t_mem_mosi := c_mem_mosi_rst; 62 reg_nof_crosslets_miso : OUT t_mem_miso; 63 ram_st_xsq_mosi : IN t_mem_mosi := c_mem_mosi_rst; 64 ram_st_xsq_miso : OUT t_mem_miso; 65 reg_stat_enable_mosi : IN t_mem_mosi := c_mem_mosi_rst; 66 reg_stat_enable_miso : OUT t_mem_miso; 67 reg_stat_hdr_dat_mosi : IN t_mem_mosi := c_mem_mosi_rst; 68 reg_stat_hdr_dat_miso : OUT t_mem_miso; 69 70 sdp_info : IN t_sdp_info; 71 gn_id : IN STD_LOGIC_VECTOR(c_sdp_W_gn_id-1 DOWNTO 0); 58 reg_bsn_sync_scheduler_xsub_copi : IN t_mem_copi := c_mem_copi_rst; changed this line in version 2 of the diff
177 gen_dp_to_mm : FOR I IN 0 TO g_P_sq-1 GENERATE 178 u_st_xsq_dp_to_mm : ENTITY st_lib.st_xsq_dp_to_mm 250 u_mmp_dp_bsn_align_v2 : ENTITY dp_lib.mmp_dp_bsn_align_v2 179 251 GENERIC MAP( 180 g_nof_crosslets => c_sdp_N_crosslets_max, 181 g_nof_signal_inputs => c_sdp_S_pn, 182 g_dsp_data_w => c_sdp_W_crosslet 252 -- for dp_bsn_align_v2 253 g_nof_streams => g_P_sq, 254 g_bsn_latency_max => 2, 255 g_nof_aligners_max => c_sdp_N_pn_max, 256 g_block_size => c_block_size, 257 g_data_w => c_data_w, 258 g_use_mm_output => TRUE, 259 -- for mms_dp_bsn_monitor_v2 260 g_nof_clk_per_sync => c_sdp_N_clk_per_sync, -
wordt gebruikt als timeout in bsn_mointor, moet daarom denk ik iets groter zijn. Ik heb daar eerder mee gezeten. Je kan niet doen c_sdp_N_clk_per_sync * 10 / 9 want * 10 is groter dan 32 bit, daarom deed ik c_sdp_N_clk_per_sync + c_sdp_N_clk_per_sync/10; Misschien moeten we in sdp_pkg.vhd doen:
c_sdp_sync_timeout := c_sdp_N_clk_per_sync + c_sdp_N_clk_per_sync / 10;
changed this line in version 2 of the diff
307 406 crosslets_info => crosslets_info 308 407 ); 309 408 409 --------------------------------------------------------------- 410 -- BSN Monitoir for XST UDP offload changed this line in version 2 of the diff
111 111 CONSTANT c_sdp_W_bf_weight_magnitude : NATURAL := c_sdp_W_bf_weight - c_sdp_W_bf_weight_fraction - 1; -- = 1 112 112 113 113 -- Derived constants 114 CONSTANT c_sdp_FS_adc : NATURAL := 2**(c_sdp_W_adc - 1); -- full scale FS corresponds to amplitude 1.0 115 CONSTANT c_sdp_N_clk_per_sync : NATURAL := c_sdp_f_adc_MHz*10**6; -- Default 200M clock cycles per second 116 CONSTANT c_sdp_N_sync_jesd : NATURAL := c_sdp_S_pn * c_sdp_N_sync_rcu / c_sdp_S_rcu; -- = 4, nof JESD IP sync outputs per PN 117 CONSTANT c_sdp_P_pfb : NATURAL := c_sdp_S_pn / c_sdp_Q_fft; 118 CONSTANT c_sdp_T_adc : TIME := (10**6 / c_sdp_f_adc_MHz) * 1 ps; 119 CONSTANT c_sdp_T_sub : TIME := c_sdp_N_fft * c_sdp_T_adc; 120 CONSTANT c_sdp_W_bf_product : NATURAL := c_sdp_W_subband + c_sdp_W_bf_weight -1; 121 CONSTANT c_sdp_X_sq : NATURAL := c_sdp_S_pn * c_sdp_S_pn; 122 CONSTANT c_sdp_block_period : NATURAL := c_sdp_N_fft * 1000 / c_sdp_f_adc_MHz; -- = 5120 [ns] 114 CONSTANT c_sdp_FS_adc : NATURAL := 2**(c_sdp_W_adc - 1); -- full scale FS corresponds to amplitude 1.0 115 CONSTANT c_sdp_N_clk_per_sync : NATURAL := c_sdp_f_adc_MHz*10**6; -- Default 200M clock cycles per second 116 CONSTANT c_sdp_N_clk_sync_timeout : NATURAL := c_sdp_f_adc_MHz*10**6 + c_sdp_f_adc_MHz*10**5; -- 10% margin. - libraries/base/ring/src/vhdl/ring_mux.vhd 0 → 100644
12 -- 13 -- Unless required by applicable law or agreed to in writing, software 14 -- distributed under the License is distributed on an "AS IS" BASIS, 15 -- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 16 -- See the License for the specific language governing permissions and 17 -- limitations under the License. 18 -- 19 ------------------------------------------------------------------------------- 20 21 ------------------------------------------------------------------------------- 22 -- 23 -- Author: R. van der Walle 24 25 -- Purpose: Implement the function of ring_mux. 26 -- Description: See https://support.astron.nl/confluence/x/jyu7Ag 27 mentioned in commit 4f789fbf
unassigned @walle
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