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Commit 09cc1ed7 authored by Reinier van der Walle's avatar Reinier van der Walle
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integerated bf remote and ring in lofar2_unb2c_sdp_station

parent 647a60da
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1 merge request!220Resolve L2SDP-175
Pipeline #26418 passed
Stage: simulation
Stage: synthesis
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with 766 additions and 333 deletions
applications/lofar2/designs/lofar2_unb2c_sdp_station/src/vhdl/lofar2_unb2c_sdp_station.vhd
+ 85
− 24
View file @ 09cc1ed7
......@@ -307,6 +307,16 @@ ARCHITECTURE str OF lofar2_unb2c_sdp_station IS
SIGNAL ram_bf_weights_copi : t_mem_copi := c_mem_copi_rst;
SIGNAL ram_bf_weights_cipo : t_mem_cipo := c_mem_cipo_rst;
-- BF bsn aligner_v2
SIGNAL reg_bsn_align_v2_bf_copi : t_mem_copi := c_mem_copi_rst;
SIGNAL reg_bsn_align_v2_bf_cipo : t_mem_cipo := c_mem_cipo_rst;
-- BF bsn aligner_v2 bsn monitors
SIGNAL reg_bsn_monitor_v2_rx_align_bf_copi : t_mem_copi := c_mem_copi_rst;
SIGNAL reg_bsn_monitor_v2_rx_align_bf_cipo : t_mem_cipo := c_mem_cipo_rst;
SIGNAL reg_bsn_monitor_v2_aligned_bf_copi : t_mem_copi := c_mem_copi_rst;
SIGNAL reg_bsn_monitor_v2_aligned_bf_cipo : t_mem_cipo := c_mem_cipo_rst;
-- mms_dp_scale Scale Beamlets
SIGNAL reg_bf_scale_copi : t_mem_copi := c_mem_copi_rst;
SIGNAL reg_bf_scale_cipo : t_mem_cipo := c_mem_cipo_rst;
......@@ -323,6 +333,25 @@ ARCHITECTURE str OF lofar2_unb2c_sdp_station IS
SIGNAL ram_st_bst_copi : t_mem_copi := c_mem_copi_rst;
SIGNAL ram_st_bst_cipo : t_mem_cipo := c_mem_cipo_rst;
-- BF ring lane info
SIGNAL reg_ring_lane_info_bf_copi : t_mem_copi := c_mem_copi_rst;
SIGNAL reg_ring_lane_info_bf_cipo : t_mem_cipo := c_mem_cipo_rst;
-- BF ring bsn monitor rx
SIGNAL reg_bsn_monitor_v2_ring_rx_bf_copi : t_mem_copi := c_mem_copi_rst;
SIGNAL reg_bsn_monitor_v2_ring_rx_bf_cipo : t_mem_cipo := c_mem_cipo_rst;
-- BF ring bsn monitor tx
SIGNAL reg_bsn_monitor_v2_ring_tx_bf_copi : t_mem_copi := c_mem_copi_rst;
SIGNAL reg_bsn_monitor_v2_ring_tx_bf_cipo : t_mem_cipo := c_mem_cipo_rst;
-- BF ring validate err
SIGNAL reg_dp_block_validate_err_bf_copi : t_mem_copi := c_mem_copi_rst;
SIGNAL reg_dp_block_validate_err_bf_cipo : t_mem_cipo := c_mem_cipo_rst;
-- BF ring bsn at sync
SIGNAL reg_dp_block_validate_bsn_at_sync_bf_copi : t_mem_copi := c_mem_copi_rst;
SIGNAL reg_dp_block_validate_bsn_at_sync_bf_cipo : t_mem_cipo := c_mem_cipo_rst;
----------------------------------------------
-- SST
----------------------------------------------
......@@ -349,14 +378,14 @@ ARCHITECTURE str OF lofar2_unb2c_sdp_station IS
SIGNAL reg_stat_hdr_dat_xst_cipo : t_mem_cipo;
-- XST bsn aligner_v2
SIGNAL reg_bsn_align_v2_copi : t_mem_copi;
SIGNAL reg_bsn_align_v2_cipo : t_mem_cipo;
SIGNAL reg_bsn_align_v2_xsub_copi : t_mem_copi;
SIGNAL reg_bsn_align_v2_xsub_cipo : t_mem_cipo;
-- XST bsn aligner_v2 bsn monitors
SIGNAL reg_bsn_monitor_v2_bsn_align_v2_input_copi : t_mem_copi;
SIGNAL reg_bsn_monitor_v2_bsn_align_v2_input_cipo : t_mem_cipo;
SIGNAL reg_bsn_monitor_v2_bsn_align_v2_output_copi : t_mem_copi;
SIGNAL reg_bsn_monitor_v2_bsn_align_v2_output_cipo : t_mem_cipo;
SIGNAL reg_bsn_monitor_v2_rx_align_xsub_copi : t_mem_copi := c_mem_copi_rst;
SIGNAL reg_bsn_monitor_v2_rx_align_xsub_cipo : t_mem_cipo := c_mem_cipo_rst;
SIGNAL reg_bsn_monitor_v2_aligned_xsub_copi : t_mem_copi := c_mem_copi_rst;
SIGNAL reg_bsn_monitor_v2_aligned_xsub_cipo : t_mem_cipo := c_mem_cipo_rst;
-- XST UDP offload bsn monitor
SIGNAL reg_bsn_monitor_v2_xst_offload_copi : t_mem_copi;
......@@ -665,6 +694,22 @@ BEGIN
reg_dp_xonoff_cipo => reg_dp_xonoff_cipo,
ram_st_bst_copi => ram_st_bst_copi,
ram_st_bst_cipo => ram_st_bst_cipo,
reg_bsn_align_v2_bf_copi => reg_bsn_align_v2_bf_copi,
reg_bsn_align_v2_bf_cipo => reg_bsn_align_v2_bf_cipo,
reg_bsn_monitor_v2_rx_align_bf_copi => reg_bsn_monitor_v2_rx_align_bf_copi,
reg_bsn_monitor_v2_rx_align_bf_cipo => reg_bsn_monitor_v2_rx_align_bf_cipo,
reg_bsn_monitor_v2_aligned_bf_copi => reg_bsn_monitor_v2_aligned_bf_copi,
reg_bsn_monitor_v2_aligned_bf_cipo => reg_bsn_monitor_v2_aligned_bf_cipo,
reg_ring_lane_info_bf_copi => reg_ring_lane_info_bf_copi,
reg_ring_lane_info_bf_cipo => reg_ring_lane_info_bf_cipo,
reg_bsn_monitor_v2_ring_rx_bf_copi => reg_bsn_monitor_v2_ring_rx_bf_copi,
reg_bsn_monitor_v2_ring_rx_bf_cipo => reg_bsn_monitor_v2_ring_rx_bf_cipo,
reg_bsn_monitor_v2_ring_tx_bf_copi => reg_bsn_monitor_v2_ring_tx_bf_copi,
reg_bsn_monitor_v2_ring_tx_bf_cipo => reg_bsn_monitor_v2_ring_tx_bf_cipo,
reg_dp_block_validate_err_bf_copi => reg_dp_block_validate_err_bf_copi,
reg_dp_block_validate_err_bf_cipo => reg_dp_block_validate_err_bf_cipo,
reg_dp_block_validate_bsn_at_sync_bf_copi => reg_dp_block_validate_bsn_at_sync_bf_copi,
reg_dp_block_validate_bsn_at_sync_bf_cipo => reg_dp_block_validate_bsn_at_sync_bf_cipo,
reg_nw_10GbE_mac_copi => reg_nw_10GbE_mac_copi,
reg_nw_10GbE_mac_cipo => reg_nw_10GbE_mac_cipo,
reg_nw_10GbE_eth10g_copi => reg_nw_10GbE_eth10g_copi,
......@@ -689,12 +734,12 @@ BEGIN
reg_nof_crosslets_cipo => reg_nof_crosslets_cipo,
reg_bsn_sync_scheduler_xsub_copi => reg_bsn_sync_scheduler_xsub_copi,
reg_bsn_sync_scheduler_xsub_cipo => reg_bsn_sync_scheduler_xsub_cipo,
reg_bsn_align_v2_copi => reg_bsn_align_v2_copi,
reg_bsn_align_v2_cipo => reg_bsn_align_v2_cipo,
reg_bsn_monitor_v2_bsn_align_v2_input_copi => reg_bsn_monitor_v2_bsn_align_v2_input_copi,
reg_bsn_monitor_v2_bsn_align_v2_input_cipo => reg_bsn_monitor_v2_bsn_align_v2_input_cipo,
reg_bsn_monitor_v2_bsn_align_v2_output_copi => reg_bsn_monitor_v2_bsn_align_v2_output_copi,
reg_bsn_monitor_v2_bsn_align_v2_output_cipo => reg_bsn_monitor_v2_bsn_align_v2_output_cipo,
reg_bsn_align_v2_xsub_copi => reg_bsn_align_v2_xsub_copi,
reg_bsn_align_v2_xsub_cipo => reg_bsn_align_v2_xsub_cipo,
reg_bsn_monitor_v2_rx_align_xsub_copi => reg_bsn_monitor_v2_rx_align_xsub_copi,
reg_bsn_monitor_v2_rx_align_xsub_cipo => reg_bsn_monitor_v2_rx_align_xsub_cipo,
reg_bsn_monitor_v2_aligned_xsub_copi => reg_bsn_monitor_v2_aligned_xsub_copi,
reg_bsn_monitor_v2_aligned_xsub_cipo => reg_bsn_monitor_v2_aligned_xsub_cipo,
reg_bsn_monitor_v2_xst_offload_copi => reg_bsn_monitor_v2_xst_offload_copi,
reg_bsn_monitor_v2_xst_offload_cipo => reg_bsn_monitor_v2_xst_offload_cipo,
reg_bsn_monitor_v2_bst_offload_copi => reg_bsn_monitor_v2_bst_offload_copi,
......@@ -839,6 +884,22 @@ BEGIN
reg_dp_xonoff_cipo => reg_dp_xonoff_cipo,
ram_st_bst_copi => ram_st_bst_copi,
ram_st_bst_cipo => ram_st_bst_cipo,
reg_bsn_align_v2_bf_copi => reg_bsn_align_v2_bf_copi,
reg_bsn_align_v2_bf_cipo => reg_bsn_align_v2_bf_cipo,
reg_bsn_monitor_v2_rx_align_bf_copi => reg_bsn_monitor_v2_rx_align_bf_copi,
reg_bsn_monitor_v2_rx_align_bf_cipo => reg_bsn_monitor_v2_rx_align_bf_cipo,
reg_bsn_monitor_v2_aligned_bf_copi => reg_bsn_monitor_v2_aligned_bf_copi,
reg_bsn_monitor_v2_aligned_bf_cipo => reg_bsn_monitor_v2_aligned_bf_cipo,
reg_ring_lane_info_bf_copi => reg_ring_lane_info_bf_copi,
reg_ring_lane_info_bf_cipo => reg_ring_lane_info_bf_cipo,
reg_bsn_monitor_v2_ring_rx_bf_copi => reg_bsn_monitor_v2_ring_rx_bf_copi,
reg_bsn_monitor_v2_ring_rx_bf_cipo => reg_bsn_monitor_v2_ring_rx_bf_cipo,
reg_bsn_monitor_v2_ring_tx_bf_copi => reg_bsn_monitor_v2_ring_tx_bf_copi,
reg_bsn_monitor_v2_ring_tx_bf_cipo => reg_bsn_monitor_v2_ring_tx_bf_cipo,
reg_dp_block_validate_err_bf_copi => reg_dp_block_validate_err_bf_copi,
reg_dp_block_validate_err_bf_cipo => reg_dp_block_validate_err_bf_cipo,
reg_dp_block_validate_bsn_at_sync_bf_copi => reg_dp_block_validate_bsn_at_sync_bf_copi,
reg_dp_block_validate_bsn_at_sync_bf_cipo => reg_dp_block_validate_bsn_at_sync_bf_cipo,
-- SST
reg_stat_enable_sst_copi => reg_stat_enable_sst_copi,
......@@ -854,12 +915,12 @@ BEGIN
reg_stat_hdr_dat_xst_copi => reg_stat_hdr_dat_xst_copi,
reg_stat_hdr_dat_xst_cipo => reg_stat_hdr_dat_xst_cipo,
reg_bsn_align_copi => reg_bsn_align_v2_copi,
reg_bsn_align_cipo => reg_bsn_align_v2_cipo,
reg_bsn_monitor_v2_bsn_align_input_copi => reg_bsn_monitor_v2_bsn_align_v2_input_copi,
reg_bsn_monitor_v2_bsn_align_input_cipo => reg_bsn_monitor_v2_bsn_align_v2_input_cipo,
reg_bsn_monitor_v2_bsn_align_output_copi => reg_bsn_monitor_v2_bsn_align_v2_output_copi,
reg_bsn_monitor_v2_bsn_align_output_cipo => reg_bsn_monitor_v2_bsn_align_v2_output_cipo,
reg_bsn_align_v2_xsub_copi => reg_bsn_align_v2_xsub_copi,
reg_bsn_align_v2_xsub_cipo => reg_bsn_align_v2_xsub_cipo,
reg_bsn_monitor_v2_rx_align_xsub_copi => reg_bsn_monitor_v2_rx_align_xsub_copi,
reg_bsn_monitor_v2_rx_align_xsub_cipo => reg_bsn_monitor_v2_rx_align_xsub_cipo,
reg_bsn_monitor_v2_aligned_xsub_copi => reg_bsn_monitor_v2_aligned_xsub_copi,
reg_bsn_monitor_v2_aligned_xsub_cipo => reg_bsn_monitor_v2_aligned_xsub_cipo,
reg_bsn_monitor_v2_xst_offload_copi => reg_bsn_monitor_v2_xst_offload_copi,
reg_bsn_monitor_v2_xst_offload_cipo => reg_bsn_monitor_v2_xst_offload_cipo,
reg_ring_lane_info_xst_copi => reg_ring_lane_info_xst_copi,
......
applications/lofar2/designs/lofar2_unb2c_sdp_station/src/vhdl/mmm_lofar2_unb2c_sdp_station.vhd
+ 167
− 49
View file @ 09cc1ed7
......@@ -168,6 +168,16 @@ ENTITY mmm_lofar2_unb2c_sdp_station IS
ram_bf_weights_copi : OUT t_mem_copi;
ram_bf_weights_cipo : IN t_mem_cipo;
-- BF bsn aligner_v2
reg_bsn_align_v2_bf_copi : OUT t_mem_copi;
reg_bsn_align_v2_bf_cipo : IN t_mem_cipo;
-- BF bsn aligner_v2 bsn monitors
reg_bsn_monitor_v2_rx_align_bf_copi : OUT t_mem_copi;
reg_bsn_monitor_v2_rx_align_bf_cipo : IN t_mem_cipo;
reg_bsn_monitor_v2_aligned_bf_copi : OUT t_mem_copi;
reg_bsn_monitor_v2_aligned_bf_cipo : IN t_mem_cipo;
-- mms_dp_scale Scale Beamlets
reg_bf_scale_copi : OUT t_mem_copi;
reg_bf_scale_cipo : IN t_mem_cipo;
......@@ -180,6 +190,26 @@ ENTITY mmm_lofar2_unb2c_sdp_station IS
reg_dp_xonoff_copi : OUT t_mem_copi;
reg_dp_xonoff_cipo : IN t_mem_cipo;
-- BF ring lane info
reg_ring_lane_info_bf_copi : OUT t_mem_copi;
reg_ring_lane_info_bf_cipo : IN t_mem_cipo;
-- BF ring bsn monitor rx
reg_bsn_monitor_v2_ring_rx_bf_copi : OUT t_mem_copi;
reg_bsn_monitor_v2_ring_rx_bf_cipo : IN t_mem_cipo;
-- BF ring bsn monitor tx
reg_bsn_monitor_v2_ring_tx_bf_copi : OUT t_mem_copi;
reg_bsn_monitor_v2_ring_tx_bf_cipo : IN t_mem_cipo;
-- BF ring validate err
reg_dp_block_validate_err_bf_copi : OUT t_mem_copi;
reg_dp_block_validate_err_bf_cipo : IN t_mem_cipo;
-- BF ring bsn at sync
reg_dp_block_validate_bsn_at_sync_bf_copi : OUT t_mem_copi;
reg_dp_block_validate_bsn_at_sync_bf_cipo : IN t_mem_cipo;
-- Beamlet Statistics (BST)
ram_st_bst_copi : OUT t_mem_copi;
ram_st_bst_cipo : IN t_mem_cipo;
......@@ -233,14 +263,14 @@ ENTITY mmm_lofar2_unb2c_sdp_station IS
reg_nw_10GbE_eth10g_cipo : IN t_mem_cipo;
-- XST bsn aligner_v2
reg_bsn_align_v2_copi : OUT t_mem_copi;
reg_bsn_align_v2_cipo : IN t_mem_cipo;
reg_bsn_align_v2_xsub_copi : OUT t_mem_copi;
reg_bsn_align_v2_xsub_cipo : IN t_mem_cipo;
-- XST bsn aligner_v2 bsn monitors
reg_bsn_monitor_v2_bsn_align_v2_input_copi : OUT t_mem_copi;
reg_bsn_monitor_v2_bsn_align_v2_input_cipo : IN t_mem_cipo;
reg_bsn_monitor_v2_bsn_align_v2_output_copi : OUT t_mem_copi;
reg_bsn_monitor_v2_bsn_align_v2_output_cipo : IN t_mem_cipo;
reg_bsn_monitor_v2_rx_align_xsub_copi : OUT t_mem_copi;
reg_bsn_monitor_v2_rx_align_xsub_cipo : IN t_mem_cipo;
reg_bsn_monitor_v2_aligned_xsub_copi : OUT t_mem_copi;
reg_bsn_monitor_v2_aligned_xsub_cipo : IN t_mem_cipo;
-- XST UDP offload bsn monitor
reg_bsn_monitor_v2_xst_offload_copi : OUT t_mem_copi;
......@@ -439,14 +469,38 @@ BEGIN
u_mm_file_reg_nw_10GbE_eth10g : mm_file GENERIC MAP(mmf_unb_file_prefix(g_sim_unb_nr, c_sim_node_nr, c_sim_node_type) & "REG_NW_10GBE_ETH10G")
PORT MAP(mm_rst, mm_clk, reg_nw_10GbE_eth10g_copi, reg_nw_10GbE_eth10g_cipo );
u_mm_file_reg_bsn_align_v2 : mm_file GENERIC MAP(mmf_unb_file_prefix(g_sim_unb_nr, c_sim_node_nr, c_sim_node_type) & "REG_BSN_ALIGN_V2")
PORT MAP(mm_rst, mm_clk, reg_bsn_align_v2_copi, reg_bsn_align_v2_cipo );
u_mm_file_reg_bsn_align_v2_bf : mm_file GENERIC MAP(mmf_unb_file_prefix(g_sim_unb_nr, c_sim_node_nr, c_sim_node_type) & "REG_BSN_ALIGN_V2_BF")
PORT MAP(mm_rst, mm_clk, reg_bsn_align_v2_bf_copi, reg_bsn_align_v2_bf_cipo );
u_mm_file_reg_bsn_monitor_v2_rx_align_bf : mm_file GENERIC MAP(mmf_unb_file_prefix(g_sim_unb_nr, c_sim_node_nr, c_sim_node_type) & "REG_BSN_MONITOR_V2_RX_ALIGN_BF")
PORT MAP(mm_rst, mm_clk, reg_bsn_monitor_v2_rx_align_bf_copi, reg_bsn_monitor_v2_rx_align_bf_cipo );
u_mm_file_reg_bsn_monitor_v2_bsn_align_v2_input : mm_file GENERIC MAP(mmf_unb_file_prefix(g_sim_unb_nr, c_sim_node_nr, c_sim_node_type) & "REG_BSN_MONITOR_V2_BSN_ALIGN_V2_INPUT")
PORT MAP(mm_rst, mm_clk, reg_bsn_monitor_v2_bsn_align_v2_input_copi, reg_bsn_monitor_v2_bsn_align_v2_input_cipo );
u_mm_file_reg_bsn_monitor_v2_aligned_bf : mm_file GENERIC MAP(mmf_unb_file_prefix(g_sim_unb_nr, c_sim_node_nr, c_sim_node_type) & "REG_BSN_MONITOR_V2_ALIGNED_BF")
PORT MAP(mm_rst, mm_clk, reg_bsn_monitor_v2_aligned_bf_copi, reg_bsn_monitor_v2_aligned_bf_cipo );
u_mm_file_reg_bsn_monitor_v2_bsn_align_v2_output: mm_file GENERIC MAP(mmf_unb_file_prefix(g_sim_unb_nr, c_sim_node_nr, c_sim_node_type) & "REG_BSN_MONITOR_V2_BSN_ALIGN_V2_OUTPUT")
PORT MAP(mm_rst, mm_clk, reg_bsn_monitor_v2_bsn_align_v2_output_copi, reg_bsn_monitor_v2_bsn_align_v2_output_cipo );
u_mm_file_reg_ring_lane_info_bf : mm_file GENERIC MAP(mmf_unb_file_prefix(g_sim_unb_nr, c_sim_node_nr, c_sim_node_type) & "REG_RING_LANE_INFO_BF")
PORT MAP(mm_rst, mm_clk, reg_ring_lane_info_bf_copi, reg_ring_lane_info_bf_cipo );
u_mm_file_reg_bsn_monitor_v2_ring_rx_bf : mm_file GENERIC MAP(mmf_unb_file_prefix(g_sim_unb_nr, c_sim_node_nr, c_sim_node_type) & "REG_BSN_MONITOR_V2_RING_RX_BF")
PORT MAP(mm_rst, mm_clk, reg_bsn_monitor_v2_ring_rx_bf_copi, reg_bsn_monitor_v2_ring_rx_bf_cipo );
u_mm_file_reg_bsn_monitor_v2_ring_tx_bf : mm_file GENERIC MAP(mmf_unb_file_prefix(g_sim_unb_nr, c_sim_node_nr, c_sim_node_type) & "REG_BSN_MONITOR_V2_RING_TX_BF")
PORT MAP(mm_rst, mm_clk, reg_bsn_monitor_v2_ring_tx_bf_copi, reg_bsn_monitor_v2_ring_tx_bf_cipo );
u_mm_file_reg_dp_block_validate_err_bf : mm_file GENERIC MAP(mmf_unb_file_prefix(g_sim_unb_nr, c_sim_node_nr, c_sim_node_type) & "REG_DP_BLOCK_VALIDATE_ERR_BF")
PORT MAP(mm_rst, mm_clk, reg_dp_block_validate_err_bf_copi, reg_dp_block_validate_err_bf_cipo );
u_mm_file_reg_dp_block_validate_bsn_at_sync_bf : mm_file GENERIC MAP(mmf_unb_file_prefix(g_sim_unb_nr, c_sim_node_nr, c_sim_node_type) & "REG_DP_BLOCK_VALIDATE_BSN_AT_SYNC_BF")
PORT MAP(mm_rst, mm_clk, reg_dp_block_validate_bsn_at_sync_bf_copi, reg_dp_block_validate_bsn_at_sync_bf_cipo );
u_mm_file_reg_bsn_align_v2_xsub : mm_file GENERIC MAP(mmf_unb_file_prefix(g_sim_unb_nr, c_sim_node_nr, c_sim_node_type) & "REG_BSN_ALIGN_V2_XSUB")
PORT MAP(mm_rst, mm_clk, reg_bsn_align_v2_xsub_copi, reg_bsn_align_v2_xsub_cipo );
u_mm_file_reg_bsn_monitor_v2_rx_align_xsub : mm_file GENERIC MAP(mmf_unb_file_prefix(g_sim_unb_nr, c_sim_node_nr, c_sim_node_type) & "REG_BSN_MONITOR_V2_RX_ALIGN_XSUB")
PORT MAP(mm_rst, mm_clk, reg_bsn_monitor_v2_rx_align_xsub_copi, reg_bsn_monitor_v2_rx_align_xsub_cipo );
u_mm_file_reg_bsn_monitor_v2_aligned_xsub : mm_file GENERIC MAP(mmf_unb_file_prefix(g_sim_unb_nr, c_sim_node_nr, c_sim_node_type) & "REG_BSN_MONITOR_V2_ALIGNED_XSUB")
PORT MAP(mm_rst, mm_clk, reg_bsn_monitor_v2_aligned_xsub_copi, reg_bsn_monitor_v2_aligned_xsub_cipo );
u_mm_file_reg_bsn_monitor_v2_sst_offload : mm_file GENERIC MAP(mmf_unb_file_prefix(g_sim_unb_nr, c_sim_node_nr, c_sim_node_type) & "REG_BSN_MONITOR_V2_SST_OFFLOAD")
PORT MAP(mm_rst, mm_clk, reg_bsn_monitor_v2_sst_offload_copi, reg_bsn_monitor_v2_sst_offload_cipo );
......@@ -920,29 +974,53 @@ BEGIN
reg_nw_10GbE_eth10g_read_export => reg_nw_10GbE_eth10g_copi.rd,
reg_nw_10GbE_eth10g_readdata_export => reg_nw_10GbE_eth10g_cipo.rddata(c_word_w-1 DOWNTO 0),
reg_bsn_align_v2_clk_export => OPEN,
reg_bsn_align_v2_reset_export => OPEN,
reg_bsn_align_v2_address_export => reg_bsn_align_v2_copi.address(c_sdp_reg_bsn_align_v2_addr_w-1 DOWNTO 0),
reg_bsn_align_v2_write_export => reg_bsn_align_v2_copi.wr,
reg_bsn_align_v2_writedata_export => reg_bsn_align_v2_copi.wrdata(c_word_w-1 DOWNTO 0),
reg_bsn_align_v2_read_export => reg_bsn_align_v2_copi.rd,
reg_bsn_align_v2_readdata_export => reg_bsn_align_v2_cipo.rddata(c_word_w-1 DOWNTO 0),
reg_bsn_monitor_v2_bsn_align_v2_input_clk_export => OPEN,
reg_bsn_monitor_v2_bsn_align_v2_input_reset_export => OPEN,
reg_bsn_monitor_v2_bsn_align_v2_input_address_export => reg_bsn_monitor_v2_bsn_align_v2_input_copi.address(c_sdp_reg_bsn_monitor_v2_bsn_align_v2_input_addr_w-1 DOWNTO 0),
reg_bsn_monitor_v2_bsn_align_v2_input_write_export => reg_bsn_monitor_v2_bsn_align_v2_input_copi.wr,
reg_bsn_monitor_v2_bsn_align_v2_input_writedata_export => reg_bsn_monitor_v2_bsn_align_v2_input_copi.wrdata(c_word_w-1 DOWNTO 0),
reg_bsn_monitor_v2_bsn_align_v2_input_read_export => reg_bsn_monitor_v2_bsn_align_v2_input_copi.rd,
reg_bsn_monitor_v2_bsn_align_v2_input_readdata_export => reg_bsn_monitor_v2_bsn_align_v2_input_cipo.rddata(c_word_w-1 DOWNTO 0),
reg_bsn_monitor_v2_bsn_align_v2_output_clk_export => OPEN,
reg_bsn_monitor_v2_bsn_align_v2_output_reset_export => OPEN,
reg_bsn_monitor_v2_bsn_align_v2_output_address_export => reg_bsn_monitor_v2_bsn_align_v2_output_copi.address(c_sdp_reg_bsn_monitor_v2_bsn_align_v2_output_addr_w-1 DOWNTO 0),
reg_bsn_monitor_v2_bsn_align_v2_output_write_export => reg_bsn_monitor_v2_bsn_align_v2_output_copi.wr,
reg_bsn_monitor_v2_bsn_align_v2_output_writedata_export=> reg_bsn_monitor_v2_bsn_align_v2_output_copi.wrdata(c_word_w-1 DOWNTO 0),
reg_bsn_monitor_v2_bsn_align_v2_output_read_export => reg_bsn_monitor_v2_bsn_align_v2_output_copi.rd,
reg_bsn_monitor_v2_bsn_align_v2_output_readdata_export => reg_bsn_monitor_v2_bsn_align_v2_output_cipo.rddata(c_word_w-1 DOWNTO 0),
reg_bsn_align_v2_bf_clk_export => OPEN,
reg_bsn_align_v2_bf_reset_export => OPEN,
reg_bsn_align_v2_bf_address_export => reg_bsn_align_v2_bf_copi.address(c_sdp_reg_bsn_align_v2_bf_addr_w-1 DOWNTO 0),
reg_bsn_align_v2_bf_write_export => reg_bsn_align_v2_bf_copi.wr,
reg_bsn_align_v2_bf_writedata_export => reg_bsn_align_v2_bf_copi.wrdata(c_word_w-1 DOWNTO 0),
reg_bsn_align_v2_bf_read_export => reg_bsn_align_v2_bf_copi.rd,
reg_bsn_align_v2_bf_readdata_export => reg_bsn_align_v2_bf_cipo.rddata(c_word_w-1 DOWNTO 0),
reg_bsn_monitor_v2_rx_align_bf_clk_export => OPEN,
reg_bsn_monitor_v2_rx_align_bf_reset_export => OPEN,
reg_bsn_monitor_v2_rx_align_bf_address_export => reg_bsn_monitor_v2_rx_align_bf_copi.address(c_sdp_reg_bsn_monitor_v2_rx_align_bf_addr_w-1 DOWNTO 0),
reg_bsn_monitor_v2_rx_align_bf_write_export => reg_bsn_monitor_v2_rx_align_bf_copi.wr,
reg_bsn_monitor_v2_rx_align_bf_writedata_export => reg_bsn_monitor_v2_rx_align_bf_copi.wrdata(c_word_w-1 DOWNTO 0),
reg_bsn_monitor_v2_rx_align_bf_read_export => reg_bsn_monitor_v2_rx_align_bf_copi.rd,
reg_bsn_monitor_v2_rx_align_bf_readdata_export => reg_bsn_monitor_v2_rx_align_bf_cipo.rddata(c_word_w-1 DOWNTO 0),
reg_bsn_monitor_v2_aligned_bf_clk_export => OPEN,
reg_bsn_monitor_v2_aligned_bf_reset_export => OPEN,
reg_bsn_monitor_v2_aligned_bf_address_export => reg_bsn_monitor_v2_aligned_bf_copi.address(c_sdp_reg_bsn_monitor_v2_aligned_bf_addr_w-1 DOWNTO 0),
reg_bsn_monitor_v2_aligned_bf_write_export => reg_bsn_monitor_v2_aligned_bf_copi.wr,
reg_bsn_monitor_v2_aligned_bf_writedata_export => reg_bsn_monitor_v2_aligned_bf_copi.wrdata(c_word_w-1 DOWNTO 0),
reg_bsn_monitor_v2_aligned_bf_read_export => reg_bsn_monitor_v2_aligned_bf_copi.rd,
reg_bsn_monitor_v2_aligned_bf_readdata_export => reg_bsn_monitor_v2_aligned_bf_cipo.rddata(c_word_w-1 DOWNTO 0),
reg_bsn_align_v2_xsub_clk_export => OPEN,
reg_bsn_align_v2_xsub_reset_export => OPEN,
reg_bsn_align_v2_xsub_address_export => reg_bsn_align_v2_xsub_copi.address(c_sdp_reg_bsn_align_v2_xsub_addr_w-1 DOWNTO 0),
reg_bsn_align_v2_xsub_write_export => reg_bsn_align_v2_xsub_copi.wr,
reg_bsn_align_v2_xsub_writedata_export => reg_bsn_align_v2_xsub_copi.wrdata(c_word_w-1 DOWNTO 0),
reg_bsn_align_v2_xsub_read_export => reg_bsn_align_v2_xsub_copi.rd,
reg_bsn_align_v2_xsub_readdata_export => reg_bsn_align_v2_xsub_cipo.rddata(c_word_w-1 DOWNTO 0),
reg_bsn_monitor_v2_rx_align_xsub_clk_export => OPEN,
reg_bsn_monitor_v2_rx_align_xsub_reset_export => OPEN,
reg_bsn_monitor_v2_rx_align_xsub_address_export => reg_bsn_monitor_v2_rx_align_xsub_copi.address(c_sdp_reg_bsn_monitor_v2_rx_align_xsub_addr_w-1 DOWNTO 0),
reg_bsn_monitor_v2_rx_align_xsub_write_export => reg_bsn_monitor_v2_rx_align_xsub_copi.wr,
reg_bsn_monitor_v2_rx_align_xsub_writedata_export => reg_bsn_monitor_v2_rx_align_xsub_copi.wrdata(c_word_w-1 DOWNTO 0),
reg_bsn_monitor_v2_rx_align_xsub_read_export => reg_bsn_monitor_v2_rx_align_xsub_copi.rd,
reg_bsn_monitor_v2_rx_align_xsub_readdata_export => reg_bsn_monitor_v2_rx_align_xsub_cipo.rddata(c_word_w-1 DOWNTO 0),
reg_bsn_monitor_v2_aligned_xsub_clk_export => OPEN,
reg_bsn_monitor_v2_aligned_xsub_reset_export => OPEN,
reg_bsn_monitor_v2_aligned_xsub_address_export => reg_bsn_monitor_v2_aligned_xsub_copi.address(c_sdp_reg_bsn_monitor_v2_aligned_xsub_addr_w-1 DOWNTO 0),
reg_bsn_monitor_v2_aligned_xsub_write_export => reg_bsn_monitor_v2_aligned_xsub_copi.wr,
reg_bsn_monitor_v2_aligned_xsub_writedata_export => reg_bsn_monitor_v2_aligned_xsub_copi.wrdata(c_word_w-1 DOWNTO 0),
reg_bsn_monitor_v2_aligned_xsub_read_export => reg_bsn_monitor_v2_aligned_xsub_copi.rd,
reg_bsn_monitor_v2_aligned_xsub_readdata_export => reg_bsn_monitor_v2_aligned_xsub_cipo.rddata(c_word_w-1 DOWNTO 0),
reg_bsn_monitor_v2_sst_offload_clk_export => OPEN,
reg_bsn_monitor_v2_sst_offload_reset_export => OPEN,
......@@ -976,6 +1054,46 @@ BEGIN
reg_bsn_monitor_v2_xst_offload_read_export => reg_bsn_monitor_v2_xst_offload_copi.rd,
reg_bsn_monitor_v2_xst_offload_readdata_export => reg_bsn_monitor_v2_xst_offload_cipo.rddata(c_word_w-1 DOWNTO 0),
reg_ring_lane_info_bf_clk_export => OPEN,
reg_ring_lane_info_bf_reset_export => OPEN,
reg_ring_lane_info_bf_address_export => reg_ring_lane_info_bf_copi.address(c_sdp_reg_ring_lane_info_bf_addr_w-1 DOWNTO 0),
reg_ring_lane_info_bf_write_export => reg_ring_lane_info_bf_copi.wr,
reg_ring_lane_info_bf_writedata_export => reg_ring_lane_info_bf_copi.wrdata(c_word_w-1 DOWNTO 0),
reg_ring_lane_info_bf_read_export => reg_ring_lane_info_bf_copi.rd,
reg_ring_lane_info_bf_readdata_export => reg_ring_lane_info_bf_cipo.rddata(c_word_w-1 DOWNTO 0),
reg_bsn_monitor_v2_ring_rx_bf_clk_export => OPEN,
reg_bsn_monitor_v2_ring_rx_bf_reset_export => OPEN,
reg_bsn_monitor_v2_ring_rx_bf_address_export => reg_bsn_monitor_v2_ring_rx_bf_copi.address(c_sdp_reg_bsn_monitor_v2_ring_rx_bf_addr_w-1 DOWNTO 0),
reg_bsn_monitor_v2_ring_rx_bf_write_export => reg_bsn_monitor_v2_ring_rx_bf_copi.wr,
reg_bsn_monitor_v2_ring_rx_bf_writedata_export => reg_bsn_monitor_v2_ring_rx_bf_copi.wrdata(c_word_w-1 DOWNTO 0),
reg_bsn_monitor_v2_ring_rx_bf_read_export => reg_bsn_monitor_v2_ring_rx_bf_copi.rd,
reg_bsn_monitor_v2_ring_rx_bf_readdata_export => reg_bsn_monitor_v2_ring_rx_bf_cipo.rddata(c_word_w-1 DOWNTO 0),
reg_bsn_monitor_v2_ring_tx_bf_clk_export => OPEN,
reg_bsn_monitor_v2_ring_tx_bf_reset_export => OPEN,
reg_bsn_monitor_v2_ring_tx_bf_address_export => reg_bsn_monitor_v2_ring_tx_bf_copi.address(c_sdp_reg_bsn_monitor_v2_ring_tx_bf_addr_w-1 DOWNTO 0),
reg_bsn_monitor_v2_ring_tx_bf_write_export => reg_bsn_monitor_v2_ring_tx_bf_copi.wr,
reg_bsn_monitor_v2_ring_tx_bf_writedata_export => reg_bsn_monitor_v2_ring_tx_bf_copi.wrdata(c_word_w-1 DOWNTO 0),
reg_bsn_monitor_v2_ring_tx_bf_read_export => reg_bsn_monitor_v2_ring_tx_bf_copi.rd,
reg_bsn_monitor_v2_ring_tx_bf_readdata_export => reg_bsn_monitor_v2_ring_tx_bf_cipo.rddata(c_word_w-1 DOWNTO 0),
reg_dp_block_validate_err_bf_clk_export => OPEN,
reg_dp_block_validate_err_bf_reset_export => OPEN,
reg_dp_block_validate_err_bf_address_export => reg_dp_block_validate_err_bf_copi.address(c_sdp_reg_dp_block_validate_err_bf_addr_w-1 DOWNTO 0),
reg_dp_block_validate_err_bf_write_export => reg_dp_block_validate_err_bf_copi.wr,
reg_dp_block_validate_err_bf_writedata_export => reg_dp_block_validate_err_bf_copi.wrdata(c_word_w-1 DOWNTO 0),
reg_dp_block_validate_err_bf_read_export => reg_dp_block_validate_err_bf_copi.rd,
reg_dp_block_validate_err_bf_readdata_export => reg_dp_block_validate_err_bf_cipo.rddata(c_word_w-1 DOWNTO 0),
reg_dp_block_validate_bsn_at_sync_bf_clk_export => OPEN,
reg_dp_block_validate_bsn_at_sync_bf_reset_export => OPEN,
reg_dp_block_validate_bsn_at_sync_bf_address_export => reg_dp_block_validate_bsn_at_sync_bf_copi.address(c_sdp_reg_dp_block_validate_bsn_at_sync_bf_addr_w-1 DOWNTO 0),
reg_dp_block_validate_bsn_at_sync_bf_write_export => reg_dp_block_validate_bsn_at_sync_bf_copi.wr,
reg_dp_block_validate_bsn_at_sync_bf_writedata_export => reg_dp_block_validate_bsn_at_sync_bf_copi.wrdata(c_word_w-1 DOWNTO 0),
reg_dp_block_validate_bsn_at_sync_bf_read_export => reg_dp_block_validate_bsn_at_sync_bf_copi.rd,
reg_dp_block_validate_bsn_at_sync_bf_readdata_export => reg_dp_block_validate_bsn_at_sync_bf_cipo.rddata(c_word_w-1 DOWNTO 0),
reg_ring_lane_info_xst_clk_export => OPEN,
reg_ring_lane_info_xst_reset_export => OPEN,
reg_ring_lane_info_xst_address_export => reg_ring_lane_info_xst_copi.address(c_sdp_reg_ring_lane_info_xst_addr_w-1 DOWNTO 0),
......
applications/lofar2/libraries/sdp/hdllib.cfg
+ 1
− 0
View file @ 09cc1ed7
......@@ -10,6 +10,7 @@ synth_files =
src/vhdl/sdp_subband_equalizer.vhd
src/vhdl/sdp_bf_weights.vhd
src/vhdl/sdp_beamformer_local.vhd
src/vhdl/sdp_beamformer_remote.vhd
src/vhdl/sdp_info_reg.vhd
src/vhdl/sdp_info.vhd
src/vhdl/sdp_beamformer_output.vhd
......
applications/lofar2/libraries/sdp/src/vhdl/node_sdp_beamformer.vhd
+ 34
− 7
View file @ 09cc1ed7
......@@ -49,6 +49,8 @@ ENTITY node_sdp_beamformer IS
dp_rst : IN STD_LOGIC;
in_sosi_arr : IN t_dp_sosi_arr(c_sdp_P_pfb-1 DOWNTO 0);
from_ri_sosi : IN t_dp_sosi;
to_ri_sosi : OUT t_dp_sosi;
bf_udp_sosi : OUT t_dp_sosi;
bf_udp_siso : IN t_dp_siso;
bst_udp_sosi : OUT t_dp_sosi;
......@@ -73,6 +75,12 @@ ENTITY node_sdp_beamformer IS
reg_stat_enable_miso : OUT t_mem_miso;
reg_stat_hdr_dat_mosi : IN t_mem_mosi := c_mem_mosi_rst;
reg_stat_hdr_dat_miso : OUT t_mem_miso;
reg_bsn_align_copi : IN t_mem_copi := c_mem_copi_rst;
reg_bsn_align_cipo : OUT t_mem_cipo;
reg_bsn_monitor_v2_bsn_align_input_copi : IN t_mem_copi := c_mem_copi_rst;
reg_bsn_monitor_v2_bsn_align_input_cipo : OUT t_mem_cipo;
reg_bsn_monitor_v2_bsn_align_output_copi : IN t_mem_copi := c_mem_copi_rst;
reg_bsn_monitor_v2_bsn_align_output_cipo : OUT t_mem_cipo;
reg_bsn_monitor_v2_bst_offload_copi : IN t_mem_copi := c_mem_copi_rst;
reg_bsn_monitor_v2_bst_offload_cipo : OUT t_mem_cipo;
reg_bsn_monitor_v2_beamlet_output_copi : IN t_mem_copi := c_mem_copi_rst;
......@@ -169,8 +177,27 @@ BEGIN
---------------------------------------------------------------
-- Remote BF
---------------------------------------------------------------
-- Not yet implemented
bf_sum_sosi <= local_bf_sosi;
u_sdp_beamformer_remote : ENTITY work.sdp_beamformer_remote
PORT MAP (
dp_rst => dp_rst,
dp_clk => dp_clk,
mm_rst => mm_rst,
mm_clk => mm_clk,
local_bf_sosi => local_bf_sosi,
from_ri_sosi => from_ri_sosi,
to_ri_sosi => to_ri_sosi,
bf_sum_sosi => bf_sum_sosi,
reg_bsn_align_copi => reg_bsn_align_copi,
reg_bsn_align_cipo => reg_bsn_align_cipo,
reg_bsn_monitor_v2_bsn_align_input_copi => reg_bsn_monitor_v2_bsn_align_input_copi,
reg_bsn_monitor_v2_bsn_align_input_cipo => reg_bsn_monitor_v2_bsn_align_input_cipo,
reg_bsn_monitor_v2_bsn_align_output_copi => reg_bsn_monitor_v2_bsn_align_output_copi,
reg_bsn_monitor_v2_bsn_align_output_cipo => reg_bsn_monitor_v2_bsn_align_output_cipo
);
---------------------------------------------------------------
-- Scale Beamlets
......@@ -260,7 +287,7 @@ BEGIN
-- Streaming clock domain
dp_rst => dp_rst,
dp_clk => dp_clk,
ref_sync => mon_bf_udp_sosi.sync, -- using in_sosi sync instead of udp_sosi as it has no sync.
ref_sync => mon_bf_udp_sosi.sync,
in_sosi_arr(0) => mon_bf_udp_sosi
);
......
applications/lofar2/libraries/sdp/src/vhdl/sdp_beamformer_remote.vhd
+ 44
− 55
View file @ 09cc1ed7
......@@ -22,10 +22,9 @@
--
-- Author: R. van der Walle
-- Purpose:
-- . Implements the functionality of beamformer_local in node_sdp_beamformer.
-- . Implements the functionality of beamformer_remote in node_sdp_beamformer.
-- Description:
-- The local BF function weights the subbands from the S_pn signal inputs and
-- adds them to form the local beamlet sum.
-- The remote BF function adds the local and remote sums.
-- Remark:
-- .
-------------------------------------------------------------------------------
......@@ -38,21 +37,26 @@ USE dp_lib.dp_stream_pkg.ALL;
USE work.sdp_pkg.ALL;
ENTITY sdp_beamformer_remote IS
GENERIC (
g_bf_weights_file_name : STRING := "UNUSED"
);
PORT (
dp_clk : IN STD_LOGIC;
dp_rst : IN STD_LOGIC;
in_sosi_arr : IN t_dp_sosi_arr(c_sdp_P_pfb-1 DOWNTO 0);
out_sosi : OUT t_dp_sosi;
local_bf_sosi : IN t_dp_sosi;
from_ri_sosi : IN t_dp_sosi;
to_ri_sosi : OUT t_dp_sosi;
bf_sum_sosi : OUT t_dp_sosi;
mm_rst : IN STD_LOGIC;
mm_clk : IN STD_LOGIC;
ram_bf_weights_mosi : IN t_mem_mosi := c_mem_mosi_rst;
ram_bf_weights_miso : OUT t_mem_miso
reg_bsn_align_copi : IN t_mem_copi := c_mem_copi_rst;
reg_bsn_align_cipo : OUT t_mem_cipo;
reg_bsn_monitor_v2_bsn_align_input_copi : IN t_mem_copi := c_mem_copi_rst;
reg_bsn_monitor_v2_bsn_align_input_cipo : OUT t_mem_cipo;
reg_bsn_monitor_v2_bsn_align_output_copi : IN t_mem_copi := c_mem_copi_rst;
reg_bsn_monitor_v2_bsn_align_output_cipo : OUT t_mem_cipo
);
END sdp_beamformer_remote;
......@@ -61,34 +65,21 @@ ARCHITECTURE str OF sdp_beamformer_remote IS
CONSTANT c_data_w : NATURAL := c_nof_complex * c_sdp_W_beamlet_sum;
CONSTANT c_block_size : NATURAL := c_sdp_S_sub_bf * c_sdp_N_pol_bf;
CONSTANT c_fifo_size : NATURAL := 2** ceil_log2((c_block_size * 9) / 16); -- 1 block of 64 bit words rounded to the next power of 2 = 1024.
CONSTANT c_complex_adder_latency : NATURAL := ceil_log2(c_sdp_S_pn);
CONSTANT c_bf_weights_latency : NATURAL := 3;
CONSTANT c_total_latency : NATURAL := 4 + c_bf_weights_latency + c_complex_adder_latency;
CONSTANT c_complex_adder_sum_w : NATURAL := c_sdp_W_bf_product + ceil_log2(c_sdp_S_pn);
SIGNAL sub_sosi_arr : t_dp_sosi_arr(c_sdp_N_pol_bf*c_sdp_P_pfb-1 DOWNTO 0) := (OTHERS => c_dp_sosi_rst);
SIGNAL bf_weights_out_sosi_arr : t_dp_sosi_arr(c_sdp_N_pol_bf*c_sdp_P_pfb-1 DOWNTO 0) := (OTHERS => c_dp_sosi_rst);
SIGNAL bf_weights_x_sosi_arr : t_dp_sosi_arr(c_sdp_P_pfb-1 DOWNTO 0) := (OTHERS => c_dp_sosi_rst);
SIGNAL bf_weights_y_sosi_arr : t_dp_sosi_arr(c_sdp_P_pfb-1 DOWNTO 0) := (OTHERS => c_dp_sosi_rst);
SIGNAL deinterleaved_x_sosi_arr : t_dp_sosi_arr(c_sdp_S_pn-1 DOWNTO 0) := (OTHERS => c_dp_sosi_rst);
SIGNAL deinterleaved_y_sosi_arr : t_dp_sosi_arr(c_sdp_S_pn-1 DOWNTO 0) := (OTHERS => c_dp_sosi_rst);
SIGNAL interleave_out_sosi_arr : t_dp_sosi_arr(c_sdp_S_pn-1 DOWNTO 0) := (OTHERS => c_dp_sosi_rst);
SIGNAL complex_add_out_sosi : t_dp_sosi := c_dp_sosi_rst;
SIGNAL pipelined_in_sosi : t_dp_sosi := c_dp_sosi_rst;
SIGNAL dp_requantize_in_sosi : t_dp_sosi := c_dp_sosi_rst;
SIGNAL dispatch_sosi_arr : t_dp_sosi_arr(1 DOWNTO 0) := (OTHERS => c_dp_sosi_rst); -- 1 for local, 1 for remote.
SIGNAL dp_fifo_sosi : t_dp_sosi := c_dp_sosi_rst;
SIGNAL dp_fifo_siso : t_dp_siso := c_dp_siso_rdy;
SIGNAL beamlets_data_sosi_arr : t_dp_sosi_arr(1 DOWNTO 0) := (OTHERS => c_dp_sosi_rst);
SIGNAL beamlets_sosi_arr : t_dp_sosi_arr(1 DOWNTO 0) := (OTHERS => c_dp_sosi_rst);
SIGNAL i_bf_sum_sosi : t_dp_sosi := c_dp_sosi_rst;
SIGNAL bf_sum_data_sosi : t_dp_sosi := c_dp_sosi_rst;
BEGIN
dispatch_sosi_arr(0) <= local_bf_sosi;
-- repacking beamlets re/im to data field.
p_wire_local_bf_sosi : PROCESS(local_bf_sosi)
BEGIN
dispatch_sosi_arr(0) <= local_bf_sosi;
dispatch_sosi_arr(0).data(c_sdp_W_beamlet_sum -1 DOWNTO 0) <= local_bf_sosi.re(c_sdp_W_beamlet_sum-1 DOWNTO 0);
dispatch_sosi_arr(0).data(c_nof_complex * c_sdp_W_beamlet_sum -1 DOWNTO c_sdp_W_beamlet_sum) <= local_bf_sosi.im(c_sdp_W_beamlet_sum-1 DOWNTO 0);
dispatch_sosi_arr(0).data(c_data_w -1 DOWNTO c_sdp_W_beamlet_sum) <= local_bf_sosi.im(c_sdp_W_beamlet_sum-1 DOWNTO 0);
END PROCESS;
---------------------------------------------------------------
......@@ -120,7 +111,7 @@ BEGIN
g_in_nof_words => 9,
g_out_dat_w => c_data_w,
g_out_nof_words => 16,
g_pipeline_ready => TRUE -- Needed for src_in.ready to snk_out.ready.
g_pipeline_ready => TRUE
)
PORT MAP (
rst => dp_rst,
......@@ -178,12 +169,11 @@ BEGIN
beamlets_sosi_arr(0) <= beamlets_data_sosi_arr(0);
beamlets_sosi_arr(1) <= beamlets_data_sosi_arr(1);
beamlets_sosi_arr(0).re(c_sdp_W_beamlet_sum-1 DOWNTO 0) <= beamlets_data_sosi_arr(0).data(c_sdp_W_beamlet_sum -1 DOWNTO 0);
beamlets_sosi_arr(0).im(c_sdp_W_beamlet_sum-1 DOWNTO 0) <= beamlets_data_sosi_arr(0).data(c_nof_complex * c_sdp_W_beamlet_sum -1 DOWNTO c_sdp_W_beamlet_sum);
beamlets_sosi_arr(0).im(c_sdp_W_beamlet_sum-1 DOWNTO 0) <= beamlets_data_sosi_arr(0).data( c_data_w -1 DOWNTO c_sdp_W_beamlet_sum);
beamlets_sosi_arr(1).re(c_sdp_W_beamlet_sum-1 DOWNTO 0) <= beamlets_data_sosi_arr(1).data(c_sdp_W_beamlet_sum -1 DOWNTO 0);
beamlets_sosi_arr(1).im(c_sdp_W_beamlet_sum-1 DOWNTO 0) <= beamlets_data_sosi_arr(1).data(c_nof_complex * c_sdp_W_beamlet_sum -1 DOWNTO c_sdp_W_beamlet_sum);
beamlets_sosi_arr(1).im(c_sdp_W_beamlet_sum-1 DOWNTO 0) <= beamlets_data_sosi_arr(1).data( c_data_w -1 DOWNTO c_sdp_W_beamlet_sum);
END PROCESS;
---------------------------------------------------------------
-- ADD
---------------------------------------------------------------
......@@ -201,15 +191,16 @@ BEGIN
);
bf_sum_sosi <= i_bf_sum_sosi;
---------------------------------------------------------------
-- Repack 36b to 64b
---------------------------------------------------------------
-- repacking xsel re/im to data field.
p_wire_xsel_sosi : PROCESS(xsel_sosi)
-- repacking bf_sum re/im to data field.
p_wire_bf_sum_sosi : PROCESS(i_bf_sum_sosi)
BEGIN
xsel_data_sosi <= xsel_sosi;
xsel_data_sosi.data( c_sdp_W_crosslet -1 DOWNTO 0) <= xsel_sosi.re(c_sdp_W_crosslet-1 DOWNTO 0);
xsel_data_sosi.data(c_nof_complex * c_sdp_W_crosslet -1 DOWNTO c_sdp_W_crosslet) <= xsel_sosi.im(c_sdp_W_crosslet-1 DOWNTO 0);
bf_sum_data_sosi <= i_bf_sum_sosi;
bf_sum_data_sosi.data(c_sdp_W_beamlet_sum -1 DOWNTO 0) <= i_bf_sum_sosi.re(c_sdp_W_beamlet_sum-1 DOWNTO 0);
bf_sum_data_sosi.data( c_data_w -1 DOWNTO c_sdp_W_beamlet_sum) <= i_bf_sum_sosi.im(c_sdp_W_beamlet_sum-1 DOWNTO 0);
END PROCESS;
u_dp_repack_data_local : ENTITY dp_lib.dp_repack_data
......@@ -218,16 +209,14 @@ BEGIN
g_in_nof_words => 16,
g_out_dat_w => c_longword_w,
g_out_nof_words => 9,
g_pipeline_ready => TRUE -- Needed for src_in.ready to snk_out.ready.
g_pipeline_ready => TRUE
)
PORT MAP (
rst => dp_rst,
clk => dp_clk,
snk_in => i_bf_sum_sosi,
src_out => to_ri_sosi_sosi
snk_in => bf_sum_data_sosi,
src_out => to_ri_sosi
);
END str;
applications/lofar2/libraries/sdp/src/vhdl/sdp_pkg.vhd
+ 21
− 13
View file @ 09cc1ed7
......@@ -452,6 +452,14 @@ PACKAGE sdp_pkg is
CONSTANT c_sdp_reg_stat_hdr_dat_bst_addr_w : NATURAL := ceil_log2(c_sdp_N_beamsets) + c_sdp_reg_stat_hdr_dat_addr_w;
CONSTANT c_sdp_reg_bsn_monitor_v2_bst_offload_addr_w : NATURAL := ceil_log2(c_sdp_N_beamsets) + c_sdp_reg_bsn_monitor_v2_addr_w;
CONSTANT c_sdp_reg_bsn_monitor_v2_beamlet_output_addr_w : NATURAL := ceil_log2(c_sdp_N_beamsets) + c_sdp_reg_bsn_monitor_v2_addr_w;
CONSTANT c_sdp_reg_bsn_align_v2_bf_addr_w : NATURAL := ceil_log2(c_sdp_N_beamsets) + ceil_log2(2*2);
CONSTANT c_sdp_reg_bsn_monitor_v2_rx_align_bf_addr_w : NATURAL := ceil_log2(c_sdp_N_beamsets) + ceil_log2(2) + c_sdp_reg_bsn_monitor_v2_addr_w;
CONSTANT c_sdp_reg_bsn_monitor_v2_aligned_bf_addr_w : NATURAL := ceil_log2(c_sdp_N_beamsets) + c_sdp_reg_bsn_monitor_v2_addr_w;
CONSTANT c_sdp_reg_ring_lane_info_bf_addr_w : NATURAL := ceil_log2(c_sdp_N_beamsets) + 1;
CONSTANT c_sdp_reg_bsn_monitor_v2_ring_rx_bf_addr_w : NATURAL := ceil_log2(c_sdp_N_beamsets) + ceil_log2(c_sdp_N_pn_max) + c_sdp_reg_bsn_monitor_v2_addr_w;
CONSTANT c_sdp_reg_bsn_monitor_v2_ring_tx_bf_addr_w : NATURAL := ceil_log2(c_sdp_N_beamsets) + ceil_log2(c_sdp_N_pn_max) + c_sdp_reg_bsn_monitor_v2_addr_w;
CONSTANT c_sdp_reg_dp_block_validate_err_bf_addr_w : NATURAL := ceil_log2(c_sdp_N_beamsets) + 4;
CONSTANT c_sdp_reg_dp_block_validate_bsn_at_sync_bf_addr_w : NATURAL := ceil_log2(c_sdp_N_beamsets) + 2;
-- XSUB
CONSTANT c_sdp_crosslets_index_w : NATURAL := ceil_log2(c_sdp_N_sub);
......@@ -483,9 +491,9 @@ PACKAGE sdp_pkg is
CONSTANT c_sdp_reg_bsn_sync_scheduler_xsub_addr_w : NATURAL := 4;
CONSTANT c_sdp_ram_st_xsq_addr_w : NATURAL := ceil_log2(c_sdp_N_crosslets_max * c_sdp_X_sq * c_nof_complex * c_sdp_W_statistic_sz);
CONSTANT c_sdp_ram_st_xsq_arr_addr_w : NATURAL := ceil_log2(c_sdp_P_sq) + c_sdp_ram_st_xsq_addr_w;
CONSTANT c_sdp_reg_bsn_align_v2_addr_w : NATURAL := ceil_log2(2*c_sdp_P_sq);
CONSTANT c_sdp_reg_bsn_monitor_v2_bsn_align_v2_input_addr_w : NATURAL := ceil_log2(c_sdp_P_sq) + c_sdp_reg_bsn_monitor_v2_addr_w;
CONSTANT c_sdp_reg_bsn_monitor_v2_bsn_align_v2_output_addr_w : NATURAL := c_sdp_reg_bsn_monitor_v2_addr_w;
CONSTANT c_sdp_reg_bsn_align_v2_xsub_addr_w : NATURAL := ceil_log2(2*c_sdp_P_sq);
CONSTANT c_sdp_reg_bsn_monitor_v2_rx_align_xsub_addr_w : NATURAL := ceil_log2(c_sdp_P_sq) + c_sdp_reg_bsn_monitor_v2_addr_w;
CONSTANT c_sdp_reg_bsn_monitor_v2_aligned_xsub_addr_w : NATURAL := c_sdp_reg_bsn_monitor_v2_addr_w;
CONSTANT c_sdp_reg_bsn_monitor_v2_xst_offload_addr_w : NATURAL := c_sdp_reg_bsn_monitor_v2_addr_w;
CONSTANT c_sdp_reg_ring_lane_info_xst_addr_w : NATURAL := 1;
CONSTANT c_sdp_reg_bsn_monitor_v2_ring_rx_xst_addr_w : NATURAL := ceil_log2(c_sdp_N_pn_max) + c_sdp_reg_bsn_monitor_v2_addr_w;
......
applications/lofar2/libraries/sdp/src/vhdl/sdp_station.vhd
+ 414
− 185
View file @ 09cc1ed7
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