Added dedicated reg_mem constant

libraries/base/dp/src/vhdl/dp_selector_arr.vhd

@@ -61,8 +61,9 @@ ENTITY dp_selector_arr IS
 END dp_selector_arr;
 
 ARCHITECTURE str OF dp_selector_arr IS
+  CONSTANT c_selector_mem_reg : t_c_mem := (c_mem_reg_rd_latency, 1, 1, 1, '0');
 
-  SIGNAL reg_selector_en : STD_LOGIC_VECTOR(c_mem_reg.dat_w*c_mem_reg.nof_dat-1 DOWNTO 0);
+  SIGNAL reg_selector_en : STD_LOGIC_VECTOR(c_selector_mem_reg.dat_w*c_selector_mem_reg.nof_dat-1 DOWNTO 0);
   SIGNAL n_en            : STD_LOGIC;
   SIGNAL switch_select   : STD_LOGIC;
 
@@ -73,7 +74,7 @@ BEGIN
 
   u_mms_common_reg : ENTITY common_lib.mms_common_reg
   GENERIC MAP (
-    g_mm_reg       => c_mem_reg
+    g_mm_reg       => c_selector_mem_reg
   )
   PORT MAP (
     mm_rst         => mm_rst,