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fpga_sense.vhd

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    fpga_sense.vhd 6.76 KiB
    -------------------------------------------------------------------------------
    --
    -- Copyright (C) 2015
    -- ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
    -- P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
    --
    -- This program is free software: you can redistribute it and/or modify
    -- it under the terms of the GNU General Public License as published by
    -- the Free Software Foundation, either version 3 of the License, or
    -- (at your option) any later version.
    --
    -- This program is distributed in the hope that it will be useful,
    -- but WITHOUT ANY WARRANTY; without even the implied warranty of
    -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    -- GNU General Public License for more details.
    --
    -- You should have received a copy of the GNU General Public License
    -- along with this program.  If not, see <http://www.gnu.org/licenses/>.
    --
    -------------------------------------------------------------------------------
    
    -- Purpose:
    -- Description:
    --  
    
    
    LIBRARY IEEE, common_lib, technology_lib, tech_fpga_temp_sens_lib, tech_fpga_voltage_sens_lib;
    USE IEEE.std_logic_1164.ALL;
    USE IEEE.numeric_std.ALL;
    USE common_lib.common_pkg.ALL;
    USE common_lib.common_mem_pkg.ALL;
    USE technology_lib.technology_select_pkg.ALL;
    USE technology_lib.technology_pkg.ALL;
    --USE tech_temp_sense_lib.tech_temp_sense_component_pkg.ALL;
    
    
    ENTITY fpga_sense IS
      GENERIC (
        g_technology     : NATURAL := c_tech_select_default;
        g_sim            : BOOLEAN
      );
      PORT (
        -- MM interface
        mm_rst      : IN  STD_LOGIC;
        mm_clk      : IN  STD_LOGIC;
    
        start_sense : IN  STD_LOGIC;
        
        reg_temp_mosi          : IN  t_mem_mosi := c_mem_mosi_rst;
        reg_temp_miso          : OUT t_mem_miso;
    
        reg_voltage_store_mosi : IN  t_mem_mosi := c_mem_mosi_rst;
        reg_voltage_store_miso : OUT t_mem_miso
      );
    END fpga_sense;
    
    
    ARCHITECTURE str OF fpga_sense IS
    
      -- constants for the temperature sensor	
      CONSTANT c_mem_reg_temp_adr_w     : NATURAL := 1;
      CONSTANT c_mem_reg_temp_dat_w     : NATURAL := 32;
      CONSTANT c_mem_reg_temp_nof_data  : NATURAL := 1;
      CONSTANT c_mem_reg_temp_data : t_c_mem := (c_mem_reg_rd_latency, c_mem_reg_temp_adr_w , c_mem_reg_temp_dat_w , c_mem_reg_temp_nof_data, 'X');
    
      -- constants for the voltage sensor	
      CONSTANT c_mem_reg_voltage_adr_w     : NATURAL := 1;
      CONSTANT c_mem_reg_voltage_dat_w     : NATURAL := 32;
      CONSTANT c_mem_reg_voltage_nof_data  : NATURAL := 1;
      CONSTANT c_mem_reg_voltage_data : t_c_mem := (c_mem_reg_rd_latency, c_mem_reg_voltage_adr_w , c_mem_reg_voltage_dat_w , c_mem_reg_voltage_nof_data, 'X');