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Commit c49467ce authored by Jan David Mol's avatar Jan David Mol
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Merge branch '2021-05-10-Branched_from_master-SDP_update' into 'master' 

Resolve #2021 "05 10 branched from master sdp update"

See merge request !28
parents 0aa7163f 6e616368
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1 merge request!28Resolve #2021 "05 10 branched from master sdp update"
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CDB/thijs_ConfigDb.json
+ 34
− 2
View file @ c49467ce
...@@ -19,7 +19,13 @@ ...@@ -19,7 +19,13 @@
"LTS/SDP/1": { "LTS/SDP/1": {
"properties": { "properties": {
"OPC_Server_Name": [ "OPC_Server_Name": [
"host.docker.internal" "dop36.astron.nl"
],
"OPC_Server_Port": [
"4840"
],
"OPC_Time_Out": [
"5.0"
] ]
} }
} }
...@@ -68,7 +74,33 @@ ...@@ -68,7 +74,33 @@
"host.docker.internal" "host.docker.internal"
], ],
"OPC_Server_Port": [ "OPC_Server_Port": [
"4842" "4844"
],
"OPC_Time_Out": [
"5.0"
]
}
}
}
}
},
"APSCTL": {
"1": {
"APSCTL": {
"LTS/APSCTL/1": {
"attribute_properties": {
"Ant_mask_RW": {
"archive_period": [
"600000"
]
}
},
"properties": {
"OPC_Server_Name": [
"ltspi.astron.nl"
],
"OPC_Server_Port": [
"4844"
], ],
"OPC_Time_Out": [ "OPC_Time_Out": [
"5.0" "5.0"
......
devices/SDP.py
+ 34
− 31
View file @ c49467ce
...@@ -64,36 +64,40 @@ class SDP(hardware_device): ...@@ -64,36 +64,40 @@ class SDP(hardware_device):
# ---------- # ----------
# Attributes # Attributes
# ---------- # ----------
fpga_mask_RW = attribute_wrapper(comms_annotation=["1:fpga_mask_RW"], datatype=numpy.bool_, dims=(16,), access=AttrWriteType.READ_WRITE) fpga_mask_RW = attribute_wrapper(comms_annotation=["2:fpga_mask_RW"], datatype=numpy.bool_, dims=(16,), access=AttrWriteType.READ_WRITE)
fpga_scrap_R = attribute_wrapper(comms_annotation=["1:fpga_scrap_R"], datatype=numpy.int32, dims=(2048,)) fpga_scrap_R = attribute_wrapper(comms_annotation=["2:fpga_scrap_R"], datatype=numpy.int32, dims=(2048,))
fpga_scrap_RW = attribute_wrapper(comms_annotation=["1:fpga_scrap_RW"], datatype=numpy.int32, dims=(2048,), access=AttrWriteType.READ_WRITE) fpga_scrap_RW = attribute_wrapper(comms_annotation=["2:fpga_scrap_RW"], datatype=numpy.int32, dims=(2048,), access=AttrWriteType.READ_WRITE)
fpga_status_R = attribute_wrapper(comms_annotation=["1:fpga_status_R"], datatype=numpy.bool_, dims=(16,)) fpga_status_R = attribute_wrapper(comms_annotation=["2:fpga_status_R"], datatype=numpy.bool_, dims=(16,))
fpga_temp_R = attribute_wrapper(comms_annotation=["1:fpga_temp_R"], datatype=numpy.float_, dims=(16,)) fpga_temp_R = attribute_wrapper(comms_annotation=["2:fpga_temp_R"], datatype=numpy.float_, dims=(16,))
fpga_version_R = attribute_wrapper(comms_annotation=["1:fpga_version_R"], datatype=numpy.str_, dims=(16,)) fpga_version_R = attribute_wrapper(comms_annotation=["2:fpga_version_R"], datatype=numpy.str_, dims=(16,))
fpga_weights_R = attribute_wrapper(comms_annotation=["1:fpga_weights_R"], datatype=numpy.int16, dims=(16, 12 * 488 * 2)) fpga_weights_R = attribute_wrapper(comms_annotation=["2:fpga_weights_R"], datatype=numpy.int16, dims=(16, 12 * 488 * 2))
fpga_weights_RW = attribute_wrapper(comms_annotation=["1:fpga_weights_RW"], datatype=numpy.int16, dims=(16, 12 * 488 * 2), access=AttrWriteType.READ_WRITE) fpga_weights_RW = attribute_wrapper(comms_annotation=["2:fpga_weights_RW"], datatype=numpy.int16, dims=(16, 12 * 488 * 2), access=AttrWriteType.READ_WRITE)
fpga_processing_enable_RW = attribute_wrapper(comms_annotation=["1:fpga_processing_enable_RW"], datatype=numpy.bool_, dims=(16,), access=AttrWriteType.READ_WRITE) fpga_processing_enable_RW = attribute_wrapper(comms_annotation=["2:fpga_processing_enable_RW"], datatype=numpy.bool_, dims=(16,), access=AttrWriteType.READ_WRITE)
fpga_processing_enable_R = attribute_wrapper(comms_annotation=["1:fpga_processing_enable_R"], datatype=numpy.bool_, dims=(16,)) fpga_processing_enable_R = attribute_wrapper(comms_annotation=["2:fpga_processing_enable_R"], datatype=numpy.bool_, dims=(16,))
fpga_sst_offload_enable_RW = attribute_wrapper(comms_annotation=["1:fpga_sst_offload_enable_RW"], datatype=numpy.bool_, dims=(16,), access=AttrWriteType.READ_WRITE) fpga_sst_offload_enable_RW = attribute_wrapper(comms_annotation=["2:fpga_sst_offload_enable_RW"], datatype=numpy.bool_, dims=(16,), access=AttrWriteType.READ_WRITE)
fpga_sst_offload_enable_R = attribute_wrapper(comms_annotation=["1:fpga_sst_offload_enable_R"], datatype=numpy.bool_, dims=(16,)) fpga_sst_offload_enable_R = attribute_wrapper(comms_annotation=["2:fpga_sst_offload_enable_R"], datatype=numpy.bool_, dims=(16,))
fpga_sst_offload_dest_mac_RW = attribute_wrapper(comms_annotation=["1:fpga_sst_offload_dest_mac_RW"], datatype=numpy.str_, dims=(16,), access=AttrWriteType.READ_WRITE) fpga_sst_offload_dest_mac_RW = attribute_wrapper(comms_annotation=["2:fpga_sst_offload_dest_mac_RW"], datatype=numpy.str_, dims=(16,), access=AttrWriteType.READ_WRITE)
fpga_sst_offload_dest_mac_R = attribute_wrapper(comms_annotation=["1:fpga_sst_offload_dest_mac_R"], datatype=numpy.str_, dims=(16,)) fpga_sst_offload_dest_mac_R = attribute_wrapper(comms_annotation=["2:fpga_sst_offload_dest_mac_R"], datatype=numpy.str_, dims=(16,))
fpga_sst_offload_dest_ip_RW = attribute_wrapper(comms_annotation=["1:fpga_sst_offload_dest_ip_RW"], datatype=numpy.str_, dims=(16,), access=AttrWriteType.READ_WRITE) fpga_sst_offload_dest_ip_RW = attribute_wrapper(comms_annotation=["2:fpga_sst_offload_dest_ip_RW"], datatype=numpy.str_, dims=(16,), access=AttrWriteType.READ_WRITE)
fpga_sst_offload_dest_ip_R = attribute_wrapper(comms_annotation=["1:fpga_sst_offload_dest_ip_R"], datatype=numpy.str_, dims=(16,)) fpga_sst_offload_dest_ip_R = attribute_wrapper(comms_annotation=["2:fpga_sst_offload_dest_ip_R"], datatype=numpy.str_, dims=(16,))
fpga_sst_offload_dest_port_RW = attribute_wrapper(comms_annotation=["1:fpga_sst_offload_dest_port_RW"], datatype=numpy.uint16, dims=(16,), access=AttrWriteType.READ_WRITE) fpga_sst_offload_dest_port_RW = attribute_wrapper(comms_annotation=["2:fpga_sst_offload_dest_port_RW"], datatype=numpy.uint16, dims=(16,), access=AttrWriteType.READ_WRITE)
fpga_sst_offload_dest_port_R = attribute_wrapper(comms_annotation=["1:fpga_sst_offload_dest_port_R"], datatype=numpy.uint16, dims=(16,)) fpga_sst_offload_dest_port_R = attribute_wrapper(comms_annotation=["2:fpga_sst_offload_dest_port_R"], datatype=numpy.uint16, dims=(16,))
fpga_sdp_info_station_id_RW = attribute_wrapper(comms_annotation=["1:fpga_sdp_info_station_id_RW"], datatype=numpy.uint16, dims=(16,), access=AttrWriteType.READ_WRITE) fpga_sdp_info_station_id_RW = attribute_wrapper(comms_annotation=["2:fpga_sdp_info_station_id_RW"], datatype=numpy.uint16, dims=(16,), access=AttrWriteType.READ_WRITE)
fpga_sdp_info_station_id_R = attribute_wrapper(comms_annotation=["1:fpga_sdp_info_station_id_R"], datatype=numpy.uint16, dims=(16,)) fpga_sdp_info_station_id_R = attribute_wrapper(comms_annotation=["2:fpga_sdp_info_station_id_R"], datatype=numpy.uint16, dims=(16,))
fpga_sdp_info_observation_id_RW = attribute_wrapper(comms_annotation=["1:fpga_sdp_info_observation_id_RW"], datatype=numpy.uint32, dims=(16,), access=AttrWriteType.READ_WRITE) fpga_sdp_info_observation_id_RW = attribute_wrapper(comms_annotation=["2:fpga_sdp_info_observation_id_RW"], datatype=numpy.uint32, dims=(16,), access=AttrWriteType.READ_WRITE)
fpga_sdp_info_observation_id_R = attribute_wrapper(comms_annotation=["1:fpga_sdp_info_observation_id_R"], datatype=numpy.uint32, dims=(16,)) fpga_sdp_info_observation_id_R = attribute_wrapper(comms_annotation=["2:fpga_sdp_info_observation_id_R"], datatype=numpy.uint32, dims=(16,))
fpga_sdp_info_source_id_RW = attribute_wrapper(comms_annotation=["1:fpga_sdp_info_source_id_RW"], datatype=numpy.uint16, dims=(16,), access=AttrWriteType.READ_WRITE) fpga_sdp_info_source_id_RW = attribute_wrapper(comms_annotation=["2:fpga_sdp_info_source_id_RW"], datatype=numpy.uint16, dims=(16,), access=AttrWriteType.READ_WRITE)
fpga_sdp_info_source_id_R = attribute_wrapper(comms_annotation=["1:fpga_sdp_info_source_id_R"], datatype=numpy.uint16, dims=(16,)) fpga_sdp_info_source_id_R = attribute_wrapper(comms_annotation=["2:fpga_sdp_info_source_id_R"], datatype=numpy.uint16, dims=(16,))
tr_busy_R = attribute_wrapper(comms_annotation=["1:tr_busy_R"], datatype=numpy.bool_) tr_busy_R = attribute_wrapper(comms_annotation=["2:tr_busy_R"], datatype=numpy.bool_)
# NOTE: typo in node name is 'tr_reload_W' should be 'tr_reload_RW' tr_reload_RW = attribute_wrapper(comms_annotation=["2:tr_reload_RW"], datatype=numpy.bool_, access=AttrWriteType.READ_WRITE)
tr_reload_RW = attribute_wrapper(comms_annotation=["1:tr_reload_W"], datatype=numpy.bool_, access=AttrWriteType.READ_WRITE) tr_tod_R = attribute_wrapper(comms_annotation=["2:tr_tod_R"], datatype=numpy.uint64)
tr_tod_R = attribute_wrapper(comms_annotation=["1:tr_tod_R"], datatype=numpy.uint64) tr_uptime_R = attribute_wrapper(comms_annotation=["2:tr_uptime_R"], datatype=numpy.uint64)
tr_uptime_R = attribute_wrapper(comms_annotation=["1:tr_uptime_R"], datatype=numpy.uint64)
fpga_firmware_version_R = attribute_wrapper(comms_annotation=["2:fpga_firmware_version_R"], datatype=numpy.str_, dims=(16,))
fpga_hardware_version_R = attribute_wrapper(comms_annotation=["2:fpga_hardware_version_R"], datatype=numpy.str_, dims=(16,))
tr_software_version_R = attribute_wrapper(comms_annotation=["2:tr_software_version_R"], datatype=numpy.str_)
def always_executed_hook(self): def always_executed_hook(self):
"""Method always executed before any TANGO command is executed.""" """Method always executed before any TANGO command is executed."""
...@@ -150,4 +154,3 @@ def main(args=None, **kwargs): ...@@ -150,4 +154,3 @@ def main(args=None, **kwargs):
if __name__ == '__main__': if __name__ == '__main__':
main() main()
devices/clients/opcua_connection.py
+ 7
− 1
View file @ c49467ce
...@@ -51,6 +51,7 @@ class OPCUAConnection(CommClient): ...@@ -51,6 +51,7 @@ class OPCUAConnection(CommClient):
fault_func() fault_func()
return return
# determine namespace used # determine namespace used
try: try:
if type(namespace) is str: if type(namespace) is str:
...@@ -64,6 +65,7 @@ class OPCUAConnection(CommClient): ...@@ -64,6 +65,7 @@ class OPCUAConnection(CommClient):
self.name_space_index = 2 self.name_space_index = 2
self.obj = self.client.get_objects_node() self.obj = self.client.get_objects_node()
self.check_nodes()
def _servername(self): def _servername(self):
return self.client.server_url.geturl() return self.client.server_url.geturl()
...@@ -196,7 +198,9 @@ class ProtocolAttribute: ...@@ -196,7 +198,9 @@ class ProtocolAttribute:
""" """
value = numpy.array(self.node.get_value()) value = numpy.array(self.node.get_value())
if self.dim_y != 0: if self.dim_y + self.dim_x == 1:
return numpy.array([value])
elif self.dim_y != 0:
value = numpy.array(numpy.split(value, indices_or_sections=self.dim_y)) value = numpy.array(numpy.split(value, indices_or_sections=self.dim_y))
elif self.dim_y + self.dim_x == 1: elif self.dim_y + self.dim_x == 1:
value = [numpy.array(value)] value = [numpy.array(value)]
...@@ -205,6 +209,8 @@ class ProtocolAttribute: ...@@ -205,6 +209,8 @@ class ProtocolAttribute:
return value return value
def write_function(self, value): def write_function(self, value):
""" """
write_RW function write_RW function
......
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