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Commit bc2acc96 authored by Jan David Mol's avatar Jan David Mol
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L2SS-358: Added IP of DTS:eno2 interface

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CDB/stations/DTS_ConfigDb.json
+ 32
− 32
View file @ bc2acc96
...@@ -127,22 +127,22 @@ ...@@ -127,22 +127,22 @@
"0c:c4:7a:c0:30:f1" "0c:c4:7a:c0:30:f1"
], ],
"FPGA_sst_offload_hdr_ip_destination_address_RW_default": [ "FPGA_sst_offload_hdr_ip_destination_address_RW_default": [
"10.99.250.250", "10.99.0.1",
"10.99.250.250", "10.99.0.1",
"10.99.250.250", "10.99.0.1",
"10.99.250.250", "10.99.0.1",
"10.99.250.250", "10.99.0.1",
"10.99.250.250", "10.99.0.1",
"10.99.250.250", "10.99.0.1",
"10.99.250.250", "10.99.0.1",
"10.99.250.250", "10.99.0.1",
"10.99.250.250", "10.99.0.1",
"10.99.250.250", "10.99.0.1",
"10.99.250.250", "10.99.0.1",
"10.99.250.250", "10.99.0.1",
"10.99.250.250", "10.99.0.1",
"10.99.250.250", "10.99.0.1",
"10.99.250.250" "10.99.0.1"
] ]
} }
} }
...@@ -182,22 +182,22 @@ ...@@ -182,22 +182,22 @@
"0c:c4:7a:c0:30:f1" "0c:c4:7a:c0:30:f1"
], ],
"FPGA_xst_offload_hdr_ip_destination_address_RW_default": [ "FPGA_xst_offload_hdr_ip_destination_address_RW_default": [
"10.99.250.250", "10.99.0.1",
"10.99.250.250", "10.99.0.1",
"10.99.250.250", "10.99.0.1",
"10.99.250.250", "10.99.0.1",
"10.99.250.250", "10.99.0.1",
"10.99.250.250", "10.99.0.1",
"10.99.250.250", "10.99.0.1",
"10.99.250.250", "10.99.0.1",
"10.99.250.250", "10.99.0.1",
"10.99.250.250", "10.99.0.1",
"10.99.250.250", "10.99.0.1",
"10.99.250.250", "10.99.0.1",
"10.99.250.250", "10.99.0.1",
"10.99.250.250", "10.99.0.1",
"10.99.250.250", "10.99.0.1",
"10.99.250.250" "10.99.0.1"
] ]
} }
} }
......
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