L2SS-202: Added SDP datapoints for SST offload processing & output

devices/SDP.py

@@ -72,6 +72,23 @@ class SDP(hardware_device):
     fpga_version_R = attribute_wrapper(comms_annotation=["1:fpga_version_R"], datatype=numpy.str_, dims=(16,))
     fpga_weights_R = attribute_wrapper(comms_annotation=["1:fpga_weights_R"], datatype=numpy.int16, dims=(16, 12 * 488 * 2))
     fpga_weights_RW = attribute_wrapper(comms_annotation=["1:fpga_weights_RW"], datatype=numpy.int16, dims=(16, 12 * 488 * 2), access=AttrWriteType.READ_WRITE)
+    fpga_processing_enable_RW = attribute_wrapper(comms_annotation=["1:fpga_processing_enable_RW"], datatype=numpy.bool_, dims=(16,), access=AttrWriteType.READ_WRITE)
+    fpga_processing_enable_R = attribute_wrapper(comms_annotation=["1:fpga_processing_enable_R"], datatype=numpy.bool_, dims=(16,))
+    fpga_sst_offload_enable_RW = attribute_wrapper(comms_annotation=["1:fpga_sst_offload_enable_RW"], datatype=numpy.bool_, dims=(16,), access=AttrWriteType.READ_WRITE)
+    fpga_sst_offload_enable_R = attribute_wrapper(comms_annotation=["1:fpga_sst_offload_enable_R"], datatype=numpy.bool_, dims=(16,))
+    fpga_sst_offload_dest_mac_RW = attribute_wrapper(comms_annotation=["1:fpga_sst_offload_dest_mac_RW"], datatype=numpy.str_, dims=(16,), access=AttrWriteType.READ_WRITE)
+    fpga_sst_offload_dest_mac_R = attribute_wrapper(comms_annotation=["1:fpga_sst_offload_dest_mac_R"], datatype=numpy.str_, dims=(16,))
+    fpga_sst_offload_dest_ip_RW = attribute_wrapper(comms_annotation=["1:fpga_sst_offload_dest_ip_RW"], datatype=numpy.str_, dims=(16,), access=AttrWriteType.READ_WRITE)
+    fpga_sst_offload_dest_ip_R = attribute_wrapper(comms_annotation=["1:fpga_sst_offload_dest_ip_R"], datatype=numpy.str_, dims=(16,))
+    fpga_sst_offload_dest_port_RW = attribute_wrapper(comms_annotation=["1:fpga_sst_offload_dest_port_RW"], datatype=numpy.uint16, dims=(16,), access=AttrWriteType.READ_WRITE)
+    fpga_sst_offload_dest_port_R = attribute_wrapper(comms_annotation=["1:fpga_sst_offload_dest_port_R"], datatype=numpy.uint16, dims=(16,))
+    fpga_sdp_info_station_id_RW = attribute_wrapper(comms_annotation=["1:fpga_sdp_info_station_id_RW"], datatype=numpy.uint16, access=AttrWriteType.READ_WRITE)
+    fpga_sdp_info_station_id_R = attribute_wrapper(comms_annotation=["1:fpga_sdp_info_station_id_R"], datatype=numpy.uint16)
+    fpga_sdp_info_observation_id_RW = attribute_wrapper(comms_annotation=["1:fpga_sdp_info_observation_id_RW"], datatype=numpy.uint32, access=AttrWriteType.READ_WRITE)
+    fpga_sdp_info_observation_id_R = attribute_wrapper(comms_annotation=["1:fpga_sdp_info_observation_id_R"], datatype=numpy.uint32)
+    fpga_sdp_info_source_id_RW = attribute_wrapper(comms_annotation=["1:fpga_sdp_info_source_id_RW"], datatype=numpy.uint16, access=AttrWriteType.READ_WRITE)
+    fpga_sdp_info_source_id_R = attribute_wrapper(comms_annotation=["1:fpga_sdp_info_source_id_R"], datatype=numpy.uint16)
+
     tr_busy_R = attribute_wrapper(comms_annotation=["1:tr_busy_R"], datatype=numpy.bool_)
     # NOTE: typo in node name is 'tr_reload_W' should be 'tr_reload_RW'
     tr_reload_RW = attribute_wrapper(comms_annotation=["1:tr_reload_W"], datatype=numpy.bool_, access=AttrWriteType.READ_WRITE)