Skip to content
Snippets Groups Projects
Commit a9c085d5 authored by Jasper Annyas's avatar Jasper Annyas
Browse files

Merge branch 'L2SS-268-LR1_2_Read_hardware_status_of_UB2c_from_SDPHW' into 'master' 

Resolve L2SS-268 "Lr1 2 read hardware status of ub2c from sdphw"

Closes L2SS-268

See merge request !112
parents b0941dc8 7405dc94
No related branches found
No related tags found
1 merge request!112Resolve L2SS-268 "Lr1 2 read hardware status of ub2c from sdphw"
Show whitespace changes
Inline Side-by-side
CDB/jasper_ConfigDb.json 0 → 100644
+ 816
− 0
View file @ a9c085d5
{
"servers": {
"Femto": {
"CS999": {
"Femto": {
"opc-ua/test-femto/1": {}
}
}
},
"observation_control": {
"LTS": {
"ObservationControl": {
"LTS/ObservationControl/1": {}
}
}
},
"PCC": {
"LTS": {
"PCC": {
"LTS/PCC/1": {
"attribute_properties": {
"Ant_mask_RW": {
"archive_period": [
"600000"
]
},
"CLK_Enable_PWR_R": {
"archive_period": [
"600000"
]
},
"CLK_I2C_STATUS_R": {
"archive_period": [
"600000"
],
"archive_rel_change": [
"-1",
"1"
],
"rel_change": [
"-1",
"1"
]
},
"CLK_PLL_error_R": {
"archive_period": [
"600000"
]
},
"CLK_PLL_locked_R": {
"archive_period": [
"600000"
]
},
"CLK_monitor_rate_RW": {
"archive_period": [
"600000"
],
"archive_rel_change": [
"-1",
"1"
],
"rel_change": [
"-1",
"1"
]
},
"CLK_translator_busy_R": {
"archive_period": [
"600000"
]
},
"HBA_element_LNA_pwr_R": {
"archive_period": [
"600000"
],
"archive_rel_change": [
"-1",
"1"
],
"rel_change": [
"-1",
"1"
]
},
"HBA_element_LNA_pwr_RW": {
"archive_period": [
"600000"
],
"archive_rel_change": [
"-1",
"1"
],
"rel_change": [
"-1",
"1"
]
},
"HBA_element_beamformer_delays_R": {
"archive_period": [
"600000"
],
"archive_rel_change": [
"-1",
"1"
],
"rel_change": [
"-1",
"1"
]
},
"HBA_element_beamformer_delays_RW": {
"archive_period": [
"600000"
],
"archive_rel_change": [
"-1",
"1"
],
"rel_change": [
"-1",
"1"
]
},
"HBA_element_led_R": {
"archive_period": [
"600000"
],
"archive_rel_change": [
"-1",
"1"
],
"rel_change": [
"-1",
"1"
]
},
"HBA_element_led_RW": {
"archive_period": [
"600000"
],
"archive_rel_change": [
"-1",
"1"
],
"rel_change": [
"-1",
"1"
]
},
"HBA_element_pwr_R": {
"archive_period": [
"600000"
],
"archive_rel_change": [
"-1",
"1"
],
"rel_change": [
"-1",
"1"
]
},
"HBA_element_pwr_RW": {
"archive_period": [
"600000"
],
"archive_rel_change": [
"-1",
"1"
],
"rel_change": [
"-1",
"1"
]
},
"RCU_ADC_lock_R": {
"archive_period": [
"600000"
],
"archive_rel_change": [
"-1",
"1"
],
"rel_change": [
"-1",
"1"
]
},
"RCU_I2C_STATUS_R": {
"archive_period": [
"600000"
],
"archive_rel_change": [
"-1",
"1"
],
"rel_change": [
"-1",
"1"
]
},
"RCU_ID_R": {
"archive_period": [
"600000"
],
"archive_rel_change": [
"-1",
"1"
],
"rel_change": [
"-1",
"1"
]
},
"RCU_LED0_R": {
"archive_period": [
"600000"
]
},
"RCU_LED0_RW": {
"archive_period": [
"600000"
]
},
"RCU_LED1_R": {
"archive_period": [
"600000"
]
},
"RCU_LED1_RW": {
"archive_period": [
"600000"
]
},
"RCU_Pwr_dig_R": {
"archive_period": [
"600000"
]
},
"RCU_attenuator_R": {
"archive_period": [
"600000"
],
"archive_rel_change": [
"-1",
"1"
],
"rel_change": [
"-1",
"1"
]
},
"RCU_attenuator_RW": {
"archive_period": [
"600000"
],
"archive_rel_change": [
"-1",
"1"
],
"rel_change": [
"-1",
"1"
]
},
"RCU_band_R": {
"archive_period": [
"600000"
],
"archive_rel_change": [
"-1",
"1"
],
"rel_change": [
"-1",
"1"
]
},
"RCU_band_RW": {
"archive_period": [
"600000"
],
"archive_rel_change": [
"-1",
"1"
],
"rel_change": [
"-1",
"1"
]
},
"RCU_mask_RW": {
"archive_period": [
"600000"
]
},
"RCU_monitor_rate_RW": {
"archive_period": [
"600000"
],
"archive_rel_change": [
"-1.0",
"1.0"
],
"rel_change": [
"-1.0",
"1.0"
]
},
"RCU_temperature_R": {
"archive_period": [
"600000"
],
"archive_rel_change": [
"-1.0",
"1.0"
],
"rel_change": [
"-1.0",
"1.0"
]
},
"RCU_translator_busy_R": {
"archive_period": [
"600000"
]
},
"RCU_version_R": {
"archive_period": [
"600000"
]
},
"State": {
"archive_period": [
"600000"
],
"event_period": [
"0"
]
},
"Status": {
"archive_period": [
"600000"
],
"event_period": [
"0"
]
}
},
"properties": {
"OPC_Server_Name": [
"ltspi.astron.nl"
],
"OPC_Server_Port": [
"4842"
],
"OPC_Time_Out": [
"5.0"
],
"polled_attr": [
"state",
"1000",
"status",
"1000",
"ant_mask_rw",
"1000",
"rcu_adc_lock_r",
"1000",
"rcu_attenuator_r",
"1000",
"rcu_attenuator_rw",
"1000",
"rcu_band_r",
"1000",
"rcu_band_rw",
"1000",
"rcu_id_r",
"1000",
"rcu_led0_r",
"1000",
"rcu_led0_rw",
"1000",
"rcu_mask_rw",
"1000",
"rcu_monitor_rate_rw",
"1000",
"rcu_pwr_dig_r",
"1000",
"rcu_temperature_r",
"1000",
"rcu_version_r",
"1000",
"hba_element_beamformer_delays_r",
"1000",
"hba_element_beamformer_delays_rw",
"1000",
"hba_element_led_r",
"1000",
"hba_element_led_rw",
"1000",
"hba_element_pwr_r",
"1000",
"hba_element_pwr_rw",
"1000",
"clk_enable_pwr_r",
"1000",
"clk_i2c_status_r",
"1000",
"clk_monitor_rate_rw",
"1000",
"clk_pll_error_r",
"1000",
"clk_pll_locked_r",
"1000",
"clk_translator_busy_r",
"1000",
"hba_element_lna_pwr_r",
"1000",
"hba_element_lna_pwr_rw",
"1000",
"rcu_i2c_status_r",
"1000",
"rcu_led1_r",
"1000",
"rcu_led1_rw",
"1000",
"rcu_translator_busy_r",
"1000"
]
}
}
}
}
},
"random_data": {
"LTS": {
"Random_Data": {
"LTS/random_data/1": {
"properties": {
"polled_attr": [
"rnd1",
"1000",
"rnd2",
"1000",
"rnd3",
"1000",
"rnd4",
"1000",
"rnd5",
"1000",
"rnd6",
"1000",
"rnd7",
"1000",
"rnd8",
"1000",
"rnd9",
"1000",
"rnd10",
"1000",
"rnd11",
"1000",
"rnd12",
"1000",
"rnd13",
"1000",
"rnd14",
"1000",
"rnd15",
"1000",
"rnd16",
"1000",
"rnd17",
"1000",
"rnd18",
"1000",
"rnd19",
"1000",
"rnd20",
"1000",
"rnd21",
"1000",
"state",
"1000",
"status",
"1000"
]
}
},
"LTS/random_data/2": {
"properties": {
"polled_attr": [
"rnd1",
"100",
"rnd2",
"100",
"rnd3",
"100",
"rnd4",
"100",
"rnd5",
"100",
"rnd6",
"100",
"rnd7",
"100",
"rnd8",
"100",
"rnd9",
"100",
"rnd10",
"100",
"rnd11",
"100",
"rnd12",
"100",
"rnd13",
"100",
"rnd14",
"100",
"rnd15",
"100",
"rnd16",
"100",
"rnd17",
"100",
"rnd18",
"100",
"rnd19",
"100",
"rnd20",
"100"
]
}
}
}
}
},
"SDP": {
"LTS": {
"SDP": {
"LTS/SDP/1": {
"attribute_properties": {
"SDP_mask_RW": {
"event_period": [
"60000"
]
},
"State": {
"archive_period": [
"600000"
]
},
"Status": {
"archive_period": [
"600000"
]
},
"fpga_mask_RW": {
"archive_period": [
"600000"
]
},
"fpga_scrap_R": {
"archive_period": [
"600000"
],
"archive_rel_change": [
"-1",
"1"
],
"rel_change": [
"-1",
"1"
]
},
"fpga_scrap_RW": {
"archive_period": [
"600000"
],
"archive_rel_change": [
"-1",
"1"
],
"rel_change": [
"-1",
"1"
]
},
"fpga_status_R": {
"archive_period": [
"600000"
]
},
"fpga_temp_R": {
"archive_period": [
"600000"
],
"archive_rel_change": [
"-1",
"1"
],
"rel_change": [
"-1",
"1"
]
},
"fpga_version_R": {
"archive_period": [
"600000"
]
},
"fpga_weights_R": {
"archive_period": [
"600000"
],
"archive_rel_change": [
"-1",
"1"
],
"rel_change": [
"-1",
"1"
]
},
"fpga_weights_RW": {
"archive_period": [
"600000"
],
"archive_rel_change": [
"-1",
"1"
],
"rel_change": [
"-1",
"1"
]
},
"tr_busy_R": {
"archive_period": [
"600000"
]
},
"tr_reload_RW": {
"archive_period": [
"600000"
]
},
"tr_tod_R": {
"archive_period": [
"600000"
],
"archive_rel_change": [
"-1",
"1"
],
"rel_change": [
"-1",
"1"
]
},
"tr_uptime_R": {
"archive_period": [
"600000"
],
"archive_rel_change": [
"-3600",
"3600"
],
"rel_change": [
"-10",
"10"
]
}
},
"properties": {
"OPC_Server_Name": [
"dop36.astron.nl"
],
"OPC_Server_Port": [
"4840"
],
"OPC_Time_Out": [
"5.0"
],
"polled_attr": [
"fpga_temp_r",
"1000",
"state",
"1000",
"status",
"1000",
"fpga_mask_rw",
"1000",
"fpga_scrap_r",
"1000",
"fpga_scrap_rw",
"1000",
"fpga_status_r",
"1000",
"fpga_version_r",
"1000",
"fpga_weights_r",
"1000",
"fpga_weights_rw",
"1000",
"tr_busy_r",
"1000",
"tr_reload_rw",
"1000",
"tr_tod_r",
"1000",
"tr_uptime_r",
"1000"
]
}
}
}
}
},
"SST": {
"LTS": {
"SST": {
"LTS/SST/1": {
"properties": {
"Statistics_Client_Port": [
"5001"
],
"OPC_Server_Name": [
"dop36.astron.nl"
],
"OPC_Server_Port": [
"4840"
],
"OPC_Time_Out": [
"5.0"
]
}
}
}
}
},
"UNB2": {
"LTS": {
"UNB2": {
"LTS/UNB2/1": {
"properties": {
"OPC_Server_Name": [
"despi.astron.nl"
],
"OPC_Server_Port": [
"4842"
],
"OPC_Time_Out": [
"5.0"
]
}
}
}
}
},
"StatsCrosslet": {
"CS997": {
"StatsCrosslet": {
"opc-ua/test-crossletstats/1": {
"attribute_properties": {
"visibilities_imag": {
"archive_rel_change": [
"-0.1",
"0.1"
],
"rel_change": [
"-0.1",
"0.1"
]
},
"visibilities_real": {
"archive_rel_change": [
"-0.1",
"0.1"
],
"rel_change": [
"-0.1",
"0.1"
]
}
},
"properties": {
"polled_attr": [
"integration_time",
"0",
"pause_time",
"0",
"rcu_modes",
"0",
"state",
"0",
"status",
"0",
"subband",
"0",
"time_stamp",
"0",
"visibilities_imag",
"0",
"visibilities_real",
"0"
]
}
}
}
}
}
}
}
devices/devices/apsctl.py → devices/devices/unb2.py
+ 80
− 53
View file @ a9c085d5
......@@ -32,10 +32,10 @@ from common.lofar_git import get_version
import numpy
__all__ = ["APSCTL", "main"]
__all__ = ["UNB2", "main"]
@device_logging_to_python()
class APSCTL(hardware_device):
class UNB2(hardware_device):
"""
**Properties:**
......@@ -79,63 +79,90 @@ class APSCTL(hardware_device):
N_ddr = 2
N_qsfp = 6
# Central CP per Uniboard
UNB2_FPGA_DDR4_SLOT_TEMP_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_FPGA_DDR4_SLOT_TEMP_R"], datatype=numpy.double, dims=((N_unb * N_ddr), N_fpga))
UNB2_I2C_bus_QSFP_STATUS_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_I2C_bus_QSFP_STATUS_R"], datatype=numpy.int64, dims=((N_unb * N_fpga), N_qsfp))
UNB2_I2C_bus_DDR4_STATUS_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_I2C_bus_DDR4_STATUS_R"], datatype=numpy.int64, dims=(N_ddr, N_fpga))
UNB2_I2C_bus_FPGA_PS_STATUS_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_I2C_bus_FPGA_PS_STATUS_R"], datatype=numpy.int64, dims=(N_unb * N_fpga,))
UNB2_translator_busy_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_translator_busy_R"], datatype=numpy.bool_)
### All CP/MP are in order of appearance in the ICD
### Central CP per Uniboard
### Some points are not working yet on the UNB2 or under discussion
#XXX means Not working yet, but they are working on it
##XXX Means Under discussion
# Special case for the on off switch: instead of UNB2_Power_ON_OFF_R we use UNB2_POL_FPGA_CORE_VOUT_R as the MP
UNB2_Power_ON_OFF_RW = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_Power_ON_OFF_RW"], datatype=numpy.bool_, dims=(N_unb,), access=AttrWriteType.READ_WRITE)
UNB2_Front_Panel_LED_RW = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_Front_Panel_LED_RW"], datatype=numpy.uint8, dims=(N_unb,), access=AttrWriteType.READ_WRITE)
UNB2_Front_Panel_LED_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_Front_Panel_LED_R"], datatype=numpy.uint8, dims=(N_unb,))
UNB2_EEPROM_Serial_Number_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_EEPROM_Serial_Number_R"], datatype=numpy.str, dims=(N_unb,))
UNB2_mask_RW = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_mask_RW"], datatype=numpy.bool_, dims=(N_unb,), access=AttrWriteType.READ_WRITE)
# Not yet deployed
#UNB2_mask_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_mask_R"], datatype=numpy.bool_, dims=(N_unb,))
### Central MP per Uniboard
# These three are only available in UNB2c
UNB2_I2C_bus_STATUS_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_I2C_bus_STATUS_R"], datatype=numpy.bool_, dims=(N_unb,))
##UNB2_I2C_bus_STATUS_R will probably be renamed to UNB2_I2C_bus_OK_R
##UNB2_I2C_bus_OK_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_I2C_bus_OK_R"], datatype=numpy.bool_, dims=(N_unb,))
#UNB2_EEPROM_Serial_Number_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_EEPROM_Serial_Number_R"], datatype=numpy.str, dims=(N_unb,))
UNB2_EEPROM_Unique_ID_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_EEPROM_Unique_ID_R"], datatype=numpy.uint32, dims=(N_unb,))
UNB2_FPGA_DDR4_SLOT_PART_NUMBER_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_FPGA_DDR4_SLOT_PART_NUMBER_R"], datatype=numpy.str, dims=(N_unb * N_qsfp, N_fpga))
UNB2_monitor_rate_RW = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_monitor_rate_RW"], datatype=numpy.double, dims=(N_unb,), access=AttrWriteType.READ_WRITE)
UNB2_I2C_bus_STATUS_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_I2C_bus_STATUS_R"], datatype=numpy.double, dims=(N_unb,))
UNB2_I2C_bus_PS_STATUS_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_I2C_bus_PS_STATUS_R"], datatype=numpy.double, dims=(N_unb,))
UNB2_mask_RW = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_mask_RW"], datatype=numpy.double, dims=(N_unb,), access=AttrWriteType.READ_WRITE)
UNB2_Power_ON_OFF_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_Power_ON_OFF_R"], datatype=numpy.double, dims=(N_unb,), access=AttrWriteType.READ_WRITE)
UNB2_FPGA_QSFP_CAGE_TEMP_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_FPGA_QSFP_CAGE_TEMP_R"], datatype=numpy.double, dims=(N_unb * N_qsfp,N_fpga))
UNB2_FPGA_QSFP_CAGE_LOS_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_FPGA_QSFP_CAGE_LOS_R"], datatype=numpy.uint8, dims=(N_unb * N_qsfp,N_fpga))
UNB2_FPGA_POL_HGXB_VOUT_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_FPGA_POL_HGXB_VOUT_R"], datatype=numpy.double, dims=(N_unb,N_fpga))
UNB2_FPGA_POL_HGXB_IOUT_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_FPGA_POL_HGXB_IOUT_R"], datatype=numpy.double, dims=(N_unb,N_fpga))
UNB2_FPGA_POL_HGXB_TEMP_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_FPGA_POL_HGXB_TEMP_R"], datatype=numpy.double, dims=(N_unb,N_fpga))
UNB2_FPGA_POL_PGM_VOUT_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_FPGA_POL_PGM_VOUT_R"], datatype=numpy.double, dims=(N_unb,N_fpga))
UNB2_FPGA_POL_PGM_IOUT_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_FPGA_POL_PGM_IOUT_R"], datatype=numpy.double, dims=(N_unb,N_fpga))
UNB2_FPGA_POL_PGM_TEMP_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_FPGA_POL_PGM_TEMP_R"], datatype=numpy.double, dims=(N_unb,N_fpga))
UNB2_FPGA_POL_RXGXB_VOUT_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_FPGA_POL_RXGXB_VOUT_R"], datatype=numpy.double, dims=(N_unb,N_fpga))
UNB2_FPGA_POL_RXGXB_IOUT_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_FPGA_POL_RXGXB_IOUT_R"], datatype=numpy.double, dims=(N_unb,N_fpga))
UNB2_FPGA_POL_RXGXB_TEMP_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_FPGA_POL_RXGXB_TEMP_R"], datatype=numpy.double, dims=(N_unb,N_fpga))
UNB2_FPGA_POL_TXGXB_VOUT_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_FPGA_POL_TXGXB_VOUT_R"], datatype=numpy.double, dims=(N_unb,N_fpga))
UNB2_FPGA_POL_TXGXB_IOUT_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_FPGA_POL_TXGXB_IOUT_R"], datatype=numpy.double, dims=(N_unb,N_fpga))
UNB2_POL_FPGA_TXGXB_TEMP_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_POL_FPGA_TXGXB_TEMP_R"], datatype=numpy.double, dims=(N_unb,N_fpga))
UNB2_POL_FPGA_CORE_VOUT_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_POL_FPGA_CORE_VOUT_R"], datatype=numpy.double, dims=(N_unb,N_fpga))
UNB2_FPGA_POL_CORE_IOUT_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_FPGA_POL_CORE_IOUT_R"], datatype=numpy.double, dims=(N_unb,N_fpga))
UNB2_FPGA_POL_CORE_TEMP_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_FPGA_POL_CORE_TEMP_R"], datatype=numpy.double, dims=(N_unb,N_fpga))
UNB2_FPGA_POL_ERAM_VOUT_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_FPGA_POL_ERAM_VOUT_R"], datatype=numpy.double, dims=(N_unb,N_fpga))
UNB2_FPGA_POL_ERAM_IOUT_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_FPGA_POL_ERAM_IOUT_R"], datatype=numpy.double, dims=(N_unb,N_fpga))
UNB2_FPGA_POL_ERAM_TEMP_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_FPGA_POL_ERAM_TEMP_R"], datatype=numpy.double, dims=(N_unb,N_fpga))
UNB2_POL_CLOCK_VOUT_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_POL_CLOCK_VOUT_R"], datatype=numpy.double, dims=(N_unb,))
UNB2_POL_CLOCK_IOUT_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_POL_CLOCK_IOUT_R"], datatype=numpy.double, dims=(N_unb,))
UNB2_POL_CLOCK_TEMP_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_POL_CLOCK_TEMP_R"], datatype=numpy.double, dims=(N_unb,))
UNB2_POL_SWITCH_1V2_VOUT_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_POL_SWITCH_1V2_VOUT_R"], datatype=numpy.double, dims=(N_unb,))
UNB2_POL_SWITCH_1V2_IOUT_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_POL_SWITCH_1V2_IOUT_R"], datatype=numpy.double, dims=(N_unb,))
UNB2_POL_SWITCH_1V2_TEMP_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_POL_SWITCH_1V2_TEMP_R"], datatype=numpy.double, dims=(N_unb,))
UNB2_POL_SWITCH_PHY_VOUT_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_POL_SWITCH_PHY_VOUT_R"], datatype=numpy.double, dims=(N_unb,))
UNB2_POL_SWITCH_PHY_IOUT_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_POL_SWITCH_PHY_IOUT_R"], datatype=numpy.double, dims=(N_unb,))
UNB2_POL_SWITCH_PHY_TEMP_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_POL_SWITCH_PHY_TEMP_R"], datatype=numpy.double, dims=(N_unb,))
UNB2_DC_DC_48V_12V_VIN_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_DC_DC_48V_12V_VIN_R"], datatype=numpy.double, dims=(N_unb,))
UNB2_DC_DC_48V_12V_VOUT_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_DC_DC_48V_12V_VOUT_R"], datatype=numpy.double, dims=(N_unb,))
UNB2_DC_DC_48V_12V_IOUT_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_DC_DC_48V_12V_IOUT_R"], datatype=numpy.double, dims=(N_unb,))
UNB2_DC_DC_48V_12V_TEMP_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_DC_DC_48V_12V_TEMP_R"], datatype=numpy.double, dims=(N_unb,))
UNB2_POL_QSFP_N01_VOUT_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_POL_QSFP_N01_VOUT_R"], datatype=numpy.double, dims=(N_unb,))
UNB2_POL_QSFP_N01_IOUT_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_POL_QSFP_N01_IOUT_R"], datatype=numpy.double, dims=(N_unb,))
UNB2_POL_QSFP_N01_TEMP_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_POL_QSFP_N01_TEMP_R"], datatype=numpy.double, dims=(N_unb,))
UNB2_POL_QSFP_N23_VOUT_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_POL_QSFP_N23_VOUT_R"], datatype=numpy.double, dims=(N_unb,))
UNB2_POL_QSFP_N23_IOUT_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_POL_QSFP_N23_IOUT_R"], datatype=numpy.double, dims=(N_unb,))
UNB2_POL_QSFP_N23_TEMP_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_POL_QSFP_N23_TEMP_R"], datatype=numpy.double, dims=(N_unb,))
UNB2_DC_DC_48V_12V_VIN_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_DC_DC_48V_12V_VIN_R"], datatype=numpy.double, dims=(N_unb,))
UNB2_DC_DC_48V_12V_VOUT_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_DC_DC_48V_12V_VOUT_R"], datatype=numpy.double, dims=(N_unb,))
UNB2_DC_DC_48V_12V_IOUT_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_DC_DC_48V_12V_IOUT_R"], datatype=numpy.double, dims=(N_unb,))
UNB2_DC_DC_48V_12V_TEMP_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_DC_DC_48V_12V_TEMP_R"], datatype=numpy.double, dims=(N_unb,))
UNB2_POL_SWITCH_1V2_VOUT_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_POL_SWITCH_1V2_VOUT_R"], datatype=numpy.double, dims=(N_unb,))
UNB2_POL_SWITCH_1V2_IOUT_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_POL_SWITCH_1V2_IOUT_R"], datatype=numpy.double, dims=(N_unb,))
UNB2_POL_SWITCH_1V2_TEMP_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_POL_SWITCH_1V2_TEMP_R"], datatype=numpy.double, dims=(N_unb,))
UNB2_POL_SWITCH_PHY_VOUT_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_POL_SWITCH_PHY_VOUT_R"], datatype=numpy.double, dims=(N_unb,))
UNB2_POL_SWITCH_PHY_IOUT_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_POL_SWITCH_PHY_IOUT_R"], datatype=numpy.double, dims=(N_unb,))
UNB2_POL_SWITCH_PHY_TEMP_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_POL_SWITCH_PHY_TEMP_R"], datatype=numpy.double, dims=(N_unb,))
UNB2_POL_CLOCK_VOUT_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_POL_CLOCK_VOUT_R"], datatype=numpy.double, dims=(N_unb,))
UNB2_POL_CLOCK_IOUT_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_POL_CLOCK_IOUT_R"], datatype=numpy.double, dims=(N_unb,))
UNB2_POL_CLOCK_TEMP_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_POL_CLOCK_TEMP_R"], datatype=numpy.double, dims=(N_unb,))
### Local MP per FPGA
UNB2_FPGA_DDR4_SLOT_TEMP_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_FPGA_DDR4_SLOT_TEMP_R"], datatype=numpy.double, dims=((N_fpga * N_ddr), N_unb))
#UNB2_FPGA_DDR4_SLOT_PART_NUMBER_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_FPGA_DDR4_SLOT_PART_NUMBER_R"], datatype=numpy.str, dims=(N_fpga * N_ddr), N_unb))
#UNB2_FPGA_QSFP_CAGE_TEMP_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_FPGA_QSFP_CAGE_0_TEMP_R"], datatype=numpy.double, dims=(N_fpga, N_unb))
#UNB2_FPGA_QSFP_CAGE_1_TEMP_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_FPGA_QSFP_CAGE_1_TEMP_R"], datatype=numpy.double, dims=(N_fpga, N_unb))
#UNB2_FPGA_QSFP_CAGE_2_TEMP_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_FPGA_QSFP_CAGE_2_TEMP_R"], datatype=numpy.double, dims=(N_fpga, N_unb))
#UNB2_FPGA_QSFP_CAGE_3_TEMP_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_FPGA_QSFP_CAGE_3_TEMP_R"], datatype=numpy.double, dims=(N_fpga, N_unb))
#UNB2_FPGA_QSFP_CAGE_4_TEMP_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_FPGA_QSFP_CAGE_4_TEMP_R"], datatype=numpy.double, dims=(N_fpga, N_unb))
#UNB2_FPGA_QSFP_CAGE_5_TEMP_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_FPGA_QSFP_CAGE_5_TEMP_R"], datatype=numpy.double, dims=(N_fpga, N_unb))
#UNB2_FPGA_QSFP_CAGE_LOS_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_FPGA_QSFP_CAGE_0_LOS_R"], datatype=numpy.uint8, dims=(N_fpga, N_unb))
#UNB2_FPGA_QSFP_CAGE_1_LOS_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_FPGA_QSFP_CAGE_1_LOS_R"], datatype=numpy.uint8, dims=(N_fpga, N_unb))
#UNB2_FPGA_QSFP_CAGE_2_LOS_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_FPGA_QSFP_CAGE_2_LOS_R"], datatype=numpy.uint8, dims=(N_fpga, N_unb))
#UNB2_FPGA_QSFP_CAGE_3_LOS_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_FPGA_QSFP_CAGE_3_LOS_R"], datatype=numpy.uint8, dims=(N_fpga, N_unb))
#UNB2_FPGA_QSFP_CAGE_4_LOS_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_FPGA_QSFP_CAGE_4_LOS_R"], datatype=numpy.uint8, dims=(N_fpga, N_unb))
#UNB2_FPGA_QSFP_CAGE_5_LOS_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_FPGA_QSFP_CAGE_5_LOS_R"], datatype=numpy.uint8, dims=(N_fpga, N_unb))
#UNB2_FPGA_POL_CORE_VOUT_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_POL_FPGA_CORE_VOUT_R"], datatype=numpy.double, dims=(N_fpga, N_unb))
UNB2_FPGA_POL_CORE_IOUT_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_FPGA_POL_CORE_IOUT_R"], datatype=numpy.double, dims=(N_fpga, N_unb))
UNB2_FPGA_POL_CORE_TEMP_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_FPGA_POL_CORE_TEMP_R"], datatype=numpy.double, dims=(N_fpga, N_unb))
UNB2_FPGA_POL_ERAM_VOUT_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_FPGA_POL_ERAM_VOUT_R"], datatype=numpy.double, dims=(N_fpga, N_unb))
UNB2_FPGA_POL_ERAM_IOUT_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_FPGA_POL_ERAM_IOUT_R"], datatype=numpy.double, dims=(N_fpga, N_unb))
UNB2_FPGA_POL_ERAM_TEMP_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_FPGA_POL_ERAM_TEMP_R"], datatype=numpy.double, dims=(N_fpga, N_unb))
UNB2_FPGA_POL_RXGXB_VOUT_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_FPGA_POL_RXGXB_VOUT_R"], datatype=numpy.double, dims=(N_fpga, N_unb))
UNB2_FPGA_POL_RXGXB_IOUT_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_FPGA_POL_RXGXB_IOUT_R"], datatype=numpy.double, dims=(N_fpga, N_unb))
UNB2_FPGA_POL_RXGXB_TEMP_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_FPGA_POL_RXGXB_TEMP_R"], datatype=numpy.double, dims=(N_fpga, N_unb))
UNB2_FPGA_POL_TXGXB_VOUT_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_FPGA_POL_TXGXB_VOUT_R"], datatype=numpy.double, dims=(N_fpga, N_unb))
UNB2_FPGA_POL_TXGXB_IOUT_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_FPGA_POL_TXGXB_IOUT_R"], datatype=numpy.double, dims=(N_fpga, N_unb))
#UNB2_FPGA_POL_TXGXB_TEMP_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_POL_FPGA_TXGXB_TEMP_R"], datatype=numpy.double, dims=(N_fpga, N_unb))
UNB2_FPGA_POL_HGXB_VOUT_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_FPGA_POL_HGXB_VOUT_R"], datatype=numpy.double, dims=(N_fpga, N_unb))
UNB2_FPGA_POL_HGXB_IOUT_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_FPGA_POL_HGXB_IOUT_R"], datatype=numpy.double, dims=(N_fpga, N_unb))
UNB2_FPGA_POL_HGXB_TEMP_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_FPGA_POL_HGXB_TEMP_R"], datatype=numpy.double, dims=(N_fpga, N_unb))
UNB2_FPGA_POL_PGM_VOUT_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_FPGA_POL_PGM_VOUT_R"], datatype=numpy.double, dims=(N_fpga, N_unb))
UNB2_FPGA_POL_PGM_IOUT_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_FPGA_POL_PGM_IOUT_R"], datatype=numpy.double, dims=(N_fpga, N_unb))
UNB2_FPGA_POL_PGM_TEMP_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_FPGA_POL_PGM_TEMP_R"], datatype=numpy.double, dims=(N_fpga, N_unb))
##UNB2_I2C_bus_QSFP_STATUS_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_I2C_bus_QSFP_STATUS_R"], datatype=numpy.int64, dims=((N_unb * N_fpga), N_qsfp))
##UNB2_I2C_bus_DDR4_STATUS_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_I2C_bus_DDR4_STATUS_R"], datatype=numpy.int64, dims=(N_ddr, N_fpga))
##UNB2_I2C_bus_FPGA_PS_STATUS_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_I2C_bus_FPGA_PS_STATUS_R"], datatype=numpy.int64, dims=(N_unb * N_fpga,))
##UNB2_I2C_bus_PS_STATUS_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_I2C_bus_PS_STATUS_R"], datatype=numpy.double, dims=(N_unb,))
##UNB2_translator_busy_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_translator_busy_R"], datatype=numpy.bool_)
##UNB2_monitor_rate_RW = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_monitor_rate_RW"], datatype=numpy.double, dims=(N_unb,), access=AttrWriteType.READ_WRITE)
# QualifiedName(2: UNB2_on)
......@@ -180,7 +207,7 @@ class APSCTL(hardware_device):
except Exception as e:
# use the pass function instead of setting read/write fails
i.set_pass_func()
self.warn_stream("error while setting the APSCTL attribute {} read/write function. {}".format(i, e))
self.warn_stream("error while setting the UNB2 attribute {} read/write function. {}".format(i, e))
self.OPCua_client.start()
......@@ -192,12 +219,12 @@ class APSCTL(hardware_device):
# Run server
# ----------
def main(args=None, **kwargs):
"""Main function of the SDP module."""
"""Main function of the UNB2 module."""
from devices.common.lofar_logging import configure_logger
from common.lofar_logging import configure_logger
configure_logger()
return run((APSCTL,), args=args, **kwargs)
return run((UNB2,), args=args, **kwargs)
if __name__ == '__main__':
......
docker-compose/device-unb2.yml 0 → 100644
+ 42
− 0
View file @ a9c085d5
#
# Docker compose file that launches an interactive iTango session.
#
# Connect to the interactive session with 'docker attach itango'.
# Disconnect with the Docker deattach sequence: <CTRL>+<P> <CTRL>+<Q>
#
# Defines:
# - itango: iTango interactive session
#
# Requires:
# - lofar-device-base.yml
#
version: '2'
services:
device-unb2:
image: device-unb2
# build explicitly, as docker-compose does not understand a local image
# being shared among services.
build:
context: lofar-device-base
args:
SOURCE_IMAGE: ${DOCKER_REGISTRY_HOST}/${DOCKER_REGISTRY_USER}-tango-itango:${TANGO_ITANGO_VERSION}
container_name: ${CONTAINER_NAME_PREFIX}device-unb2
networks:
- control
ports:
- "5704:5704" # unique port for this DS
volumes:
- ${TANGO_LOFAR_CONTAINER_MOUNT}
environment:
- TANGO_HOST=${TANGO_HOST}
entrypoint:
- /usr/local/bin/wait-for-it.sh
- ${TANGO_HOST}
- --timeout=30
- --strict
- --
# configure CORBA to _listen_ on 0:port, but tell others we're _reachable_ through ${HOSTNAME}:port, since CORBA
# can't know about our Docker port forwarding
- python3 -u ${TANGO_LOFAR_CONTAINER_DIR}/devices/devices/unb2.py LTS -v -ORBendPoint giop:tcp:0:5704 -ORBendPointPublish giop:tcp:${HOSTNAME}:5704
restart: on-failure
docker-compose/jupyter/ipython-profiles/stationcontrol-jupyter/startup/01-devices.py
+ 2
− 1
View file @ a9c085d5
......@@ -2,6 +2,7 @@
pcc = DeviceProxy("LTS/PCC/1")
sdp = DeviceProxy("LTS/SDP/1")
sst = DeviceProxy("LTS/SST/1")
unb2 = DeviceProxy("LTS/UNB2/1")
# Put them in a list in case one wants to iterate
devices = [pcc, sdp, sst]
devices = [pcc, sdp, sst, unb2]
jupyter-notebooks/PCC_notebook.ipynb
+ 16
− 12
View file @ a9c085d5
%% Cell type:code id:funded-deputy tags:
``` python
import time
```
%% Cell type:code id:bridal-mumbai tags:
``` python
d=DeviceProxy("LTS/PCC/1")
```
%% Cell type:code id:subjective-conference tags:
``` python
state = str(d.state())
if state == "OFF":
d.initialise()
time.sleep(1)
state = str(d.state())
if state == "STANDBY":
d.on()
state = str(d.state())
if state == "ON":
print("Device is now in on state")
```
%% Output
Device is now in on state
%% Cell type:code id:liable-thesaurus tags:
``` python
values = [[d.RCU_mask_RW, "RCU_mask_RW"],
[d.Ant_mask_RW,"Ant_mask_RW"],
[d.RCU_attenuator_R,"RCU_attenuator_R"],
[d.RCU_attenuator_RW,"RCU_attenuator_RW"],
[d.RCU_band_R,"RCU_band_R"],
[d.RCU_band_RW,"RCU_band_RW"],
[d.RCU_temperature_R,"RCU_temperature_R"],
[d.RCU_Pwr_dig_R,"RCU_Pwr_dig_R"],
[d.RCU_LED0_R,"RCU_LED0_R"],
[d.RCU_LED0_RW,"RCU_LED0_RW"],
[d.RCU_ADC_lock_R,"RCU_ADC_lock_R"],
[d.RCU_ADC_SYNC_R,"RCU_ADC_SYNC_R"],
[d.RCU_ADC_JESD_R,"RCU_ADC_JESD_R"],
[d.RCU_ADC_CML_R,"RCU_ADC_CML_R"],
[d.RCU_OUT1_R,"RCU_OUT1_R"],
[d.RCU_OUT2_R,"RCU_OUT2_R"],
[d.RCU_ID_R,"RCU_ID_R"],
[d.RCU_version_R,"RCU_version_R"],
[d.HBA_element_beamformer_delays_R,"HBA_element_beamformer_delays_R"],
[d.HBA_element_beamformer_delays_RW,"HBA_element_beamformer_delays_RW"],
[d.HBA_element_pwr_R,"HBA_element_pwr_R"],
[d.HBA_element_pwr_RW,"HBA_element_pwr_RW"],
[d.RCU_monitor_rate_RW,"RCU_monitor_rate_RW"]]
for i in values:
print("🟦🟦🟦", i[1], ": ", i[0])
```
%% Output
---------------------------------------------------------------------------
DevFailed Traceback (most recent call last)
AttributeError Traceback (most recent call last)
<ipython-input-4-aafae2adcd98> in <module>
----> 1 values = [[d.RCU_mask_RW, "RCU_mask_RW"],
2 [d.Ant_mask_RW,"Ant_mask_RW"],
3 [d.RCU_attenuator_R,"RCU_attenuator_R"],
4 [d.RCU_attenuator_RW,"RCU_attenuator_RW"],
5 [d.RCU_band_R,"RCU_band_R"],
10 [d.RCU_LED0_RW,"RCU_LED0_RW"],
11 [d.RCU_ADC_lock_R,"RCU_ADC_lock_R"],
---> 12 [d.RCU_ADC_SYNC_R,"RCU_ADC_SYNC_R"],
13 [d.RCU_ADC_JESD_R,"RCU_ADC_JESD_R"],
14 [d.RCU_ADC_CML_R,"RCU_ADC_CML_R"],
/usr/local/lib/python3.7/dist-packages/tango/device_proxy.py in __DeviceProxy__getattr(self, name)
342 attr_info = self.__get_attr_cache().get(name_l)
343 if attr_info:
--> 344 return __get_attribute_value(self, attr_info, name)
345
346 try:
/usr/local/lib/python3.7/dist-packages/tango/device_proxy.py in __get_attribute_value(self, attr_info, name)
281 def __get_attribute_value(self, attr_info, name):
282 _, enum_class = attr_info
--> 283 attr_value = self.read_attribute(name).value
284 if enum_class:
285 return enum_class(attr_value)
/usr/local/lib/python3.7/dist-packages/tango/green.py in greener(obj, *args, **kwargs)
193 green_mode = access('green_mode', None)
194 executor = get_object_executor(obj, green_mode)
--> 195 return executor.run(fn, args, kwargs, wait=wait, timeout=timeout)
196
197 return greener
/usr/local/lib/python3.7/dist-packages/tango/green.py in run(self, fn, args, kwargs, wait, timeout)
107 # Sychronous (no delegation)
108 if not self.asynchronous or not self.in_executor_context():
--> 109 return fn(*args, **kwargs)
110 # Asynchronous delegation
111 accessor = self.delegate(fn, *args, **kwargs)
/usr/local/lib/python3.7/dist-packages/tango/device_proxy.py in __DeviceProxy__read_attribute(self, value, extract_as)
439
440 def __DeviceProxy__read_attribute(self, value, extract_as=ExtractAs.Numpy):
--> 441 return __check_read_attribute(self._read_attribute(value, extract_as))
442
443
/usr/local/lib/python3.7/dist-packages/tango/device_proxy.py in __check_read_attribute(dev_attr)
155 def __check_read_attribute(dev_attr):
156 if dev_attr.has_failed:
--> 157 raise DevFailed(*dev_attr.get_err_stack())
158 return dev_attr
159
DevFailed: DevFailed[
DevError[
desc = Read value for attribute RCU_mask_RW has not been updated
origin = Device_3Impl::read_attributes_no_except
reason = API_AttrValueNotSet
severity = ERR]
DevError[
desc = Failed to read_attribute on device lts/pcc/1, attribute RCU_mask_RW
origin = DeviceProxy::read_attribute()
reason = API_AttributeFailed
severity = ERR]
]
353 return self.read_pipe(name)
354
--> 355 six.raise_from(AttributeError(name), cause)
356
357
/usr/local/lib/python3.7/dist-packages/six.py in raise_from(value, from_value)
AttributeError: RCU_ADC_SYNC_R
%% Cell type:code id:charitable-subject tags:
``` python
d.RCU_mask_RW = [False, False, False, False, False, False, False, False, False, False, False, False,
False, False, False, False, False, False, False, False, False, False, False, False,
False, False, False, False, False, False, False, False,]
time.sleep(1)
print(d.RCU_mask_RW)
monitor_rate = d.RCU_monitor_rate_RW
print("current monitoring rate: {}, setting to {}".format(monitor_rate, monitor_rate + 1))
d.RCU_monitor_rate_RW = monitor_rate + 1
time.sleep(2)
print("new monitoring rate is: {}".format(d.RCU_monitor_rate_RW))
```
%% Output
[False False False False False False False False False False False False
False False False False False False False False False False False False
False False False False False False False False]
current monitoring rate: 0.0, setting to 1.0
new monitoring rate is: 1.0
%% Cell type:code id:impressive-request tags:
``` python
attr_names = d.get_attribute_list()
for i in attr_names:
exec("value = print(i, d.{})".format(i))
```
%% Cell type:code id:conditional-scale tags:
``` python
```
......
jupyter-notebooks/UNB2_notebook.ipynb 0 → 100644
+ 483
− 0
View file @ a9c085d5
%% Cell type:code id:waiting-chance tags:
``` python
import time
```
%% Cell type:code id:moving-alexandria tags:
``` python
d=DeviceProxy("LTS/UNB2/1")
```
%% Cell type:code id:ranking-aluminum tags:
``` python
state = str(d.state())
if state == "OFF" or state == "FAULT":
d.initialise()
time.sleep(1)
state = str(d.state())
if state == "STANDBY":
d.on()
state = str(d.state())
if state == "ON":
print("Device is now in on state")
else:
print("warning, expected device to be in on state, is: ", state)
```
%% Output
Device is now in on state
%% Cell type:code id:0caa8146 tags:
``` python
attr_names = d.get_attribute_list()
for i in attr_names:
exec("value = print(i, d.{})".format(i))
```
%% Output
version_R *L2SS-268-LR1_2_Read_hardware_status_of_UB2c_from_SDPHW [1007a5c5462b1aa3e8f81268f890f6c058413218]
UNB2_Power_ON_OFF_RW [False False]
UNB2_Front_Panel_LED_RW [0 0]
UNB2_Front_Panel_LED_R [0 0]
UNB2_mask_RW [False False]
UNB2_I2C_bus_STATUS_R [False False]
UNB2_EEPROM_Unique_ID_R [5947666 5947666]
UNB2_DC_DC_48V_12V_VIN_R [29.18505859 29.18505859]
UNB2_DC_DC_48V_12V_VOUT_R [12.00146484 11.98486328]
UNB2_DC_DC_48V_12V_IOUT_R [3.625 3.625]
UNB2_DC_DC_48V_12V_TEMP_R [37. 37.]
UNB2_POL_QSFP_N01_VOUT_R [3.28686523 3.28686523]
UNB2_POL_QSFP_N01_IOUT_R [1.55078125 1.55078125]
UNB2_POL_QSFP_N01_TEMP_R [33.75 33.75]
UNB2_POL_QSFP_N23_VOUT_R [3.28710938 3.28710938]
UNB2_POL_QSFP_N23_IOUT_R [1.25195312 1.25195312]
UNB2_POL_QSFP_N23_TEMP_R [40.625 40.625]
UNB2_POL_SWITCH_1V2_VOUT_R [1.19970703 1.19970703]
UNB2_POL_SWITCH_1V2_IOUT_R [1.73632812 1.73632812]
UNB2_POL_SWITCH_1V2_TEMP_R [45.125 45.125]
UNB2_POL_SWITCH_PHY_VOUT_R [1.00024414 1.00024414]
UNB2_POL_SWITCH_PHY_IOUT_R [0.52050781 0.52050781]
UNB2_POL_SWITCH_PHY_TEMP_R [46.1875 46.1875]
UNB2_POL_CLOCK_VOUT_R [2.49951172 2.49951172]
UNB2_POL_CLOCK_IOUT_R [0.94042969 0.94042969]
UNB2_POL_CLOCK_TEMP_R [42.875 42.875]
UNB2_FPGA_DDR4_SLOT_TEMP_R [[27.5 27.5 29.25 27.75 28.75 29.25 28.5 28.5 ]
[27.5 27.5 29.25 27.75 28.75 29.25 28.5 28.5 ]]
UNB2_FPGA_POL_CORE_IOUT_R [[5.921875 4.109375 3.76171875 3.55859375]
[5.921875 4.1015625 3.76171875 3.55859375]]
UNB2_FPGA_POL_CORE_TEMP_R [[30.84375 31.46875 32.4375 34.75 ]
[30.84375 31.5 32.375 34.6875 ]]
UNB2_FPGA_POL_ERAM_VOUT_R [[0.8996582 0.90014648 0.90014648 0.8996582 ]
[0.8996582 0.8996582 0.90014648 0.8996582 ]]
UNB2_FPGA_POL_ERAM_IOUT_R [[0.08764648 0.0880127 0.18725586 0.08703613]
[0.02593994 0.0880127 0.18725586 0.08703613]]
UNB2_FPGA_POL_ERAM_TEMP_R [[38.75 39.25 41. 41.4375]
[38.75 39.25 41. 41.4375]]
UNB2_FPGA_POL_RXGXB_VOUT_R [[0.90014648 0.89990234 0.90014648 0.90014648]
[0.90014648 0.89990234 0.90014648 0.90014648]]
UNB2_FPGA_POL_RXGXB_IOUT_R [[0.49755859 0.41113281 0.40234375 0.48876953]
[0.49755859 0.41113281 0.40234375 0.48876953]]
UNB2_FPGA_POL_RXGXB_TEMP_R [[34.75 38.0625 36.5 38.1875]
[34.75 38.0625 36.5 38.1875]]
UNB2_FPGA_POL_TXGXB_VOUT_R [[0.89990234 0.90014648 0.90014648 0.89990234]
[0.89990234 0.90014648 0.90014648 0.89990234]]
UNB2_FPGA_POL_TXGXB_IOUT_R [[0.17480469 0.12219238 0.06433105 0.13110352]
[0.17480469 0.12219238 0.06433105 0.13110352]]
UNB2_FPGA_POL_HGXB_VOUT_R [[1.80004883 1.79956055 1.79980469 1.79980469]
[1.80004883 1.79956055 1.79980469 1.79980469]]
UNB2_FPGA_POL_HGXB_IOUT_R [[0.67089844 0.76269531 0.80664062 0.7265625 ]
[0.67089844 0.76269531 0.80664062 0.7265625 ]]
UNB2_FPGA_POL_HGXB_TEMP_R [[40.375 41.8125 44.3125 40.625 ]
[40.375 41.8125 44.3125 40.625 ]]
UNB2_FPGA_POL_PGM_VOUT_R [[1.80029297 1.80004883 1.79931641 1.80029297]
[1.80029297 1.80004883 1.79931641 1.80029297]]
UNB2_FPGA_POL_PGM_IOUT_R [[0.13818359 0.17089844 0.31542969 0.10656738]
[0.1550293 0.17089844 0.31542969 0.10656738]]
UNB2_FPGA_POL_PGM_TEMP_R [[40.0625 42.1875 44.3125 40.3125]
[40.0625 42.1875 44.3125 40.3125]]
State <function __get_command_func.<locals>.f at 0x7f636d295510>
Status <function __get_command_func.<locals>.f at 0x7f636d295510>
%% Cell type:code id:929965c2 tags:
``` python
#Test the LED CP
led = d.UNB2_Front_Panel_LED_R
print("Old values:\n", led)
led[0] = 1
led[1] = 3
print("Values to be set:\n", led)
d.UNB2_Front_Panel_LED_RW = led
print("Values set in RW:\n",d.UNB2_Front_Panel_LED_RW)
print("Values read back after setting:\n",d.UNB2_Front_Panel_LED_R)
```
%% Output
Old values:
[0 0]
Values to be set:
[1 3]
Values set in RW:
[1 3]
Values read back after setting:
[0 0]
%% Cell type:code id:6813164e tags:
``` python
#Test the ON OFF CP
onoff = d.UNB2_Power_ON_OFF_RW
print("Old values:\n", onoff)
onoff[0] = False
onoff[1] = False
print("Values to be set:\n", onoff)
d.UNB2_Power_ON_OFF_RW = onoff
print("Values set in RW:\n",d.UNB2_Power_ON_OFF_RW)
```
%% Output
Old values:
[False False]
Values to be set:
[False False]
Values set in RW:
[False False]
%% Cell type:code id:e9b32ec7 tags:
``` python
#Test the MASK CP
mask = d.UNB2_mask_RW
print("Old values:\n", mask)
mask[0] = False
mask[1] = False
print("Values to be set:\n", mask)
d.UNB2_mask_RW = mask
print("Values read back after setting:\n",d.UNB2_mask_RW)
```
%% Output
Old values:
[ True True]
Values to be set:
[False False]
Values read back after setting:
[False False]
%% Cell type:code id:transsexual-battle tags:
``` python
values = [
[d.FPGA_mask_RW, "FPGA_mask_RW"],
[d.FPGA_scrap_R, "FPGA_scrap_R"],
[d.FPGA_scrap_RW, "FPGA_scrap_RW"],
[d.FPGA_status_R, "FPGA_status_R"],
[d.FPGA_temp_R, "FPGA_temp_R"],
[d.FPGA_version_R, "FPGA_version_R"],
[d.FPGA_weights_R, "FPGA_weights_R"],
[d.FPGA_weights_RW, "FPGA_weights_RW"],
[d.TR_busy_R, "TR_busy_R"],
[d.TR_reload_RW, "TR_reload_RW"],
# [d.TR_tod_R, "TR_tod_R"],
# [d.TR_uptime_R, "TR_uptime_R"]
]
for i in values:
print("🟦🟦🟦", i[1], ": ", i[0])
```
%% Output
---------------------------------------------------------------------------
DevFailed Traceback (most recent call last)
/tmp/ipykernel_22/2885399456.py in <module>
1 values = [
----> 2 [d.FPGA_mask_RW, "FPGA_mask_RW"],
3 [d.FPGA_scrap_R, "FPGA_scrap_R"],
4 [d.FPGA_scrap_RW, "FPGA_scrap_RW"],
5 [d.FPGA_status_R, "FPGA_status_R"],
/usr/local/lib/python3.7/dist-packages/tango/device_proxy.py in __DeviceProxy__getattr(self, name)
319 attr_info = self.__get_attr_cache().get(name_l)
320 if attr_info:
--> 321 return __get_attribute_value(self, attr_info, name)
322
323 if name_l in self.__get_pipe_cache():
/usr/local/lib/python3.7/dist-packages/tango/device_proxy.py in __get_attribute_value(self, attr_info, name)
281 def __get_attribute_value(self, attr_info, name):
282 _, enum_class = attr_info
--> 283 attr_value = self.read_attribute(name).value
284 if enum_class:
285 return enum_class(attr_value)
/usr/local/lib/python3.7/dist-packages/tango/green.py in greener(obj, *args, **kwargs)
193 green_mode = access('green_mode', None)
194 executor = get_object_executor(obj, green_mode)
--> 195 return executor.run(fn, args, kwargs, wait=wait, timeout=timeout)
196
197 return greener
/usr/local/lib/python3.7/dist-packages/tango/green.py in run(self, fn, args, kwargs, wait, timeout)
107 # Sychronous (no delegation)
108 if not self.asynchronous or not self.in_executor_context():
--> 109 return fn(*args, **kwargs)
110 # Asynchronous delegation
111 accessor = self.delegate(fn, *args, **kwargs)
/usr/local/lib/python3.7/dist-packages/tango/device_proxy.py in __DeviceProxy__read_attribute(self, value, extract_as)
439
440 def __DeviceProxy__read_attribute(self, value, extract_as=ExtractAs.Numpy):
--> 441 return __check_read_attribute(self._read_attribute(value, extract_as))
442
443
/usr/local/lib/python3.7/dist-packages/tango/device_proxy.py in __check_read_attribute(dev_attr)
155 def __check_read_attribute(dev_attr):
156 if dev_attr.has_failed:
--> 157 raise DevFailed(*dev_attr.get_err_stack())
158 return dev_attr
159
DevFailed: DevFailed[
DevError[
desc = Read value for attribute FPGA_mask_RW has not been updated
origin = Device_3Impl::read_attributes_no_except
reason = API_AttrValueNotSet
severity = ERR]
DevError[
desc = Failed to read_attribute on device lts/sdp/1, attribute FPGA_mask_RW
origin = DeviceProxy::read_attribute()
reason = API_AttributeFailed
severity = ERR]
]
%% Cell type:code id:b88868c5 tags:
``` python
wgswitches = d.FPGA_wg_enable_R
print("Old values:\n", wgswitches)
wgswitches[9][0] = True
wgswitches[10][0] = True
print("Values to be set:\n", wgswitches)
d.FPGA_wg_enable_RW =wgswitches
time.sleep(7)
print("Values read back after setting:\n",d.FPGA_wg_enable_R)
```
%% Output
array([[1., 1., 1., 1., 1., 1., 1., 1., 1., 1., 1., 1., 1., 1., 1., 1.],
[1., 1., 1., 1., 1., 1., 1., 1., 1., 1., 1., 1., 1., 1., 1., 1.],
[1., 1., 1., 1., 0., 0., 0., 0., 0., 0., 0., 0., 0., 0., 0., 0.],
[0., 0., 0., 0., 0., 0., 0., 0., 0., 0., 0., 0., 0., 0., 0., 0.],
[0., 0., 0., 0., 0., 0., 0., 0., 0., 0., 0., 0., 0., 0., 0., 0.],
[0., 0., 0., 0., 0., 0., 0., 0., 0., 0., 0., 0., 0., 0., 0., 0.],
[0., 0., 0., 0., 0., 0., 0., 0., 0., 0., 0., 0., 0., 0., 0., 0.],
[0., 0., 0., 0., 0., 0., 0., 0., 0., 0., 0., 0., 0., 0., 0., 0.],
[0., 0., 0., 0., 0., 0., 0., 0., 0., 0., 0., 0., 0., 0., 0., 0.],
[0., 0., 0., 0., 0., 0., 0., 0., 0., 0., 0., 0., 0., 0., 0., 0.],
[0., 0., 0., 0., 0., 0., 0., 0., 0., 0., 0., 0., 0., 0., 0., 0.],
[0., 0., 0., 0., 0., 0., 0., 0., 0., 0., 0., 0., 0., 0., 0., 0.]],
dtype=float32)
%% Cell type:code id:8f3db8c7 tags:
``` python
phases = d.FPGA_wg_phase_R
print("Old values:\n", phases)
phases[9][0] = 1.0334
phases[9][1] = 20.15
phases[10][0] = 130
print("Values to be set:\n", phases)
d.FPGA_wg_phase_RW = phases
time.sleep(7)
print("Values read back after setting:\n", d.FPGA_wg_phase_R)
```
%% Output
array([[119.99817, 119.99817, 119.99817, 119.99817, 119.99817, 119.99817,
119.99817, 119.99817, 119.99817, 119.99817, 119.99817, 119.99817,
119.99817, 119.99817, 119.99817, 119.99817],
[119.99817, 119.99817, 119.99817, 119.99817, 119.99817, 119.99817,
119.99817, 119.99817, 119.99817, 119.99817, 119.99817, 119.99817,
119.99817, 119.99817, 119.99817, 119.99817],
[119.99817, 119.99817, 119.99817, 119.99817, 0. , 0. ,
0. , 0. , 0. , 0. , 0. , 0. ,
0. , 0. , 0. , 0. ],
[ 0. , 0. , 0. , 0. , 0. , 0. ,
0. , 0. , 0. , 0. , 0. , 0. ,
0. , 0. , 0. , 0. ],
[ 0. , 0. , 0. , 0. , 0. , 0. ,
0. , 0. , 0. , 0. , 0. , 0. ,
0. , 0. , 0. , 0. ],
[ 0. , 0. , 0. , 0. , 0. , 0. ,
0. , 0. , 0. , 0. , 0. , 0. ,
0. , 0. , 0. , 0. ],
[ 0. , 0. , 0. , 0. , 0. , 0. ,
0. , 0. , 0. , 0. , 0. , 0. ,
0. , 0. , 0. , 0. ],
[ 0. , 0. , 0. , 0. , 0. , 0. ,
0. , 0. , 0. , 0. , 0. , 0. ,
0. , 0. , 0. , 0. ],
[ 0. , 0. , 0. , 0. , 0. , 0. ,
0. , 0. , 0. , 0. , 0. , 0. ,
0. , 0. , 0. , 0. ],
[ 0. , 0. , 0. , 0. , 0. , 0. ,
0. , 0. , 0. , 0. , 0. , 0. ,
0. , 0. , 0. , 0. ],
[ 0. , 0. , 0. , 0. , 0. , 0. ,
0. , 0. , 0. , 0. , 0. , 0. ,
0. , 0. , 0. , 0. ],
[ 0. , 0. , 0. , 0. , 0. , 0. ,
0. , 0. , 0. , 0. , 0. , 0. ,
0. , 0. , 0. , 0. ]], dtype=float32)
%% Cell type:code id:e45b4874 tags:
``` python
amplitudes = d.FPGA_wg_amplitude_R
print("Old values:\n", amplitudes)
amplitudes[9][0] = 1.0
amplitudes[9][1] = 1.99
amplitudes[10][0] = 0.5
print("Values to be set:\n", amplitudes)
d.FPGA_wg_amplitude_RW = amplitudes
time.sleep(7)
print("Values read back after setting:\n", d.FPGA_wg_amplitude_R)
```
%% Output
array([[29921878., 29921878., 29921878., 29921878., 29921878., 29921878.,
29921878., 29921878., 29921878., 29921878., 29921878., 29921878.,
29921878., 29921878., 29921878., 29921878.],
[29921878., 29921878., 29921878., 29921878., 29921878., 29921878.,
29921878., 29921878., 29921878., 29921878., 29921878., 29921878.,
29921878., 29921878., 29921878., 29921878.],
[29921878., 29921878., 29921878., 29921878., 0., 0.,
0., 0., 0., 0., 0., 0.,
0., 0., 0., 0.],
[ 0., 0., 0., 0., 0., 0.,
0., 0., 0., 0., 0., 0.,
0., 0., 0., 0.],
[ 0., 0., 0., 0., 0., 0.,
0., 0., 0., 0., 0., 0.,
0., 0., 0., 0.],
[ 0., 0., 0., 0., 0., 0.,
0., 0., 0., 0., 0., 0.,
0., 0., 0., 0.],
[ 0., 0., 0., 0., 0., 0.,
0., 0., 0., 0., 0., 0.,
0., 0., 0., 0.],
[ 0., 0., 0., 0., 0., 0.,
0., 0., 0., 0., 0., 0.,
0., 0., 0., 0.],
[ 0., 0., 0., 0., 0., 0.,
0., 0., 0., 0., 0., 0.,
0., 0., 0., 0.],
[ 0., 0., 0., 0., 0., 0.,
0., 0., 0., 0., 0., 0.,
0., 0., 0., 0.],
[ 0., 0., 0., 0., 0., 0.,
0., 0., 0., 0., 0., 0.,
0., 0., 0., 0.],
[ 0., 0., 0., 0., 0., 0.,
0., 0., 0., 0., 0., 0.,
0., 0., 0., 0.]], dtype=float32)
%% Cell type:code id:9b1bbd3e tags:
``` python
frequencies = d.FPGA_wg_frequency_R
print("Old values:\n", frequencies)
frequencies[9][0] = 19000000
frequencies[9][1] = 20000000
frequencies[10][0] = 22000000
print("Values to be set:\n", frequencies)
d.FPGA_wg_frequency_RW = frequencies
print("Values read back after setting:\n", d.FPGA_wg_frequency_R)
```
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Please register or to comment