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LOFAR2.0
tango
Commits
1ffe28f5
Commit
1ffe28f5
authored
2 years ago
by
Jan David Mol
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L2SS-769
: Fix circular dependencies, types
parent
8c9ecad3
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1 merge request
!317
Resolve L2SS-769 "Implement digital beam"
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1
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tangostationcontrol/tangostationcontrol/devices/sdp/sdp.py
+16
-9
16 additions, 9 deletions
tangostationcontrol/tangostationcontrol/devices/sdp/sdp.py
with
16 additions
and
9 deletions
tangostationcontrol/tangostationcontrol/devices/sdp/sdp.py
+
16
−
9
View file @
1ffe28f5
...
@@ -189,14 +189,19 @@ class SDP(opcua_device):
...
@@ -189,14 +189,19 @@ class SDP(opcua_device):
antenna_type_R
=
attribute
(
doc
=
'
Type of antenna (LBA or HBA) attached to the FPGAs
'
,
antenna_type_R
=
attribute
(
doc
=
'
Type of antenna (LBA or HBA) attached to the FPGAs
'
,
dtype
=
numpy
.
str
,
fget
=
lambda
self
:
self
.
AntennaType
)
dtype
=
numpy
.
str
,
fget
=
lambda
self
:
self
.
AntennaType
)
nyquist_zone_R
=
attribute
(
doc
=
'
Nyquist zone of the input frequencies
'
,
nyquist_zone_R
=
attribute
(
doc
=
'
Nyquist zone of the input frequencies
'
,
dtype
=
numpy
.
uint32
,
fisallowed
=
"
is_attribute_
W
rapper_allowed
"
,
dtype
=
numpy
.
uint32
,
fisallowed
=
"
is_attribute_
w
rapper_allowed
"
,
polling_period
=
1000
,
abs_change
=
1
)
polling_period
=
1000
,
abs_change
=
1
)
clock_RW
=
attribute
(
doc
=
'
Configured sampling clock (Hz)
'
,
clock_RW
=
attribute
(
doc
=
'
Configured sampling clock (Hz)
'
,
dtype
=
numpy
.
uint32
,
access
=
AttrWriteType
.
READ_WRITE
,
fisallowed
=
"
is_attribute_
W
rapper_allowed
"
,
dtype
=
numpy
.
uint32
,
access
=
AttrWriteType
.
READ_WRITE
,
fisallowed
=
"
is_attribute_
w
rapper_allowed
"
,
polling_period
=
1000
,
abs_change
=
1
)
polling_period
=
1000
,
abs_change
=
1
)
def
read_nyquist_zone_R
(
self
)
->
int
:
def
_nyquist_zone
(
self
,
clock
):
"""
Return the nyquist zone of the given antenna.
"""
"""
Return the Nyquist zone for the given clock (in Hz).
The Nyquist zone determines the frequency offset of
the antennas.
NOTE: Only 160 and 200 MHz clocks are supported.
"""
# (AntennaType, clockMHz) -> Nyquist zone
# (AntennaType, clockMHz) -> Nyquist zone
nyquist_zones
=
{
nyquist_zones
=
{
...
@@ -207,10 +212,12 @@ class SDP(opcua_device):
...
@@ -207,10 +212,12 @@ class SDP(opcua_device):
}
}
try
:
try
:
return
nyquist_zones
[(
self
.
AntennaType
),
(
self
.
read_attribute
(
"
clock_RW
"
)
//
1000000
)
]
return
nyquist_zones
[(
self
.
AntennaType
),
clock
//
1000000
]
except
KeyError
:
except
KeyError
:
return
-
1
raise
ValueError
(
f
"
Could not determine Nyquist zone for antenna type
{
self
.
AntennaType
}
with clock
{
clock
}
Hz
"
)
#raise ValueError(f"Could not determine Nyquist zone for antenna type {self.AntennaType} clock {self._clock}")
def
read_nyquist_zone_R
(
self
):
return
self
.
_nyquist_zone
(
self
.
read_attribute
(
"
clock_RW
"
))
def
read_clock_RW
(
self
):
def
read_clock_RW
(
self
):
# We can only return a single value, so we assume the FPGA is configured coherently. Which is something
# We can only return a single value, so we assume the FPGA is configured coherently. Which is something
...
@@ -220,7 +227,7 @@ class SDP(opcua_device):
...
@@ -220,7 +227,7 @@ class SDP(opcua_device):
clocks_in_mask
=
[
clock
for
idx
,
clock
in
enumerate
(
clocks
)
if
mask
[
idx
]]
clocks_in_mask
=
[
clock
for
idx
,
clock
in
enumerate
(
clocks
)
if
mask
[
idx
]]
# We return first setting within the mask. If there are no FPGAs selected at all, just return a sane default.
# We return first setting within the mask. If there are no FPGAs selected at all, just return a sane default.
return
clocks_in_mask
[
0
]
if
clocks_in_mask
else
self
.
clock_RW_default
return
numpy
.
uint32
(
clocks_in_mask
[
0
]
)
if
clocks_in_mask
else
self
.
clock_RW_default
def
write_clock_RW
(
self
,
clock
):
def
write_clock_RW
(
self
,
clock
):
if
clock
not
in
(
160
*
1000000
,
200
*
1000000
):
if
clock
not
in
(
160
*
1000000
,
200
*
1000000
):
...
@@ -230,7 +237,7 @@ class SDP(opcua_device):
...
@@ -230,7 +237,7 @@ class SDP(opcua_device):
self
.
proxy
.
FPGA_pps_expected_cnt_RW
=
[
clock
]
*
self
.
N_pn
self
.
proxy
.
FPGA_pps_expected_cnt_RW
=
[
clock
]
*
self
.
N_pn
# Also update the packet headers
# Also update the packet headers
self
.
proxy
.
FPGA_sdp_info_nyquist_sampling_zone_index_RW
=
[
self
.
read_attribute
(
"
nyquist_zone
_R
"
)]
*
self
.
N_pn
self
.
proxy
.
FPGA_sdp_info_nyquist_sampling_zone_index_RW
=
[
self
.
_
nyquist_zone
(
clock
)]
*
self
.
N_pn
# ----------
# ----------
# Summarising Attributes
# Summarising Attributes
...
...
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