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Commit 157f99f7 authored by Jan David Mol's avatar Jan David Mol
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L2SS-741: Renamed sdp.FPGA_signal_input_nof_packets_R to sdp.FPGA_signal_input_nof_blocks_R

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tangostationcontrol/tangostationcontrol/devices/sdp/sdp.py
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......@@ -165,7 +165,7 @@ class SDP(opcua_device):
FPGA_jesd204b_rx_err1_R = attribute_wrapper(comms_annotation=["FPGA_jesd204b_rx_err1_R"], datatype=numpy.uint32, dims=(S_pn, N_pn))
FPGA_signal_input_bsn_R = attribute_wrapper(comms_annotation=["FPGA_signal_input_bsn_R"], datatype=numpy.int64, dims=(N_pn,))
FPGA_signal_input_nof_packets_R = attribute_wrapper(comms_annotation=["FPGA_signal_input_nof_packets_R"], datatype=numpy.int32, dims=(N_pn,))
FPGA_signal_input_nof_blocks_R = attribute_wrapper(comms_annotation=["FPGA_signal_input_nof_blocks_R"], datatype=numpy.int32, dims=(N_pn,))
FPGA_signal_input_nof_samples_R = attribute_wrapper(comms_annotation=["FPGA_signal_input_nof_samples_R"], datatype=numpy.int32, dims=(N_pn,))
FPGA_signal_input_samples_delay_R = attribute_wrapper(comms_annotation=["FPGA_signal_input_samples_delay_R"], datatype=numpy.uint32, dims=(S_pn, N_pn))
FPGA_signal_input_samples_delay_RW = attribute_wrapper(comms_annotation=["FPGA_signal_input_samples_delay_RW"], datatype=numpy.uint32, dims=(S_pn, N_pn), access=AttrWriteType.READ_WRITE)
......
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