sdp.rst

SDP

The sdp == DeviceProxy("STAT/SDP/1")` device controls the digital signal processing in SDP, performed by the firmware on the FPGAs on the Uniboards. Central to its operation is the mask (see also :ref:`attribute-masks`):

TR_fpga_mask_RW:	Controls which FPGAs will actually be configured when attributes referring to FPGAs are written. type: bool[N_fpgas]

Typically, N_fpgas == 16.

See the following links for a full description of the SDP monitoring and control points:

• https://support.astron.nl/confluence/pages/viewpage.action?spaceKey=L2M&title=L2+STAT+Decision%3A+SC+-+SDP+OPC-UA+interface
• https://plm.astron.nl/polarion/#/project/LOFAR2System/wiki/L2%20Interface%20Control%20Documents/SC%20to%20SDP%20ICD

Basic configuration

The following points are significant for the operations of this device:

FPGA_processing_enable_R:	Whether the FPGA is processing its input. type: bool[N_fpgas]
TR_fpga_communication_error_R:	Whether the FPGAs can be reached. type: bool[N_fpgas]

Data-quality information

The following fields describe the data quality:

FPGA_signal_input_mean_R:	Mean value of the last second of input (in ADC quantisation units). Should be close to 0. type: double[N_fpgas][N_ants_per_fpga]
FPGA_signal_input_rms_R:	Root means square value of the last second of input (in ADC quantisation units). rms^2 = mean^2 + std^2. Values above 2048 indicate strong RFI. type: double[N_fpgas][N_ants_per_fpga]

Version Information

The following fields provide version information:

FPGA_firmware_version_R:	The active firmware images. type: str[N_fpgas]
FPGA_hardware_version_R:	The versions of the boards hosting the FPGAs. type: str[N_fpgas]
TR_software_version_R:	The version of the server providing the OPC-UA interface. type: str[N_fpgas]

Waveform Generator

The antenna input of SDP can be replaced by an internal waveform generator for debugging and testing purposes. The generator is configured per antenna per FPGA:

Note

The Waveform Generator needs to be toggled off and on using FPGA_wg_enable_RW for new settings to become active on the station.

FPGA_wg_enable_RW:	Whether the waveform generator is enabled for each input. type: bool[N_fpgas][N_ants_per_fpga]
FPGA_wg_phase_RW:	The phases of the generated waves (in degrees). The generator needs to be turned off and on if this is changed, in order to bring the generators in sync. type: float32[N_fpgas][N_ants_per_fpga]
FPGA_wg_frequency_RW:	The frequencies of the generated waves (in Hz). The frequency of a subband s is LBA: s * 200e6/1024, HBA low band: (512 + s) * 200e6/1024, HBA high band: (1024 + s) * 200e6/1024. type: float32[N_fpgas][N_ants_per_fpga]
FPGA_wg_amplitude_RW:	The amplitudes of the generated waves. Useful is a value of 0.1, as higher risks clipping. type: float32[N_fpgas][N_ants_per_fpga]

Usage example

For example, the following code inserts a wave on LBA subband 102 on FPGAs 8 - 11:

# configure FPGAs to control
sdp.TR_fpga_mask_RW = [False] * 8 + [True] * 4 + [False] * 4

# configure waveform generator
sdp.FPGA_wg_phase_RW     = [[0] * 12] * 16
sdp.FPGA_wg_amplitude_RW = [[0.1] * 12] * 16
sdp.FPGA_wg_frequency_RW = [[102 * 200e6/1024] * 12] * 16

# toggle and enable waveform generator
sdp.FPGA_wg_enable_RW = [[False] * 12] * 16
sdp.FPGA_wg_enable_RW = [[True] * 12] * 16