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Commit d53092fe authored by Gijs Schoonderbeek's avatar Gijs Schoonderbeek
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SPI checking switch registers

parent 2a86f3fe
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1 merge request!2Modified the scripts to run on Raspberry Pi.
...@@ -18,6 +18,7 @@ file used to read and write to switch registers ...@@ -18,6 +18,7 @@ file used to read and write to switch registers
""" """
import time import time
import sys
import spidev import spidev
DEBUG=False DEBUG=False
...@@ -57,7 +58,7 @@ def write_register(addr, data): ...@@ -57,7 +58,7 @@ def write_register(addr, data):
stri = 'write_register 0x{:0>2x} = 0x{:0>2x}'.format(addr, data) stri = 'write_register 0x{:0>2x} = 0x{:0>2x}'.format(addr, data)
print(stri) print(stri)
def read_switch(page, addr): def read_switch(page, addr, pr_stri = True):
stri = '<< read switch from page: 0x{0:0>2x}, address: 0x{1:0>2x}'.format(page, addr) stri = '<< read switch from page: 0x{0:0>2x}, address: 0x{1:0>2x}'.format(page, addr)
ret = spi.xfer2([cmd_normal_write, 0xff, page]) ret = spi.xfer2([cmd_normal_write, 0xff, page])
ret = spi.xfer2([cmd_normal_read, addr, 0, 0, 0, 0]) ret = spi.xfer2([cmd_normal_read, addr, 0, 0, 0, 0])
...@@ -65,19 +66,20 @@ def read_switch(page, addr): ...@@ -65,19 +66,20 @@ def read_switch(page, addr):
if (ret[2] & 0xf0) == 0xa0: if (ret[2] & 0xf0) == 0xa0:
ret = read_register(0xf0) ret = read_register(0xf0)
ret.reverse() ret.reverse()
if pr_stri:
stri += " data 0x" stri += " data 0x"
for byte in ret: for byte in ret:
stri += "{:0>2x}".format(byte) stri += "{:0>2x}".format(byte)
print(stri) print(stri)
else: else:
print("read error") print("read error")
return ret
def write_switch_bytes(page, addr, data): def write_switch_bytes(page, addr, data):
stri = '> write switch from page: 0x{0:0>2x}, address: 0x{1:0>2x} data 0x'.format(page, addr) stri = '> write switch from page: 0x{0:0>2x}, address: 0x{1:0>2x} data 0x'.format(page, addr)
pl_bytes = data for byte_cnt in range(len(data)):
pl_bytes.reverse() # add_stri = "{0:0>2x}".format(data[len(data)-1-byte_cnt])
for data_byte in pl_bytes: add_stri = "{0:0>2x}".format(data[-1-byte_cnt])
add_stri = "{0:0>2x}".format(data_byte)
stri += add_stri stri += add_stri
print(stri) print(stri)
read_register(0xfe) read_register(0xfe)
...@@ -85,12 +87,59 @@ def write_switch_bytes(page, addr, data): ...@@ -85,12 +87,59 @@ def write_switch_bytes(page, addr, data):
wr_bytes = [cmd_normal_write, addr] wr_bytes = [cmd_normal_write, addr]
wr_bytes.extend(data) wr_bytes.extend(data)
ret = spi.xfer2(wr_bytes) ret = spi.xfer2(wr_bytes)
print("SPI status reg 0x{:0>2x}".format(read_register(0xfe)[2])) ret = read_register(0xfe)[2]
if ret != 0:
print("write error, not enough words written")
if DEBUG: if DEBUG:
read_register(0xfe) read_register(0xfe)
read_register(0xfe) read_register(0xfe)
read_register(addr) read_register(addr)
def read_link_status(ports=4):
print("links status register")
ret = read_switch(0x01,0x00, pr_stri=False)
stri = "|15 |14 |13 |12 |11 |10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |"
print(stri)
stri = "| "
for cnt_port in range(16):
if ret[3] & (0x8000 >> cnt_port) :
stri += "U | "
else:
stri += " | "
print(stri)
for cnt in range(ports):
stri = "Port status phy nr {} ".format(cnt)
ret = read_switch(0x01,0x20+cnt, pr_stri = False)
if ret[1] & 0x01:
stri += "link up "
if ret[1] & 0x02:
stri += "dupplex "
else:
stri += "simplex "
if ret[1] & 0x4:
stri += " 100M "
elif ret[1] & 0x8:
stri += "1000M "
else:
stri += " 10M "
ret = read_switch(0x10+cnt,0x28, pr_stri = False)
if ret[1] & 0x01:
stri += "SGMII "
else:
stri += "SERDES "
if ret[2] & 0x08:
stri += "Tx: Er "
if ret[2] & 0x04:
stri += "Rx: Er "
if ret[2] & 0x40:
stri += "Rx FIFO: Er "
else:
stri += "link down "
print(stri)
# Read phy registister status
# read_switch(0x80+cnt,0x1e)
# Open a connection to a specific bus and device (chip select pin) # Open a connection to a specific bus and device (chip select pin)
spi.open(bus, device) spi.open(bus, device)
...@@ -100,21 +149,53 @@ spi.max_speed_hz = 1000000 ...@@ -100,21 +149,53 @@ spi.max_speed_hz = 1000000
#spi.max_speed_hz = 50000 #spi.max_speed_hz = 50000
spi.mode = 1 spi.mode = 1
if len(sys.argv) < 2:
print(sys.argv)
print("write and read led register") print("write and read led register")
write_switch_bytes(0x00, 0x24, [0x20, 0x02]) # lsb first write_switch_bytes(0x00, 0x24, [0x20, 0x02]) #LSB first
read_switch(0x00,0x24) read_switch(0x00,0x24)
print("links status register") print("write and read jumbo register")
read_switch(0x01,0x00) write_switch_bytes(0x40, 0x01, [0xff, 0xff, 0x00, 0x00])
read_switch(0x40,0x01)
print("strap resistors")
read_switch(0x01,0x70)
read_link_status(4)
elif sys.argv[1] == "stat":
read_link_status(4)
elif sys.argv[1] == "set":
print("write and read led register")
write_switch_bytes(0x00, 0x24, [0x20, 0x02]) #LSB first
read_switch(0x00,0x24)
print("write and read jumbo register")
write_switch_bytes(0x40, 0x01, [0xff, 0xff, 0x00, 0x00])
read_switch(0x40,0x01)
print("strap resistors") print("strap resistors")
read_switch(0x01,0x70) read_switch(0x01,0x70)
for cnt in range(4): print("write and read SGMII register CH0")
print("Port status phy nr {}".format(cnt)) write_switch_bytes(0x10, 0x24, [0x44, 0x00])
read_switch(0x01,0x20+cnt) read_switch(0x10,0x24)
print("write and read SGMII register CH3")
write_switch_bytes(0x13, 0x24, [0x44, 0x00])
read_switch(0x13,0x24)
else:
print("spi_switch_Unb2c stat for status")
print("spi_switch_Unb2c set to set registers")
# Not working as espected
#print("switch off ch 0")
#write_switch_bytes(0x10, 0x00, [0x18, 0x40, 0x18, 0x40])
#read_switch(0x10,0x00)
if 0:
print("Tx pause status ") print("Tx pause status ")
read_switch(0x01,0x14) read_switch(0x01,0x14)
print("Rx pause status ") print("Rx pause status ")
read_switch(0x01,0x18) read_switch(0x01,0x18)
write_switch_bytes(0x30, 0x00, [0x40]) # lsb first write_switch_bytes(0x30, 0x00, [0x40])
read_switch(0x30,0x00) read_switch(0x30,0x00)
write_switch_bytes(0x00, 0x20, [0x11])
read_switch(0x00,0x20)
spi.close() spi.close()
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