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LOFAR2.0
python_test_scripts
Commits
33d18798
Commit
33d18798
authored
Oct 14, 2021
by
Gijs Schoonderbeek
Browse files
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Plain Diff
L2SDP-507
+ From multi dim. to single dim array
parent
2178057a
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Jupyter_Pages/UNB2C_HW_Monitor.ipynb
+110
-87
110 additions, 87 deletions
Jupyter_Pages/UNB2C_HW_Monitor.ipynb
with
110 additions
and
87 deletions
Jupyter_Pages/UNB2C_HW_Monitor.ipynb
+
110
−
87
View file @
33d18798
...
...
@@ -11,7 +11,18 @@
},
{
"cell_type": "code",
"execution_count": 170,
"execution_count": 1,
"id": "c2ace952",
"metadata": {},
"outputs": [],
"source": [
"import time\n",
"import numpy as np"
]
},
{
"cell_type": "code",
"execution_count": 2,
"id": "dd54c19e",
"metadata": {
"scrolled": true
...
...
@@ -25,48 +36,60 @@
"Atttibutes of pcc are: \n",
"*********\n",
"version_R\n",
"UNB2_Power_ON_OFF_RW\n",
"UNB2_Front_Panel_LED_RW\n",
"UNB2_Front_Panel_LED_R\n",
"UNB2_mask_RW\n",
"UNB2_I2C_bus_STATUS_R\n",
"UNB2_EEPROM_Unique_ID_R\n",
"UNB2_DC_DC_48V_12V_VIN_R\n",
"UNB2_DC_DC_48V_12V_VOUT_R\n",
"opcua_missing_attributes_R\n",
"UNB2TR_translator_busy_R\n",
"UNB2_DC_DC_48V_12V_IOUT_R\n",
"UNB2_DC_DC_48V_12V_TEMP_R\n",
"UNB2_POL_QSFP_N01_VOUT_R\n",
"UNB2_POL_QSFP_N01_IOUT_R\n",
"UNB2_POL_QSFP_N01_TEMP_R\n",
"UNB2_POL_QSFP_N23_VOUT_R\n",
"UNB2_POL_QSFP_N23_IOUT_R\n",
"UNB2_POL_QSFP_N23_TEMP_R\n",
"UNB2_POL_SWITCH_1V2_VOUT_R\n",
"UNB2_POL_SWITCH_1V2_IOUT_R\n",
"UNB2_POL_SWITCH_1V2_TEMP_R\n",
"UNB2_POL_SWITCH_PHY_VOUT_R\n",
"UNB2_POL_SWITCH_PHY_IOUT_R\n",
"UNB2_POL_SWITCH_PHY_TEMP_R\n",
"UNB2_POL_CLOCK_VOUT_R\n",
"UNB2_POL_CLOCK_IOUT_R\n",
"UNB2_POL_CLOCK_TEMP_R\n",
"UNB2_DC_DC_48V_12V_VIN_R\n",
"UNB2_DC_DC_48V_12V_VOUT_R\n",
"UNB2_EEPROM_Serial_Number_R\n",
"UNB2_EEPROM_Unique_ID_R\n",
"UNB2_FPGA_DDR4_SLOT_TEMP_R\n",
"UNB2_FPGA_POL_CORE_IOUT_R\n",
"UNB2_FPGA_POL_CORE_TEMP_R\n",
"UNB2_FPGA_POL_
ERAM
_VOUT_R\n",
"UNB2_FPGA_POL_
CORE
_VOUT_R\n",
"UNB2_FPGA_POL_ERAM_IOUT_R\n",
"UNB2_FPGA_POL_ERAM_TEMP_R\n",
"UNB2_FPGA_POL_RXGXB_VOUT_R\n",
"UNB2_FPGA_POL_RXGXB_IOUT_R\n",
"UNB2_FPGA_POL_RXGXB_TEMP_R\n",
"UNB2_FPGA_POL_TXGXB_VOUT_R\n",
"UNB2_FPGA_POL_TXGXB_IOUT_R\n",
"UNB2_FPGA_POL_HGXB_VOUT_R\n",
"UNB2_FPGA_POL_ERAM_VOUT_R\n",
"UNB2_FPGA_POL_HGXB_IOUT_R\n",
"UNB2_FPGA_POL_HGXB_TEMP_R\n",
"UNB2_FPGA_POL_
PGM
_VOUT_R\n",
"UNB2_FPGA_POL_
HGXB
_VOUT_R\n",
"UNB2_FPGA_POL_PGM_IOUT_R\n",
"UNB2_FPGA_POL_PGM_TEMP_R\n",
"UNB2_FPGA_POL_PGM_VOUT_R\n",
"UNB2_FPGA_POL_RXGXB_IOUT_R\n",
"UNB2_FPGA_POL_RXGXB_TEMP_R\n",
"UNB2_FPGA_POL_RXGXB_VOUT_R\n",
"UNB2_FPGA_POL_TXGXB_IOUT_R\n",
"UNB2_FPGA_POL_TXGXB_TEMP_R\n",
"UNB2_FPGA_POL_TXGXB_VOUT_R\n",
"UNB2_FPGA_QSFP_CAGE_LOS_R\n",
"UNB2_FPGA_QSFP_CAGE_TEMP_R\n",
"UNB2_Front_Panel_LED_R\n",
"UNB2_Front_Panel_LED_RW\n",
"UNB2_I2C_bus_DDR4_error_R\n",
"UNB2_I2C_bus_error_R\n",
"UNB2_I2C_bus_FPGA_PS_error_R\n",
"UNB2_I2C_bus_PS_error_R\n",
"UNB2_I2C_bus_QSFP_error_R\n",
"UNB2_mask_RW\n",
"UNB2_POL_CLOCK_IOUT_R\n",
"UNB2_POL_CLOCK_TEMP_R\n",
"UNB2_POL_CLOCK_VOUT_R\n",
"UNB2_POL_QSFP_N01_IOUT_R\n",
"UNB2_POL_QSFP_N01_TEMP_R\n",
"UNB2_POL_QSFP_N01_VOUT_R\n",
"UNB2_POL_QSFP_N23_IOUT_R\n",
"UNB2_POL_QSFP_N23_TEMP_R\n",
"UNB2_POL_QSFP_N23_VOUT_R\n",
"UNB2_POL_SWITCH_1V2_IOUT_R\n",
"UNB2_POL_SWITCH_1V2_TEMP_R\n",
"UNB2_POL_SWITCH_1V2_VOUT_R\n",
"UNB2_POL_SWITCH_PHY_IOUT_R\n",
"UNB2_POL_SWITCH_PHY_TEMP_R\n",
"UNB2_POL_SWITCH_PHY_VOUT_R\n",
"UNB2_PWR_off_R\n",
"UNB2_PWR_off_RW\n",
"State\n",
"Status\n",
"*********\n",
...
...
@@ -105,7 +128,7 @@
},
{
"cell_type": "code",
"execution_count": 1
74
,
"execution_count": 1
0
,
"id": "51d0443c",
"metadata": {
"scrolled": true
...
...
@@ -119,14 +142,14 @@
"|---------|----------|----------|----------|----------|----------|----------|\n",
"| BRD nr. | Node nr. | Core pol | ERAM pol | TrRx pol | TxHx pol | IO pol |\n",
"|---------|----------|----------|----------|----------|----------|----------|\n",
"| 0 | 0 |
28.9
°C | 36.
1
°C | 32.
1
°C | 3
7.8
°C | 3
7.4
°C |\n",
"| 0 | 1 |
29
.5 °C | 3
6.8
°C | 3
4.9
°C |
39.0
°C |
39.8
°C |\n",
"| 0 | 2 | 30.
4
°C | 38.
6
°C | 33.
4
°C | 4
1.4
°C | 4
1.4
°C |\n",
"| 0 | 3 | 3
2.8
°C | 3
8.8
°C | 34.
9
°C | 38.
2
°C | 3
7.8
°C |\n",
"| 1 | 0 |
28.9
°C | 36.
1
°C | 32.
1
°C | 3
7.8
°C | 3
7.4
°C |\n",
"| 1 | 1 |
29
.5 °C | 3
6.8
°C | 3
4.9
°C |
39.0
°C |
39.8
°C |\n",
"| 1 | 2 | 30.
4
°C | 38.
6
°C | 33.
4
°C | 4
1.4
°C | 4
1.4
°C |\n",
"| 1 | 3 | 3
2.8
°C | 3
8.8
°C | 34.
9
°C | 38.2 °C | 3
7.8
°C |\n",
"| 0 | 0 |
30.2
°C | 36.
2
°C | 32.
6
°C | 3
6.9
°C | 3
8.8
°C |\n",
"| 0 | 1 |
31
.5 °C | 3
7.4
°C | 3
5.4
°C |
40.3
°C |
41.4
°C |\n",
"| 0 | 2 | 30.
2
°C | 38.
4
°C | 33.
6
°C | 4
0.8
°C | 4
2.1
°C |\n",
"| 0 | 3 | 3
1.5
°C | 3
9.0
°C | 34.
6
°C | 38.
6
°C | 3
8.1
°C |\n",
"| 1 | 0 |
30.2
°C | 36.
2
°C | 32.
6
°C | 3
6.9
°C | 3
8.8
°C |\n",
"| 1 | 1 |
31
.5 °C | 3
7.4
°C | 3
5.4
°C |
40.3
°C |
41.4
°C |\n",
"| 1 | 2 | 30.
2
°C | 38.
4
°C | 33.
6
°C | 4
0.8
°C | 4
2.1
°C |\n",
"| 1 | 3 | 3
1.5
°C | 3
9.0
°C | 34.
6
°C | 38.2 °C | 3
8.1
°C |\n",
"|---------|----------|----------|----------|----------|----------|----------|\n",
"\n",
"FPGA point-of-load converte voltages\n",
...
...
@@ -147,28 +170,28 @@
"|---------|----------|----------|----------|----------|----------|----------|----------|\n",
"| BRD nr. | Node nr. | Core | ERAM | TrRx | TrTx | TxHx | IO |\n",
"|---------|----------|----------|----------|----------|----------|----------|----------|\n",
"| 0 | 0 | 5.9
5
A | 0.
09
A | 0.
4
0 A | 0.
06
A | 0.6
1
A | 0.
22
A |\n",
"| 0 | 1 |
4.16
A | 0.09 A | 0.
41
A | 0.0
8
A | 0.7
2
A | 0.21 A |\n",
"| 0 | 2 | 3.8
1
A | 0.
13
A | 0.4
8
A | 0.0
4
A | 0.7
3
A | 0.
1
7 A |\n",
"| 0 | 3 | 3.
6
1 A | 0.
14
A | 0.4
1
A | 0.1
4
A | 0.
73
A | 0.1
3
A |\n",
"| 1 | 0 | 5.9
5
A | 0.
09
A | 0.
4
0 A | 0.
06
A | 0.6
1
A | 0.
22
A |\n",
"| 1 | 1 |
4.16
A | 0.09 A | 0.
41
A | 0.0
8
A | 0.7
2
A | 0.21 A |\n",
"| 1 | 2 | 3.8
1
A | 0.
13
A | 0.4
8
A | 0.0
4
A | 0.7
3
A | 0.
1
7 A |\n",
"| 1 | 3 | 3.
6
1 A | 0.
14
A | 0.4
1
A | 0.
14
A | 0.7
3
A | 0.1
3
A |\n",
"| 0 | 0 | 5.9
2
A | 0.
14
A | 0.
5
0 A | 0.
14
A | 0.
5
6 A | 0.
16
A |\n",
"| 0 | 1 |
1.88
A | 0.09 A | 0.
37
A | 0.0
7
A | 0.7
6
A | 0.21 A |\n",
"| 0 | 2 | 3.8
0
A | 0.
22
A | 0.4
1
A | 0.0
3
A | 0.7
6
A | 0.
2
7 A |\n",
"| 0 | 3 | 3.
5
1 A | 0.
09
A | 0.4
7
A | 0.1
9
A | 0.
65
A | 0.1
2
A |\n",
"| 1 | 0 | 5.9
2
A | 0.
14
A | 0.
5
0 A | 0.
14
A | 0.
5
6 A | 0.
16
A |\n",
"| 1 | 1 |
1.88
A | 0.09 A | 0.
37
A | 0.0
7
A | 0.7
6
A | 0.21 A |\n",
"| 1 | 2 | 3.8
0
A | 0.
22
A | 0.4
1
A | 0.0
3
A | 0.7
6
A | 0.
2
7 A |\n",
"| 1 | 3 | 3.
5
1 A | 0.
09
A | 0.4
7
A | 0.
07
A | 0.7
7
A | 0.1
2
A |\n",
"|---------|----------|----------|----------|----------|----------|----------|----------|\n",
"\n",
"FPGA power consumption\n",
"|---------|----------|----------|----------|----------|----------|----------|----------|----------|\n",
"| BRD nr. | Node nr. | Core pwr | ERAM pwr | TrRx pwr | TrTx pwr | TxHx pwr | IO pwr | Tot.FPGA |\n",
"|---------|----------|----------|----------|----------|----------|----------|----------|----------|\n",
"| 0 | 0 | 5.
7
W | 0.1 W | 0.4 W | 0.1 W | 1.
1
W | 0.
4
W | 7.6 W |\n",
"| 0 | 1 |
4.0
W | 0.1 W | 0.
4
W | 0.1 W | 1.
3
W | 0.4 W |
6.1
W |\n",
"| 0 | 2 | 3.6 W | 0.
1
W | 0.4 W | 0.0 W | 1.
3
W | 0.
3
W |
5.8
W |\n",
"| 0 | 3 | 3.
4
W | 0.1 W | 0.4 W | 0.
1
W | 1.
3
W | 0.2 W | 5.
6
W |\n",
"| 1 | 0 | 5.
7
W | 0.1 W | 0.4 W | 0.1 W | 1.
1
W | 0.
4
W | 7.6 W |\n",
"| 1 | 1 |
4.0
W | 0.1 W | 0.3 W | 0.1 W | 1.
3
W | 0.4 W |
6.1
W |\n",
"| 1 | 2 | 3.6 W | 0.
1
W | 0.4 W | 0.
1
W | 1.
3
W | 0.5 W |
5.9
W |\n",
"| 1 | 3 | 3.
4
W | 0.1 W | 0.4 W | 0.1 W | 1.
3
W | 0.2 W | 5.5 W |\n",
"| 0 | 0 | 5.
6
W | 0.1 W | 0.4 W | 0.1 W | 1.
0
W | 0.
3
W | 7.6 W |\n",
"| 0 | 1 |
1.8
W | 0.1 W | 0.
3
W | 0.1 W | 1.
4
W | 0.4 W |
4.0
W |\n",
"| 0 | 2 | 3.6 W | 0.
2
W | 0.4 W | 0.0 W | 1.
4
W | 0.
5
W |
6.1
W |\n",
"| 0 | 3 | 3.
3
W | 0.1 W | 0.4 W | 0.
2
W | 1.
2
W | 0.2 W | 5.
4
W |\n",
"| 1 | 0 | 5.
6
W | 0.1 W | 0.4 W | 0.1 W | 1.
0
W | 0.
3
W | 7.6 W |\n",
"| 1 | 1 |
1.8
W | 0.1 W | 0.3 W | 0.1 W | 1.
4
W | 0.4 W |
4.0
W |\n",
"| 1 | 2 | 3.6 W | 0.
2
W | 0.4 W | 0.
0
W | 1.
4
W | 0.5 W |
6.1
W |\n",
"| 1 | 3 | 3.
3
W | 0.1 W | 0.4 W | 0.1 W | 1.
4
W | 0.2 W | 5.5 W |\n",
"|---------|----------|----------|----------|----------|----------|----------|----------|----------|\n",
"\n",
"Board power supply voltages\n",
...
...
@@ -176,31 +199,31 @@
"| BRD nr. | QSFP N01 | QSFP N23 |Switch 1v2|Switch PHY| clk pwr | Tot. BRD |\n",
"|---------|----------|----------|----------|----------|----------|----------|\n",
"| 0 | 3.29 V | 3.29 V | 1.20 V | 1.00 V | 2.50 V | 11.99 V |\n",
"| 1 | 3.29 V | 3.29 V | 1.20 V | 1.00 V | 2.50 V | 11.9
9
V |\n",
"| 1 | 3.29 V | 3.29 V | 1.20 V | 1.00 V | 2.50 V | 11.9
8
V |\n",
"|---------|----------|----------|----------|----------|----------|----------|\n",
"\n",
"Board power supply currents\n",
"|---------|----------|----------|----------|----------|----------|----------|\n",
"| BRD nr. | QSFP N01 | QSFP N23 |Switch 1v2|Switch PHY| clk pwr | Tot. BRD |\n",
"|---------|----------|----------|----------|----------|----------|----------|\n",
"| 0 | 1.5
3
A | 1.27 A | 1.
60
A | 0.5
0
A | 0.
84
A | 3.
50
A |\n",
"| 1 | 1.5
3
A | 1.2
7
A | 1.
60
A | 0.5
0
A | 0.
84
A | 3.62 A |\n",
"| 0 | 1.5
7
A | 1.27 A | 1.
73
A | 0.5
2
A | 0.
93
A | 3.
62
A |\n",
"| 1 | 1.5
7
A | 1.2
8
A | 1.
73
A | 0.5
2
A | 0.
93
A | 3.62 A |\n",
"|---------|----------|----------|----------|----------|----------|----------|\n",
"\n",
"Board power supply temperatures, should be < 85°C\n",
"|---------|----------|----------|----------|----------|----------|----------|\n",
"| BRD nr. | QSFP N01 | QSFP N23 |Switch 1v2|Switch PHY| clk pwr | Tot. BRD |\n",
"|---------|----------|----------|----------|----------|----------|----------|\n",
"| 0 | 31.44 °C | 36.94 °C | 4
1.9
4 °C | 43.
5
0 °C |
40.50
°C | 3
4.5
0 °C |\n",
"| 1 | 31.44 °C | 36.94 °C | 4
1.9
4 °C | 43.
5
0 °C |
40.50
°C | 3
4.5
0 °C |\n",
"| 0 | 31.44 °C | 36.94 °C | 4
2.4
4 °C | 43.
0
0 °C |
39.81
°C | 3
5.0
0 °C |\n",
"| 1 | 31.44 °C | 36.94 °C | 4
2.4
4 °C | 43.
0
0 °C |
39.81
°C | 3
5.0
0 °C |\n",
"|---------|----------|----------|----------|----------|----------|----------|\n",
"\n",
"Board power consumption\n",
"|---------|----------|----------|----------|----------|----------|----------|----------|\n",
"| BRD nr. | QSFP N01 | QSFP N23 |Switch 1v2|Switch PHY| clk pwr | FPGAs pwr| Tot. BRD |\n",
"|---------|----------|----------|----------|----------|----------|----------|----------|\n",
"| 0 | 5.
03
W | 4.1
8
W |
1.86
W | 0.
43
W | 2.
48
W | 2
5.21
W | 43.4
6
W |\n",
"| 1 | 5.
03
W | 4.1
8
W |
1.86
W | 0.
43
W | 2.
48
W | 2
5.21
W | 43.4
6
W |\n",
"| 0 | 5.
17
W | 4.1
9
W |
2.07
W | 0.
52
W | 2.
33
W | 2
3.18
W | 43.4
8
W |\n",
"| 1 | 5.
17
W | 4.1
9
W |
2.07
W | 0.
52
W | 2.
33
W | 2
3.18
W | 43.4
5
W |\n",
"|---------|----------|----------|----------|----------|----------|----------|----------|\n"
]
}
...
...
@@ -216,11 +239,11 @@
"for brd_cnt in range(2):\n",
" for node_cnt in range(4):\n",
" stri = \"| {} | {} |\".format(brd_cnt, node_cnt) \n",
" stri +=\" {:5.1f} °C |\".format(unb2c.UNB2_FPGA_POL_CORE_TEMP_R[brd_cnt
,
node_cnt])\n",
" stri +=\" {:5.1f} °C |\".format(unb2c.UNB2_FPGA_POL_ERAM_TEMP_R[brd_cnt
,
node_cnt])\n",
" stri +=\" {:5.1f} °C |\".format(unb2c.UNB2_FPGA_POL_RXGXB_TEMP_R[brd_cnt
,
node_cnt])\n",
" stri +=\" {:5.1f} °C |\".format(unb2c.UNB2_FPGA_POL_HGXB_TEMP_R[brd_cnt
,
node_cnt])\n",
" stri +=\" {:5.1f} °C |\".format(unb2c.UNB2_FPGA_POL_PGM_TEMP_R[brd_cnt
,
node_cnt])\n",
" stri +=\" {:5.1f} °C |\".format(unb2c.UNB2_FPGA_POL_CORE_TEMP_R[
(
brd_cnt
*4) +
node_cnt])\n",
" stri +=\" {:5.1f} °C |\".format(unb2c.UNB2_FPGA_POL_ERAM_TEMP_R[
(
brd_cnt
*4) +
node_cnt])\n",
" stri +=\" {:5.1f} °C |\".format(unb2c.UNB2_FPGA_POL_RXGXB_TEMP_R[
(
brd_cnt
*4) +
node_cnt])\n",
" stri +=\" {:5.1f} °C |\".format(unb2c.UNB2_FPGA_POL_HGXB_TEMP_R[
(
brd_cnt
*4) +
node_cnt])\n",
" stri +=\" {:5.1f} °C |\".format(unb2c.UNB2_FPGA_POL_PGM_TEMP_R[
(
brd_cnt
*4) +
node_cnt])\n",
" print(stri)\n",
"print(\"|---------|----------|----------|----------|----------|----------|----------|\\n\")\n",
"if 1:\n",
...
...
@@ -236,11 +259,11 @@
" for node_cnt in range(4):\n",
" stri = \"| {} | {} |\".format(brd_cnt, node_cnt)\n",
" stri +=\" {:5.2f} V |\".format(0.95)\n",
" stri +=\" {:5.2f} V |\".format(unb2c.UNB2_FPGA_POL_ERAM_VOUT_R[brd_cnt
,
node_cnt])\n",
" stri +=\" {:5.2f} V |\".format(unb2c.UNB2_FPGA_POL_RXGXB_VOUT_R[brd_cnt
,
node_cnt])\n",
" stri +=\" {:5.2f} V |\".format(unb2c.UNB2_FPGA_POL_TXGXB_VOUT_R[brd_cnt
,
node_cnt])\n",
" stri +=\" {:5.2f} V |\".format(unb2c.UNB2_FPGA_POL_HGXB_VOUT_R[brd_cnt
,
node_cnt])\n",
" stri +=\" {:5.2f} V |\".format(unb2c.UNB2_FPGA_POL_PGM_VOUT_R[brd_cnt
,
node_cnt])\n",
" stri +=\" {:5.2f} V |\".format(unb2c.UNB2_FPGA_POL_ERAM_VOUT_R[
(
brd_cnt
*4) +
node_cnt])\n",
" stri +=\" {:5.2f} V |\".format(unb2c.UNB2_FPGA_POL_RXGXB_VOUT_R[
(
brd_cnt
*4) +
node_cnt])\n",
" stri +=\" {:5.2f} V |\".format(unb2c.UNB2_FPGA_POL_TXGXB_VOUT_R[
(
brd_cnt
*4) +
node_cnt])\n",
" stri +=\" {:5.2f} V |\".format(unb2c.UNB2_FPGA_POL_HGXB_VOUT_R[
(
brd_cnt
*4) +
node_cnt])\n",
" stri +=\" {:5.2f} V |\".format(unb2c.UNB2_FPGA_POL_PGM_VOUT_R[
(
brd_cnt
*4) +
node_cnt])\n",
" print(stri)\n",
" print(\"|---------|----------|----------|----------|----------|----------|----------|----------|\\n\")\n",
" #\n",
...
...
@@ -254,12 +277,12 @@
" fpgas_pwr = np.zeros(2)\n",
" for node_cnt in range(4):\n",
" stri = \"| {} | {} |\".format(brd_cnt, node_cnt)\n",
" stri +=\" {:5.2f} A |\".format(unb2c.UNB2_FPGA_POL_CORE_IOUT_R[brd_cnt
,
node_cnt])\n",
" stri +=\" {:5.2f} A |\".format(unb2c.UNB2_FPGA_POL_ERAM_IOUT_R[brd_cnt
,
node_cnt])\n",
" stri +=\" {:5.2f} A |\".format(unb2c.UNB2_FPGA_POL_RXGXB_IOUT_R[brd_cnt
,
node_cnt])\n",
" stri +=\" {:5.2f} A |\".format(unb2c.UNB2_FPGA_POL_TXGXB_IOUT_R[brd_cnt
,
node_cnt])\n",
" stri +=\" {:5.2f} A |\".format(unb2c.UNB2_FPGA_POL_HGXB_IOUT_R[brd_cnt
,
node_cnt])\n",
" stri +=\" {:5.2f} A |\".format(unb2c.UNB2_FPGA_POL_PGM_IOUT_R[brd_cnt
,
node_cnt])\n",
" stri +=\" {:5.2f} A |\".format(unb2c.UNB2_FPGA_POL_CORE_IOUT_R[
(
brd_cnt
*4) +
node_cnt])\n",
" stri +=\" {:5.2f} A |\".format(unb2c.UNB2_FPGA_POL_ERAM_IOUT_R[
(
brd_cnt
*4) +
node_cnt])\n",
" stri +=\" {:5.2f} A |\".format(unb2c.UNB2_FPGA_POL_RXGXB_IOUT_R[
(
brd_cnt
*4) +
node_cnt])\n",
" stri +=\" {:5.2f} A |\".format(unb2c.UNB2_FPGA_POL_TXGXB_IOUT_R[
(
brd_cnt
*4) +
node_cnt])\n",
" stri +=\" {:5.2f} A |\".format(unb2c.UNB2_FPGA_POL_HGXB_IOUT_R[
(
brd_cnt
*4) +
node_cnt])\n",
" stri +=\" {:5.2f} A |\".format(unb2c.UNB2_FPGA_POL_PGM_IOUT_R[
(
brd_cnt
*4) +
node_cnt])\n",
" print(stri)\n",
" print(\"|---------|----------|----------|----------|----------|----------|----------|----------|\\n\")\n",
"#\n",
...
...
@@ -273,17 +296,17 @@
" fpgas_pwr = np.zeros(2)\n",
" for node_cnt in range(4):\n",
" stri = \"| {} | {} |\".format(brd_cnt, node_cnt)\n",
" core_pwr = 0.95 * unb2c.UNB2_FPGA_POL_CORE_IOUT_R[brd_cnt
,
node_cnt]\n",
" core_pwr = 0.95 * unb2c.UNB2_FPGA_POL_CORE_IOUT_R[
(
brd_cnt
*4) +
node_cnt]\n",
" stri +=\" {:4.1f} W |\".format(core_pwr)\n",
" eram_pwr = unb2c.UNB2_FPGA_POL_ERAM_VOUT_R[brd_cnt
,
node_cnt]*unb2c.UNB2_FPGA_POL_ERAM_IOUT_R[brd_cnt
,
node_cnt]\n",
" eram_pwr = unb2c.UNB2_FPGA_POL_ERAM_VOUT_R[
(
brd_cnt
*4) +
node_cnt]*unb2c.UNB2_FPGA_POL_ERAM_IOUT_R[
(
brd_cnt
*4) +
node_cnt]\n",
" stri +=\" {:4.1f} W |\".format(eram_pwr)\n",
" rxgxb_pwr = unb2c.UNB2_FPGA_POL_RXGXB_VOUT_R[brd_cnt
,
node_cnt]*unb2c.UNB2_FPGA_POL_RXGXB_IOUT_R[brd_cnt
,
node_cnt]\n",
" rxgxb_pwr = unb2c.UNB2_FPGA_POL_RXGXB_VOUT_R[
(
brd_cnt
*4) +
node_cnt]*unb2c.UNB2_FPGA_POL_RXGXB_IOUT_R[
(
brd_cnt
*4) +
node_cnt]\n",
" stri +=\" {:4.1f} W |\".format(rxgxb_pwr)\n",
" txgxb_pwr = unb2c.UNB2_FPGA_POL_TXGXB_VOUT_R[brd_cnt
,
node_cnt]*unb2c.UNB2_FPGA_POL_TXGXB_IOUT_R[brd_cnt
,
node_cnt]\n",
" txgxb_pwr = unb2c.UNB2_FPGA_POL_TXGXB_VOUT_R[
(
brd_cnt
*4) +
node_cnt]*unb2c.UNB2_FPGA_POL_TXGXB_IOUT_R[
(
brd_cnt
*4) +
node_cnt]\n",
" stri +=\" {:4.1f} W |\".format(txgxb_pwr)\n",
" hgxb_pwre = unb2c.UNB2_FPGA_POL_HGXB_VOUT_R[brd_cnt
,
node_cnt]*unb2c.UNB2_FPGA_POL_HGXB_IOUT_R[brd_cnt
,
node_cnt]\n",
" hgxb_pwre = unb2c.UNB2_FPGA_POL_HGXB_VOUT_R[
(
brd_cnt
*4) +
node_cnt]*unb2c.UNB2_FPGA_POL_HGXB_IOUT_R[
(
brd_cnt
*4) +
node_cnt]\n",
" stri +=\" {:4.1f} W |\".format(hgxb_pwre)\n",
" pgm_pwr = unb2c.UNB2_FPGA_POL_PGM_VOUT_R[brd_cnt
,
node_cnt]*unb2c.UNB2_FPGA_POL_PGM_IOUT_R[brd_cnt
,
node_cnt]\n",
" pgm_pwr = unb2c.UNB2_FPGA_POL_PGM_VOUT_R[
(
brd_cnt
*4) +
node_cnt]*unb2c.UNB2_FPGA_POL_PGM_IOUT_R[
(
brd_cnt
*4) +
node_cnt]\n",
" stri +=\" {:4.1f} W |\".format(pgm_pwr)\n",
" tot_fpga = core_pwr + eram_pwr + rxgxb_pwr + txgxb_pwr + hgxb_pwre + pgm_pwr\n",
" fpgas_pwr += tot_fpga\n",
...
...
%% Cell type:markdown id:e73610a1 tags:
Jupyter page started by Gijs, copy past from others, with a little bit of my self ;-)
Can be used to readout the hardware monitoring points on the UniBoard2c
%% Cell type:code id:c2ace952 tags:
```
python
import
time
import
numpy
as
np
```
%% Cell type:code id:dd54c19e tags:
```
python
#
# Check is device is running or else start it up
#
unb2c
=
DeviceProxy
(
"
LTS/UNB2/1
"
)
unb2c
=
DeviceProxy
(
"
LTS/UNB2/1
"
)
state
=
str
(
unb2c
.
state
())
if
state
==
"
OFF
"
or
state
==
"
FAULT
"
:
unb2c
.
initialise
()
time
.
sleep
(
1
)
state
=
str
(
unb2c
.
state
())
if
state
==
"
STANDBY
"
:
unb2c
.
on
()
state
=
str
(
unb2c
.
state
())
if
state
==
"
ON
"
:
print
(
"
Device is now in on state
"
)
else
:
print
(
"
warning, expected device to be in on state, is:
"
,
state
)
#
# Print the available attributes
#
print
(
"
Atttibutes of pcc are:
\n
*********
"
)
attr_names
=
unb2c
.
get_attribute_list
()
for
i
in
attr_names
:
print
(
i
)
# exec("value = print(i, d.{})".format(i))
print
(
"
*********
\n
"
)
```
%% Output
Device is now in on state
Atttibutes of pcc are:
*********
version_R
UNB2_Power_ON_OFF_RW
UNB2_Front_Panel_LED_RW
UNB2_Front_Panel_LED_R
UNB2_mask_RW
UNB2_I2C_bus_STATUS_R
UNB2_EEPROM_Unique_ID_R
UNB2_DC_DC_48V_12V_VIN_R
UNB2_DC_DC_48V_12V_VOUT_R
opcua_missing_attributes_R
UNB2TR_translator_busy_R
UNB2_DC_DC_48V_12V_IOUT_R
UNB2_DC_DC_48V_12V_TEMP_R
UNB2_POL_QSFP_N01_VOUT_R
UNB2_POL_QSFP_N01_IOUT_R
UNB2_POL_QSFP_N01_TEMP_R
UNB2_POL_QSFP_N23_VOUT_R
UNB2_POL_QSFP_N23_IOUT_R
UNB2_POL_QSFP_N23_TEMP_R
UNB2_POL_SWITCH_1V2_VOUT_R
UNB2_POL_SWITCH_1V2_IOUT_R
UNB2_POL_SWITCH_1V2_TEMP_R
UNB2_POL_SWITCH_PHY_VOUT_R
UNB2_POL_SWITCH_PHY_IOUT_R
UNB2_POL_SWITCH_PHY_TEMP_R
UNB2_POL_CLOCK_VOUT_R
UNB2_POL_CLOCK_IOUT_R
UNB2_POL_CLOCK_TEMP_R
UNB2_DC_DC_48V_12V_VIN_R
UNB2_DC_DC_48V_12V_VOUT_R
UNB2_EEPROM_Serial_Number_R
UNB2_EEPROM_Unique_ID_R
UNB2_FPGA_DDR4_SLOT_TEMP_R
UNB2_FPGA_POL_CORE_IOUT_R
UNB2_FPGA_POL_CORE_TEMP_R
UNB2_FPGA_POL_
ERAM
_VOUT_R
UNB2_FPGA_POL_
CORE
_VOUT_R
UNB2_FPGA_POL_ERAM_IOUT_R
UNB2_FPGA_POL_ERAM_TEMP_R
UNB2_FPGA_POL_RXGXB_VOUT_R
UNB2_FPGA_POL_RXGXB_IOUT_R
UNB2_FPGA_POL_RXGXB_TEMP_R
UNB2_FPGA_POL_TXGXB_VOUT_R
UNB2_FPGA_POL_TXGXB_IOUT_R
UNB2_FPGA_POL_HGXB_VOUT_R
UNB2_FPGA_POL_ERAM_VOUT_R
UNB2_FPGA_POL_HGXB_IOUT_R
UNB2_FPGA_POL_HGXB_TEMP_R
UNB2_FPGA_POL_
PGM
_VOUT_R
UNB2_FPGA_POL_
HGXB
_VOUT_R
UNB2_FPGA_POL_PGM_IOUT_R
UNB2_FPGA_POL_PGM_TEMP_R
UNB2_FPGA_POL_PGM_VOUT_R
UNB2_FPGA_POL_RXGXB_IOUT_R
UNB2_FPGA_POL_RXGXB_TEMP_R
UNB2_FPGA_POL_RXGXB_VOUT_R
UNB2_FPGA_POL_TXGXB_IOUT_R
UNB2_FPGA_POL_TXGXB_TEMP_R
UNB2_FPGA_POL_TXGXB_VOUT_R
UNB2_FPGA_QSFP_CAGE_LOS_R
UNB2_FPGA_QSFP_CAGE_TEMP_R
UNB2_Front_Panel_LED_R
UNB2_Front_Panel_LED_RW
UNB2_I2C_bus_DDR4_error_R
UNB2_I2C_bus_error_R
UNB2_I2C_bus_FPGA_PS_error_R
UNB2_I2C_bus_PS_error_R
UNB2_I2C_bus_QSFP_error_R
UNB2_mask_RW
UNB2_POL_CLOCK_IOUT_R
UNB2_POL_CLOCK_TEMP_R
UNB2_POL_CLOCK_VOUT_R
UNB2_POL_QSFP_N01_IOUT_R
UNB2_POL_QSFP_N01_TEMP_R
UNB2_POL_QSFP_N01_VOUT_R
UNB2_POL_QSFP_N23_IOUT_R
UNB2_POL_QSFP_N23_TEMP_R
UNB2_POL_QSFP_N23_VOUT_R
UNB2_POL_SWITCH_1V2_IOUT_R
UNB2_POL_SWITCH_1V2_TEMP_R
UNB2_POL_SWITCH_1V2_VOUT_R
UNB2_POL_SWITCH_PHY_IOUT_R
UNB2_POL_SWITCH_PHY_TEMP_R
UNB2_POL_SWITCH_PHY_VOUT_R
UNB2_PWR_off_R
UNB2_PWR_off_RW
State
Status
*********
%% Cell type:code id:51d0443c tags:
```
python
#
# Node Temperatures
#
print
(
"
FPGA Point-of-load Converter temperatures, Should be < 85°C
"
)
print
(
"
|---------|----------|----------|----------|----------|----------|----------|
"
)
print
(
"
| BRD nr. | Node nr. | Core pol | ERAM pol | TrRx pol | TxHx pol | IO pol |
"
)
print
(
"
|---------|----------|----------|----------|----------|----------|----------|
"
)
for
brd_cnt
in
range
(
2
):
for
node_cnt
in
range
(
4
):
stri
=
"
| {} | {} |
"
.
format
(
brd_cnt
,
node_cnt
)
stri
+=
"
{:5.1f} °C |
"
.
format
(
unb2c
.
UNB2_FPGA_POL_CORE_TEMP_R
[
brd_cnt
,
node_cnt
])
stri
+=
"
{:5.1f} °C |
"
.
format
(
unb2c
.
UNB2_FPGA_POL_ERAM_TEMP_R
[
brd_cnt
,
node_cnt
])
stri
+=
"
{:5.1f} °C |
"
.
format
(
unb2c
.
UNB2_FPGA_POL_RXGXB_TEMP_R
[
brd_cnt
,
node_cnt
])
stri
+=
"
{:5.1f} °C |
"
.
format
(
unb2c
.
UNB2_FPGA_POL_HGXB_TEMP_R
[
brd_cnt
,
node_cnt
])
stri
+=
"
{:5.1f} °C |
"
.
format
(
unb2c
.
UNB2_FPGA_POL_PGM_TEMP_R
[
brd_cnt
,
node_cnt
])
stri
+=
"
{:5.1f} °C |
"
.
format
(
unb2c
.
UNB2_FPGA_POL_CORE_TEMP_R
[
(
brd_cnt
*
4
)
+
node_cnt
])
stri
+=
"
{:5.1f} °C |
"
.
format
(
unb2c
.
UNB2_FPGA_POL_ERAM_TEMP_R
[
(
brd_cnt
*
4
)
+
node_cnt
])
stri
+=
"
{:5.1f} °C |
"
.
format
(
unb2c
.
UNB2_FPGA_POL_RXGXB_TEMP_R
[
(
brd_cnt
*
4
)
+
node_cnt
])
stri
+=
"
{:5.1f} °C |
"
.
format
(
unb2c
.
UNB2_FPGA_POL_HGXB_TEMP_R
[
(
brd_cnt
*
4
)
+
node_cnt
])
stri
+=
"
{:5.1f} °C |
"
.
format
(
unb2c
.
UNB2_FPGA_POL_PGM_TEMP_R
[
(
brd_cnt
*
4
)
+
node_cnt
])
print
(
stri
)
print
(
"
|---------|----------|----------|----------|----------|----------|----------|
\n
"
)
if
1
:
#
# Node Voltages
#
print
(
"
FPGA point-of-load converte voltages
"
)
print
(
"
|---------|----------|----------|----------|----------|----------|----------|----------|
"
)
print
(
"
| BRD nr. | Node nr. | Core | ERAM | TrRx | TrTx | TxHx | IO |
"
)
print
(
"
|---------|----------|----------|----------|----------|----------|----------|----------|
"
)
for
brd_cnt
in
range
(
2
):
fpgas_pwr
=
np
.
zeros
(
2
)
for
node_cnt
in
range
(
4
):
stri
=
"
| {} | {} |
"
.
format
(
brd_cnt
,
node_cnt
)
stri
+=
"
{:5.2f} V |
"
.
format
(
0.95
)
stri
+=
"
{:5.2f} V |
"
.
format
(
unb2c
.
UNB2_FPGA_POL_ERAM_VOUT_R
[
brd_cnt
,
node_cnt
])
stri
+=
"
{:5.2f} V |
"
.
format
(
unb2c
.
UNB2_FPGA_POL_RXGXB_VOUT_R
[
brd_cnt
,
node_cnt
])
stri
+=
"
{:5.2f} V |
"
.
format
(
unb2c
.
UNB2_FPGA_POL_TXGXB_VOUT_R
[
brd_cnt
,
node_cnt
])
stri
+=
"
{:5.2f} V |
"
.
format
(
unb2c
.
UNB2_FPGA_POL_HGXB_VOUT_R
[
brd_cnt
,
node_cnt
])
stri
+=
"
{:5.2f} V |
"
.
format
(
unb2c
.
UNB2_FPGA_POL_PGM_VOUT_R
[
brd_cnt
,
node_cnt
])
stri
+=
"
{:5.2f} V |
"
.
format
(
unb2c
.
UNB2_FPGA_POL_ERAM_VOUT_R
[
(
brd_cnt
*
4
)
+
node_cnt
])
stri
+=
"
{:5.2f} V |
"
.
format
(
unb2c
.
UNB2_FPGA_POL_RXGXB_VOUT_R
[
(
brd_cnt
*
4
)
+
node_cnt
])
stri
+=
"
{:5.2f} V |
"
.
format
(
unb2c
.
UNB2_FPGA_POL_TXGXB_VOUT_R
[
(
brd_cnt
*
4
)
+
node_cnt
])
stri
+=
"
{:5.2f} V |
"
.
format
(
unb2c
.
UNB2_FPGA_POL_HGXB_VOUT_R
[
(
brd_cnt
*
4
)
+
node_cnt
])
stri
+=
"
{:5.2f} V |
"
.
format
(
unb2c
.
UNB2_FPGA_POL_PGM_VOUT_R
[
(
brd_cnt
*
4
)
+
node_cnt
])
print
(
stri
)
print
(
"
|---------|----------|----------|----------|----------|----------|----------|----------|
\n
"
)
#
# Node Currents
#
print
(
"
FPGA point-of-load converter output currents
"
)
print
(
"
|---------|----------|----------|----------|----------|----------|----------|----------|
"
)
print
(
"
| BRD nr. | Node nr. | Core | ERAM | TrRx | TrTx | TxHx | IO |
"
)
print
(
"
|---------|----------|----------|----------|----------|----------|----------|----------|
"
)
for
brd_cnt
in
range
(
2
):
fpgas_pwr
=
np
.
zeros
(
2
)
for
node_cnt
in
range
(
4
):
stri
=
"
| {} | {} |
"
.
format
(
brd_cnt
,
node_cnt
)
stri
+=
"
{:5.2f} A |
"
.
format
(
unb2c
.
UNB2_FPGA_POL_CORE_IOUT_R
[
brd_cnt
,
node_cnt
])
stri
+=
"
{:5.2f} A |
"
.
format
(
unb2c
.
UNB2_FPGA_POL_ERAM_IOUT_R
[
brd_cnt
,
node_cnt
])
stri
+=
"
{:5.2f} A |
"
.
format
(
unb2c
.
UNB2_FPGA_POL_RXGXB_IOUT_R
[
brd_cnt
,
node_cnt
])
stri
+=
"
{:5.2f} A |
"
.
format
(
unb2c
.
UNB2_FPGA_POL_TXGXB_IOUT_R
[
brd_cnt
,
node_cnt
])
stri
+=
"
{:5.2f} A |
"
.
format
(
unb2c
.
UNB2_FPGA_POL_HGXB_IOUT_R
[
brd_cnt
,
node_cnt
])
stri
+=
"
{:5.2f} A |
"
.
format
(
unb2c
.
UNB2_FPGA_POL_PGM_IOUT_R
[
brd_cnt
,
node_cnt
])
stri
+=
"
{:5.2f} A |
"
.
format
(
unb2c
.
UNB2_FPGA_POL_CORE_IOUT_R
[
(
brd_cnt
*
4
)
+
node_cnt
])
stri
+=
"
{:5.2f} A |
"
.
format
(
unb2c
.
UNB2_FPGA_POL_ERAM_IOUT_R
[
(
brd_cnt
*
4
)
+
node_cnt
])
stri
+=
"
{:5.2f} A |
"
.
format
(
unb2c
.
UNB2_FPGA_POL_RXGXB_IOUT_R
[
(
brd_cnt
*
4
)
+
node_cnt
])
stri
+=
"
{:5.2f} A |
"
.
format
(
unb2c
.
UNB2_FPGA_POL_TXGXB_IOUT_R
[
(
brd_cnt
*
4
)
+
node_cnt
])
stri
+=
"
{:5.2f} A |
"
.
format
(
unb2c
.
UNB2_FPGA_POL_HGXB_IOUT_R
[
(
brd_cnt
*
4
)
+
node_cnt
])
stri
+=
"
{:5.2f} A |
"
.
format
(
unb2c
.
UNB2_FPGA_POL_PGM_IOUT_R
[
(
brd_cnt
*
4
)
+
node_cnt
])
print
(
stri
)
print
(
"
|---------|----------|----------|----------|----------|----------|----------|----------|
\n
"
)
#
# Node Powers
#
print
(
"
FPGA power consumption
"
)
print
(
"
|---------|----------|----------|----------|----------|----------|----------|----------|----------|
"
)
print
(
"
| BRD nr. | Node nr. | Core pwr | ERAM pwr | TrRx pwr | TrTx pwr | TxHx pwr | IO pwr | Tot.FPGA |
"
)
print
(
"
|---------|----------|----------|----------|----------|----------|----------|----------|----------|
"
)
for
brd_cnt
in
range
(
2
):
fpgas_pwr
=
np
.
zeros
(
2
)
for
node_cnt
in
range
(
4
):
stri
=
"
| {} | {} |
"
.
format
(
brd_cnt
,
node_cnt
)
core_pwr
=
0.95
*
unb2c
.
UNB2_FPGA_POL_CORE_IOUT_R
[
brd_cnt
,
node_cnt
]
core_pwr
=
0.95
*
unb2c
.
UNB2_FPGA_POL_CORE_IOUT_R
[
(
brd_cnt
*
4
)
+
node_cnt
]
stri
+=
"
{:4.1f} W |
"
.
format
(
core_pwr
)
eram_pwr
=
unb2c
.
UNB2_FPGA_POL_ERAM_VOUT_R
[
brd_cnt
,
node_cnt
]
*
unb2c
.
UNB2_FPGA_POL_ERAM_IOUT_R
[
brd_cnt
,
node_cnt
]
eram_pwr
=
unb2c
.
UNB2_FPGA_POL_ERAM_VOUT_R
[
(
brd_cnt
*
4
)
+
node_cnt
]
*
unb2c
.
UNB2_FPGA_POL_ERAM_IOUT_R
[
(
brd_cnt
*
4
)
+
node_cnt
]
stri
+=
"
{:4.1f} W |
"
.
format
(
eram_pwr
)
rxgxb_pwr
=
unb2c
.
UNB2_FPGA_POL_RXGXB_VOUT_R
[
brd_cnt
,
node_cnt
]
*
unb2c
.
UNB2_FPGA_POL_RXGXB_IOUT_R
[
brd_cnt
,
node_cnt
]
rxgxb_pwr
=
unb2c
.
UNB2_FPGA_POL_RXGXB_VOUT_R
[
(
brd_cnt
*
4
)
+
node_cnt
]
*
unb2c
.
UNB2_FPGA_POL_RXGXB_IOUT_R
[
(
brd_cnt
*
4
)
+
node_cnt
]
stri
+=
"
{:4.1f} W |
"
.
format
(
rxgxb_pwr
)
txgxb_pwr
=
unb2c
.
UNB2_FPGA_POL_TXGXB_VOUT_R
[
brd_cnt
,
node_cnt
]
*
unb2c
.
UNB2_FPGA_POL_TXGXB_IOUT_R
[
brd_cnt
,
node_cnt
]
txgxb_pwr
=
unb2c
.
UNB2_FPGA_POL_TXGXB_VOUT_R
[
(
brd_cnt
*
4
)
+
node_cnt
]
*
unb2c
.
UNB2_FPGA_POL_TXGXB_IOUT_R
[
(
brd_cnt
*
4
)
+
node_cnt
]
stri
+=
"
{:4.1f} W |
"
.
format
(
txgxb_pwr
)
hgxb_pwre
=
unb2c
.
UNB2_FPGA_POL_HGXB_VOUT_R
[
brd_cnt
,
node_cnt
]
*
unb2c
.
UNB2_FPGA_POL_HGXB_IOUT_R
[
brd_cnt
,
node_cnt
]
hgxb_pwre
=
unb2c
.
UNB2_FPGA_POL_HGXB_VOUT_R
[
(
brd_cnt
*
4
)
+
node_cnt
]
*
unb2c
.
UNB2_FPGA_POL_HGXB_IOUT_R
[
(
brd_cnt
*
4
)
+
node_cnt
]
stri
+=
"
{:4.1f} W |
"
.
format
(
hgxb_pwre
)
pgm_pwr
=
unb2c
.
UNB2_FPGA_POL_PGM_VOUT_R
[
brd_cnt
,
node_cnt
]
*
unb2c
.
UNB2_FPGA_POL_PGM_IOUT_R
[
brd_cnt
,
node_cnt
]
pgm_pwr
=
unb2c
.
UNB2_FPGA_POL_PGM_VOUT_R
[
(
brd_cnt
*
4
)
+
node_cnt
]
*
unb2c
.
UNB2_FPGA_POL_PGM_IOUT_R
[
(
brd_cnt
*
4
)
+
node_cnt
]
stri
+=
"
{:4.1f} W |
"
.
format
(
pgm_pwr
)
tot_fpga
=
core_pwr
+
eram_pwr
+
rxgxb_pwr
+
txgxb_pwr
+
hgxb_pwre
+
pgm_pwr
fpgas_pwr
+=
tot_fpga
stri
+=
"
{:4.1f} W |
"
.
format
(
tot_fpga
)
print
(
stri
)
print
(
"
|---------|----------|----------|----------|----------|----------|----------|----------|----------|
\n
"
)
if
1
:
#
# Board Voltages
#
print
(
"
Board power supply voltages
"
)
print
(
"
|---------|----------|----------|----------|----------|----------|----------|
"
)
print
(
"
| BRD nr. | QSFP N01 | QSFP N23 |Switch 1v2|Switch PHY| clk pwr | Tot. BRD |
"
)
print
(
"
|---------|----------|----------|----------|----------|----------|----------|
"
)
for
brd_cnt
in
range
(
2
):
stri
=
"
| {} |
"
.
format
(
brd_cnt
)
stri
+=
"
{:5.2f} V |
"
.
format
(
unb2c
.
UNB2_POL_QSFP_N01_VOUT_R
[
brd_cnt
])
stri
+=
"
{:5.2f} V |
"
.
format
(
unb2c
.
UNB2_POL_QSFP_N23_VOUT_R
[
brd_cnt
])
stri
+=
"
{:5.2f} V |
"
.
format
(
unb2c
.
UNB2_POL_SWITCH_1V2_VOUT_R
[
brd_cnt
])
stri
+=
"
{:5.2f} V |
"
.
format
(
unb2c
.
UNB2_POL_SWITCH_PHY_VOUT_R
[
brd_cnt
])
stri
+=
"
{:5.2f} V |
"
.
format
(
unb2c
.
UNB2_POL_CLOCK_VOUT_R
[
brd_cnt
])
stri
+=
"
{:5.2f} V |
"
.
format
(
unb2c
.
UNB2_DC_DC_48V_12V_VOUT_R
[
brd_cnt
])
print
(
stri
)
print
(
"
|---------|----------|----------|----------|----------|----------|----------|
\n
"
)
#
# Board currents
#
print
(
"
Board power supply currents
"
)
print
(
"
|---------|----------|----------|----------|----------|----------|----------|
"
)
print
(
"
| BRD nr. | QSFP N01 | QSFP N23 |Switch 1v2|Switch PHY| clk pwr | Tot. BRD |
"
)
print
(
"
|---------|----------|----------|----------|----------|----------|----------|
"
)
for
brd_cnt
in
range
(
2
):
stri
=
"
| {} |
"
.
format
(
brd_cnt
)
stri
+=
"
{:5.2f} A |
"
.
format
(
unb2c
.
UNB2_POL_QSFP_N01_IOUT_R
[
brd_cnt
])
stri
+=
"
{:5.2f} A |
"
.
format
(
unb2c
.
UNB2_POL_QSFP_N23_IOUT_R
[
brd_cnt
])
stri
+=
"
{:5.2f} A |
"
.
format
(
unb2c
.
UNB2_POL_SWITCH_1V2_IOUT_R
[
brd_cnt
])
stri
+=
"
{:5.2f} A |
"
.
format
(
unb2c
.
UNB2_POL_SWITCH_PHY_IOUT_R
[
brd_cnt
])
stri
+=
"
{:5.2f} A |
"
.
format
(
unb2c
.
UNB2_POL_CLOCK_IOUT_R
[
brd_cnt
])
stri
+=
"
{:5.2f} A |
"
.
format
(
unb2c
.
UNB2_DC_DC_48V_12V_IOUT_R
[
brd_cnt
])
print
(
stri
)
print
(
"
|---------|----------|----------|----------|----------|----------|----------|
\n
"
)
#
# Board temperatures
#
print
(
"
Board power supply temperatures, should be < 85°C
"
)
print
(
"
|---------|----------|----------|----------|----------|----------|----------|
"
)
print
(
"
| BRD nr. | QSFP N01 | QSFP N23 |Switch 1v2|Switch PHY| clk pwr | Tot. BRD |
"
)
print
(
"
|---------|----------|----------|----------|----------|----------|----------|
"
)
for
brd_cnt
in
range
(
2
):
stri
=
"
| {} |
"
.
format
(
brd_cnt
)
stri
+=
"
{:5.2f} °C |
"
.
format
(
unb2c
.
UNB2_POL_QSFP_N01_TEMP_R
[
brd_cnt
])
stri
+=
"
{:5.2f} °C |
"
.
format
(
unb2c
.
UNB2_POL_QSFP_N23_TEMP_R
[
brd_cnt
])
stri
+=
"
{:5.2f} °C |
"
.
format
(
unb2c
.
UNB2_POL_SWITCH_1V2_TEMP_R
[
brd_cnt
])
stri
+=
"
{:5.2f} °C |
"
.
format
(
unb2c
.
UNB2_POL_SWITCH_PHY_TEMP_R
[
brd_cnt
])
stri
+=
"
{:5.2f} °C |
"
.
format
(
unb2c
.
UNB2_POL_CLOCK_TEMP_R
[
brd_cnt
])
stri
+=
"
{:5.2f} °C |
"
.
format
(
unb2c
.
UNB2_DC_DC_48V_12V_TEMP_R
[
brd_cnt
])
print
(
stri
)
print
(
"
|---------|----------|----------|----------|----------|----------|----------|
\n
"
)
#
# Board Powers
#
print
(
"
Board power consumption
"
)
print
(
"
|---------|----------|----------|----------|----------|----------|----------|----------|
"
)
print
(
"
| BRD nr. | QSFP N01 | QSFP N23 |Switch 1v2|Switch PHY| clk pwr | FPGAs pwr| Tot. BRD |
"
)
print
(
"
|---------|----------|----------|----------|----------|----------|----------|----------|
"
)
for
brd_cnt
in
range
(
2
):
stri
=
"
| {} |
"
.
format
(
brd_cnt
)
qsfp_n01
=
unb2c
.
UNB2_POL_QSFP_N01_VOUT_R
[
brd_cnt
]
*
unb2c
.
UNB2_POL_QSFP_N01_IOUT_R
[
brd_cnt
]
stri
+=
"
{:5.2f} W |
"
.
format
(
qsfp_n01
)
qsfp_n23
=
unb2c
.
UNB2_POL_QSFP_N23_VOUT_R
[
brd_cnt
]
*
unb2c
.
UNB2_POL_QSFP_N23_IOUT_R
[
brd_cnt
]
stri
+=
"
{:5.2f} W |
"
.
format
(
qsfp_n23
)
sw_1v2
=
unb2c
.
UNB2_POL_SWITCH_1V2_VOUT_R
[
brd_cnt
]
*
unb2c
.
UNB2_POL_SWITCH_1V2_IOUT_R
[
brd_cnt
]
stri
+=
"
{:5.2f} W |
"
.
format
(
sw_1v2
)
sw_phy
=
unb2c
.
UNB2_POL_SWITCH_PHY_VOUT_R
[
brd_cnt
]
*
unb2c
.
UNB2_POL_SWITCH_PHY_IOUT_R
[
brd_cnt
]
stri
+=
"
{:5.2f} W |
"
.
format
(
sw_phy
)
clk
=
unb2c
.
UNB2_POL_CLOCK_VOUT_R
[
brd_cnt
]
*
unb2c
.
UNB2_POL_CLOCK_IOUT_R
[
brd_cnt
]
stri
+=
"
{:5.2f} W |
"
.
format
(
clk
)
stri
+=
"
{:5.2f} W |
"
.
format
(
fpgas_pwr
[
brd_cnt
])
brd_input
=
unb2c
.
UNB2_DC_DC_48V_12V_VOUT_R
[
brd_cnt
]
*
unb2c
.
UNB2_DC_DC_48V_12V_IOUT_R
[
brd_cnt
]
stri
+=
"
{:6.2f} W |
"
.
format
(
brd_input
)
print
(
stri
)
print
(
"
|---------|----------|----------|----------|----------|----------|----------|----------|
"
)
```
%% Output
FPGA Point-of-load Converter temperatures, Should be < 85°C
|---------|----------|----------|----------|----------|----------|----------|
| BRD nr. | Node nr. | Core pol | ERAM pol | TrRx pol | TxHx pol | IO pol |
|---------|----------|----------|----------|----------|----------|----------|
| 0 | 0 |
28.9
°C | 36.
1
°C | 32.
1
°C | 3
7.8
°C | 3
7.4
°C |
| 0 | 1 |
29
.5 °C | 3
6.8
°C | 3
4.9
°C |
39.0
°C |
39.8
°C |
| 0 | 2 | 30.
4
°C | 38.
6
°C | 33.
4
°C | 4
1.4
°C | 4
1.4
°C |
| 0 | 3 | 3
2.8
°C | 3
8.8
°C | 34.
9
°C | 38.
2
°C | 3
7.8
°C |
| 1 | 0 |
28.9
°C | 36.
1
°C | 32.
1
°C | 3
7.8
°C | 3
7.4
°C |
| 1 | 1 |
29
.5 °C | 3
6.8
°C | 3
4.9
°C |
39.0
°C |
39.8
°C |
| 1 | 2 | 30.
4
°C | 38.
6
°C | 33.
4
°C | 4
1.4
°C | 4
1.4
°C |
| 1 | 3 | 3
2.8
°C | 3
8.8
°C | 34.
9
°C | 38.2 °C | 3
7.8
°C |
| 0 | 0 |
30.2
°C | 36.
2
°C | 32.
6
°C | 3
6.9
°C | 3
8.8
°C |
| 0 | 1 |
31
.5 °C | 3
7.4
°C | 3
5.4
°C |
40.3
°C |
41.4
°C |
| 0 | 2 | 30.
2
°C | 38.
4
°C | 33.
6
°C | 4
0.8
°C | 4
2.1
°C |
| 0 | 3 | 3
1.5
°C | 3
9.0
°C | 34.
6
°C | 38.
6
°C | 3
8.1
°C |
| 1 | 0 |
30.2
°C | 36.
2
°C | 32.
6
°C | 3
6.9
°C | 3
8.8
°C |
| 1 | 1 |
31
.5 °C | 3
7.4
°C | 3
5.4
°C |
40.3
°C |
41.4
°C |
| 1 | 2 | 30.
2
°C | 38.
4
°C | 33.
6
°C | 4
0.8
°C | 4
2.1
°C |
| 1 | 3 | 3
1.5
°C | 3
9.0
°C | 34.
6
°C | 38.2 °C | 3
8.1
°C |
|---------|----------|----------|----------|----------|----------|----------|
FPGA point-of-load converte voltages
|---------|----------|----------|----------|----------|----------|----------|----------|
| BRD nr. | Node nr. | Core | ERAM | TrRx | TrTx | TxHx | IO |
|---------|----------|----------|----------|----------|----------|----------|----------|
| 0 | 0 | 0.95 V | 0.90 V | 0.90 V | 0.90 V | 1.80 V | 1.80 V |
| 0 | 1 | 0.95 V | 0.90 V | 0.90 V | 0.90 V | 1.80 V | 1.80 V |
| 0 | 2 | 0.95 V | 0.90 V | 0.90 V | 0.90 V | 1.80 V | 1.80 V |
| 0 | 3 | 0.95 V | 0.90 V | 0.90 V | 0.90 V | 1.80 V | 1.80 V |
| 1 | 0 | 0.95 V | 0.90 V | 0.90 V | 0.90 V | 1.80 V | 1.80 V |
| 1 | 1 | 0.95 V | 0.90 V | 0.90 V | 0.90 V | 1.80 V | 1.80 V |
| 1 | 2 | 0.95 V | 0.90 V | 0.90 V | 0.90 V | 1.80 V | 1.80 V |
| 1 | 3 | 0.95 V | 0.90 V | 0.90 V | 0.90 V | 1.80 V | 1.80 V |
|---------|----------|----------|----------|----------|----------|----------|----------|
FPGA point-of-load converter output currents
|---------|----------|----------|----------|----------|----------|----------|----------|
| BRD nr. | Node nr. | Core | ERAM | TrRx | TrTx | TxHx | IO |
|---------|----------|----------|----------|----------|----------|----------|----------|
| 0 | 0 | 5.9
5
A | 0.
09
A | 0.
4
0 A | 0.
06
A | 0.6
1
A | 0.
22
A |
| 0 | 1 |
4.16
A | 0.09 A | 0.
41
A | 0.0
8
A | 0.7
2
A | 0.21 A |
| 0 | 2 | 3.8
1
A | 0.
13
A | 0.4
8
A | 0.0
4
A | 0.7
3
A | 0.
1
7 A |
| 0 | 3 | 3.
6
1 A | 0.
14
A | 0.4
1
A | 0.1
4
A | 0.
73
A | 0.1
3
A |
| 1 | 0 | 5.9
5
A | 0.
09
A | 0.
4
0 A | 0.
06
A | 0.6
1
A | 0.
22
A |
| 1 | 1 |
4.16
A | 0.09 A | 0.
41
A | 0.0
8
A | 0.7
2
A | 0.21 A |
| 1 | 2 | 3.8
1
A | 0.
13
A | 0.4
8
A | 0.0
4
A | 0.7
3
A | 0.
1
7 A |
| 1 | 3 | 3.
6
1 A | 0.
14
A | 0.4
1
A | 0.
14
A | 0.7
3
A | 0.1
3
A |
| 0 | 0 | 5.9
2
A | 0.
14
A | 0.
5
0 A | 0.
14
A | 0.
5
6 A | 0.
16
A |
| 0 | 1 |
1.88
A | 0.09 A | 0.
37
A | 0.0
7
A | 0.7
6
A | 0.21 A |
| 0 | 2 | 3.8
0
A | 0.
22
A | 0.4
1
A | 0.0
3
A | 0.7
6
A | 0.
2
7 A |
| 0 | 3 | 3.
5
1 A | 0.
09
A | 0.4
7
A | 0.1
9
A | 0.
65
A | 0.1
2
A |
| 1 | 0 | 5.9
2
A | 0.
14
A | 0.
5
0 A | 0.
14
A | 0.
5
6 A | 0.
16
A |
| 1 | 1 |
1.88
A | 0.09 A | 0.
37
A | 0.0
7
A | 0.7
6
A | 0.21 A |
| 1 | 2 | 3.8
0
A | 0.
22
A | 0.4
1
A | 0.0
3
A | 0.7
6
A | 0.
2
7 A |
| 1 | 3 | 3.
5
1 A | 0.
09
A | 0.4
7
A | 0.
07
A | 0.7
7
A | 0.1
2
A |
|---------|----------|----------|----------|----------|----------|----------|----------|
FPGA power consumption
|---------|----------|----------|----------|----------|----------|----------|----------|----------|
| BRD nr. | Node nr. | Core pwr | ERAM pwr | TrRx pwr | TrTx pwr | TxHx pwr | IO pwr | Tot.FPGA |
|---------|----------|----------|----------|----------|----------|----------|----------|----------|
| 0 | 0 | 5.
7
W | 0.1 W | 0.4 W | 0.1 W | 1.
1
W | 0.
4
W | 7.6 W |
| 0 | 1 |
4.0
W | 0.1 W | 0.
4
W | 0.1 W | 1.
3
W | 0.4 W |
6.1
W |
| 0 | 2 | 3.6 W | 0.
1
W | 0.4 W | 0.0 W | 1.
3
W | 0.
3
W |
5.8
W |
| 0 | 3 | 3.
4
W | 0.1 W | 0.4 W | 0.
1
W | 1.
3
W | 0.2 W | 5.
6
W |
| 1 | 0 | 5.
7
W | 0.1 W | 0.4 W | 0.1 W | 1.
1
W | 0.
4
W | 7.6 W |
| 1 | 1 |
4.0
W | 0.1 W | 0.3 W | 0.1 W | 1.
3
W | 0.4 W |
6.1
W |
| 1 | 2 | 3.6 W | 0.
1
W | 0.4 W | 0.
1
W | 1.
3
W | 0.5 W |
5.9
W |
| 1 | 3 | 3.
4
W | 0.1 W | 0.4 W | 0.1 W | 1.
3
W | 0.2 W | 5.5 W |
| 0 | 0 | 5.
6
W | 0.1 W | 0.4 W | 0.1 W | 1.
0
W | 0.
3
W | 7.6 W |
| 0 | 1 |
1.8
W | 0.1 W | 0.
3
W | 0.1 W | 1.
4
W | 0.4 W |
4.0
W |
| 0 | 2 | 3.6 W | 0.
2
W | 0.4 W | 0.0 W | 1.
4
W | 0.
5
W |
6.1
W |
| 0 | 3 | 3.
3
W | 0.1 W | 0.4 W | 0.
2
W | 1.
2
W | 0.2 W | 5.
4
W |
| 1 | 0 | 5.
6
W | 0.1 W | 0.4 W | 0.1 W | 1.
0
W | 0.
3
W | 7.6 W |
| 1 | 1 |
1.8
W | 0.1 W | 0.3 W | 0.1 W | 1.
4
W | 0.4 W |
4.0
W |
| 1 | 2 | 3.6 W | 0.
2
W | 0.4 W | 0.
0
W | 1.
4
W | 0.5 W |
6.1
W |
| 1 | 3 | 3.
3
W | 0.1 W | 0.4 W | 0.1 W | 1.
4
W | 0.2 W | 5.5 W |
|---------|----------|----------|----------|----------|----------|----------|----------|----------|
Board power supply voltages
|---------|----------|----------|----------|----------|----------|----------|
| BRD nr. | QSFP N01 | QSFP N23 |Switch 1v2|Switch PHY| clk pwr | Tot. BRD |
|---------|----------|----------|----------|----------|----------|----------|
| 0 | 3.29 V | 3.29 V | 1.20 V | 1.00 V | 2.50 V | 11.99 V |
| 1 | 3.29 V | 3.29 V | 1.20 V | 1.00 V | 2.50 V | 11.9
9
V |
| 1 | 3.29 V | 3.29 V | 1.20 V | 1.00 V | 2.50 V | 11.9
8
V |
|---------|----------|----------|----------|----------|----------|----------|
Board power supply currents
|---------|----------|----------|----------|----------|----------|----------|
| BRD nr. | QSFP N01 | QSFP N23 |Switch 1v2|Switch PHY| clk pwr | Tot. BRD |
|---------|----------|----------|----------|----------|----------|----------|
| 0 | 1.5
3
A | 1.27 A | 1.
60
A | 0.5
0
A | 0.
84
A | 3.
50
A |
| 1 | 1.5
3
A | 1.2
7
A | 1.
60
A | 0.5
0
A | 0.
84
A | 3.62 A |
| 0 | 1.5
7
A | 1.27 A | 1.
73
A | 0.5
2
A | 0.
93
A | 3.
62
A |
| 1 | 1.5
7
A | 1.2
8
A | 1.
73
A | 0.5
2
A | 0.
93
A | 3.62 A |
|---------|----------|----------|----------|----------|----------|----------|
Board power supply temperatures, should be < 85°C
|---------|----------|----------|----------|----------|----------|----------|
| BRD nr. | QSFP N01 | QSFP N23 |Switch 1v2|Switch PHY| clk pwr | Tot. BRD |
|---------|----------|----------|----------|----------|----------|----------|
| 0 | 31.44 °C | 36.94 °C | 4
1.9
4 °C | 43.
5
0 °C |
40.50
°C | 3
4.5
0 °C |
| 1 | 31.44 °C | 36.94 °C | 4
1.9
4 °C | 43.
5
0 °C |
40.50
°C | 3
4.5
0 °C |
| 0 | 31.44 °C | 36.94 °C | 4
2.4
4 °C | 43.
0
0 °C |
39.81
°C | 3
5.0
0 °C |
| 1 | 31.44 °C | 36.94 °C | 4
2.4
4 °C | 43.
0
0 °C |
39.81
°C | 3
5.0
0 °C |
|---------|----------|----------|----------|----------|----------|----------|
Board power consumption
|---------|----------|----------|----------|----------|----------|----------|----------|
| BRD nr. | QSFP N01 | QSFP N23 |Switch 1v2|Switch PHY| clk pwr | FPGAs pwr| Tot. BRD |
|---------|----------|----------|----------|----------|----------|----------|----------|
| 0 | 5.
03
W | 4.1
8
W |
1.86
W | 0.
43
W | 2.
48
W | 2
5.21
W | 43.4
6
W |
| 1 | 5.
03
W | 4.1
8
W |
1.86
W | 0.
43
W | 2.
48
W | 2
5.21
W | 43.4
6
W |
| 0 | 5.
17
W | 4.1
9
W |
2.07
W | 0.
52
W | 2.
33
W | 2
3.18
W | 43.4
8
W |
| 1 | 5.
17
W | 4.1
9
W |
2.07
W | 0.
52
W | 2.
33
W | 2
3.18
W | 43.4
5
W |
|---------|----------|----------|----------|----------|----------|----------|----------|
%% Cell type:code id:7f18e187 tags:
```
python
```
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