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Commit 66405527 authored by Paulus Kruger's avatar Paulus Kruger
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CRC enabled on all POLs

parent 60c7b893
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config/UNB2TR.yaml
+ 114
− 20
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...@@ -91,18 +91,105 @@ device_registers: ...@@ -91,18 +91,105 @@ device_registers:
address: 0x2C address: 0x2C
driver: I2C_switch2 driver: I2C_switch2
registers: registers:
- name: TEMP - { name: "TEMP", address: 0x8D, crc: True}
address: 0x8D - { name: "VIN" , address: 0x88, crc: True}
crc: True - { name: "VOUT", address: 0x8B, crc: True}
- name: VIN - { name: "IOUT", address: 0x8C, crc: True}
address: 0x88
crc: True - name: POL_CORE
- name: VOUT address: 0x1
address: 0x8B driver: I2C_switch2
crc: True registers:
- name: IOUT - { name: "TEMP", address: 0x8D, crc: True}
address: 0x8C - { name: "VIN" , address: 0x88, crc: True}
crc: True - { name: "VOUT", address: 0x8B, crc: True}
- { name: "IOUT", address: 0x8C, crc: True}
- name: POL_ERAM
address: 0xD
driver: I2C_switch2
registers:
- { name: "TEMP", address: 0x8D, crc: True}
- { name: "VIN" , address: 0x88, crc: True}
- { name: "VOUT", address: 0x8B, crc: True}
- { name: "IOUT", address: 0x8C, crc: True}
- name: POL_RXGXB
address: 0xE
driver: I2C_switch2
registers:
- { name: "TEMP", address: 0x8D, crc: True}
- { name: "VIN" , address: 0x88, crc: True}
- { name: "VOUT", address: 0x8B, crc: True}
- { name: "IOUT", address: 0x8C, crc: True}
- name: POL_TXGXB
address: 0xF
driver: I2C_switch2
registers:
- { name: "TEMP", address: 0x8D, crc: True}
- { name: "VIN" , address: 0x88, crc: True}
- { name: "VOUT", address: 0x8B, crc: True}
- { name: "IOUT", address: 0x8C, crc: True}
- name: POL_HGXB
address: 0x10
driver: I2C_switch2
registers:
- { name: "TEMP", address: 0x8D, crc: True}
- { name: "VIN" , address: 0x88, crc: True}
- { name: "VOUT", address: 0x8B, crc: True}
- { name: "IOUT", address: 0x8C, crc: True}
- name: POL_PGM
address: 0x11
driver: I2C_switch2
registers:
- { name: "TEMP", address: 0x8D, crc: True}
- { name: "VIN" , address: 0x88, crc: True}
- { name: "VOUT", address: 0x8B, crc: True}
- { name: "IOUT", address: 0x8C, crc: True}
- name: POL_QSFP0
address: 0x2
driver: I2C_switch2
registers:
- { name: "TEMP", address: 0x8D, crc: True}
- { name: "VIN" , address: 0x88, crc: True}
- { name: "VOUT", address: 0x8B, crc: True}
- { name: "IOUT", address: 0x8C, crc: True}
- name: POL_QSFP1
address: 0x1
driver: I2C_switch2
registers:
- { name: "TEMP", address: 0x8D, crc: True}
- { name: "VIN" , address: 0x88, crc: True}
- { name: "VOUT", address: 0x8B, crc: True}
- { name: "IOUT", address: 0x8C, crc: True}
- name: POL_SW1V2
address: 0xF
driver: I2C_switch2
registers:
- { name: "TEMP", address: 0x8D, crc: True}
- { name: "VIN" , address: 0x88, crc: True}
- { name: "VOUT", address: 0x8B, crc: True}
- { name: "IOUT", address: 0x8C, crc: True}
- name: POL_SWPHY
address: 0xE
driver: I2C_switch2
registers:
- { name: "TEMP", address: 0x8D, crc: True}
- { name: "VIN" , address: 0x88, crc: True}
- { name: "VOUT", address: 0x8B, crc: True}
- { name: "IOUT", address: 0x8C, crc: True}
- name: POL_CLOCK
address: 0xD
driver: I2C_switch2
registers:
- { name: "TEMP", address: 0x8D, crc: True}
- { name: "VIN" , address: 0x88, crc: True}
- { name: "VOUT", address: 0x8B, crc: True}
- { name: "IOUT", address: 0x8C, crc: True}
variables: variables:
...@@ -226,7 +313,8 @@ variables: ...@@ -226,7 +313,8 @@ variables:
- name: [UNB2_POL_QSFP_N01_VOUT,UNB2_POL_QSFP_N23_VOUT] - name: [UNB2_POL_QSFP_N01_VOUT,UNB2_POL_QSFP_N23_VOUT]
driver: switch_PS driver: switch_PS
devreg: [0x2.0x8B,0x1.0x8B] # devreg: [0x2.0x8B,0x1.0x8B]
devreg: [POL_QSFP0.VOUT,POL_QSFP1.VOUT]
width: 16 width: 16
rw: ro rw: ro
dtype: double dtype: double
...@@ -237,7 +325,8 @@ variables: ...@@ -237,7 +325,8 @@ variables:
- name: [UNB2_POL_SWITCH_1V2_VOUT,UNB2_POL_SWITCH_PHY_VOUT,UNB2_POL_CLOCK_VOUT] - name: [UNB2_POL_SWITCH_1V2_VOUT,UNB2_POL_SWITCH_PHY_VOUT,UNB2_POL_CLOCK_VOUT]
driver: switch_PS driver: switch_PS
devreg: [0xF.0x8B,0xE.0x8B,0xD.0x8B] # devreg: [0xF.0x8B,0xE.0x8B,0xD.0x8B]
devreg: [POL_SW1V2.VOUT,POL_SWPHY.VOUT,POL_CLOCK.VOUT]
width: 16 width: 16
rw: ro rw: ro
dtype: double dtype: double
...@@ -248,7 +337,8 @@ variables: ...@@ -248,7 +337,8 @@ variables:
- name: [UNB2_DC_DC_48V_12V_IOUT,UNB2_POL_QSFP_N01_IOUT,UNB2_POL_QSFP_N23_IOUT,UNB2_POL_SWITCH_1V2_IOUT,UNB2_POL_SWITCH_PHY_IOUT,UNB2_POL_CLOCK_IOUT] - name: [UNB2_DC_DC_48V_12V_IOUT,UNB2_POL_QSFP_N01_IOUT,UNB2_POL_QSFP_N23_IOUT,UNB2_POL_SWITCH_1V2_IOUT,UNB2_POL_SWITCH_PHY_IOUT,UNB2_POL_CLOCK_IOUT]
driver: switch_PS driver: switch_PS
devreg: [DC_DC.IOUT,0x2.0x8C,0x1.0x8C,0xF.0x8C,0xE.0x8C,0xD.0x8C] # devreg: [DC_DC.IOUT,0x2.0x8C,0x1.0x8C,0xF.0x8C,0xE.0x8C,0xD.0x8C]
devreg: [DC_DC.IOUT,POL_QSFP0.IOUT,POL_QSFP1.IOUT,POL_SW1V2.IOUT,POL_SWPHY.IOUT,POL_CLOCK.IOUT]
width: 16 width: 16
rw: ro rw: ro
dtype: double dtype: double
...@@ -258,7 +348,8 @@ variables: ...@@ -258,7 +348,8 @@ variables:
- name: [UNB2_DC_DC_48V_12V_TEMP,UNB2_POL_QSFP_N01_TEMP,UNB2_POL_QSFP_N23_TEMP,UNB2_POL_SWITCH_1V2_TEMP,UNB2_POL_SWITCH_PHY_TEMP,UNB2_POL_CLOCK_TEMP] - name: [UNB2_DC_DC_48V_12V_TEMP,UNB2_POL_QSFP_N01_TEMP,UNB2_POL_QSFP_N23_TEMP,UNB2_POL_SWITCH_1V2_TEMP,UNB2_POL_SWITCH_PHY_TEMP,UNB2_POL_CLOCK_TEMP]
driver: switch_PS driver: switch_PS
devreg: [DC_DC.TEMP,0x2.0x8D,0x1.0x8D,0xF.0x8D,0xE.0x8D,0xD.0x8D] # devreg: [DC_DC.TEMP,0x2.0x8D,0x1.0x8D,0xF.0x8D,0xE.0x8D,0xD.0x8D]
devreg: [DC_DC.TEMP,POL_QSFP0.TEMP,POL_QSFP1.TEMP,POL_SW1V2.TEMP,POL_SWPHY.TEMP,POL_CLOCK.TEMP]
width: 16 width: 16
rw: ro rw: ro
dtype: double dtype: double
...@@ -290,7 +381,8 @@ variables: ...@@ -290,7 +381,8 @@ variables:
- name: [UNB2_FPGA_POL_CORE_IOUT,UNB2_FPGA_POL_ERAM_IOUT,UNB2_FPGA_POL_RXGXB_IOUT,UNB2_FPGA_POL_TXGXB_IOUT,UNB2_FPGA_POL_HGXB_IOUT,UNB2_FPGA_POL_PGM_IOUT] - name: [UNB2_FPGA_POL_CORE_IOUT,UNB2_FPGA_POL_ERAM_IOUT,UNB2_FPGA_POL_RXGXB_IOUT,UNB2_FPGA_POL_TXGXB_IOUT,UNB2_FPGA_POL_HGXB_IOUT,UNB2_FPGA_POL_PGM_IOUT]
driver: switch_FPGA_PS driver: switch_FPGA_PS
devreg: [0x1.0x8C,0xD.0x8C,0xE.0x8C,0xF.0x8C,0x10.0x8C,0x11.0x8C] # devreg: [0x1.0x8C,0xD.0x8C,0xE.0x8C,0xF.0x8C,0x10.0x8C,0x11.0x8C]
devreg: [POL_CORE.IOUT,POL_ERAM.IOUT,POL_RXGXB.IOUT,POL_TXGXB.IOUT,POL_HGXB.IOUT,POL_PGM.IOUT]
width: 16 width: 16
rw: ro rw: ro
dtype: double dtype: double
...@@ -301,7 +393,8 @@ variables: ...@@ -301,7 +393,8 @@ variables:
- name: [UNB2_FPGA_POL_CORE_TEMP,UNB2_FPGA_POL_ERAM_TEMP,UNB2_FPGA_POL_RXGXB_TEMP,UNB2_FPGA_POL_TXGXB_TEMP,UNB2_FPGA_POL_HGXB_TEMP,UNB2_FPGA_POL_PGM_TEMP] - name: [UNB2_FPGA_POL_CORE_TEMP,UNB2_FPGA_POL_ERAM_TEMP,UNB2_FPGA_POL_RXGXB_TEMP,UNB2_FPGA_POL_TXGXB_TEMP,UNB2_FPGA_POL_HGXB_TEMP,UNB2_FPGA_POL_PGM_TEMP]
driver: switch_FPGA_PS driver: switch_FPGA_PS
devreg: [0x1.0x8D,0xD.0x8D,0xE.0x8D,0xF.0x8D,0x10.0x8D,0x11.0x8D] # devreg: [0x1.0x8D,0xD.0x8D,0xE.0x8D,0xF.0x8D,0x10.0x8D,0x11.0x8D]
devreg: [POL_CORE.TEMP,POL_ERAM.TEMP,POL_RXGXB.TEMP,POL_TXGXB.TEMP,POL_HGXB.TEMP,POL_PGM.TEMP]
width: 16 width: 16
rw: ro rw: ro
dtype: double dtype: double
...@@ -312,7 +405,7 @@ variables: ...@@ -312,7 +405,7 @@ variables:
- name: [UNB2_FPGA_POL_CORE_VOUT] - name: [UNB2_FPGA_POL_CORE_VOUT]
driver: switch_FPGA_PS driver: switch_FPGA_PS
devreg: [0x1.0x8B] devreg: [POL_CORE.VOUT]
width: 16 width: 16
rw: ro rw: ro
dtype: double dtype: double
...@@ -324,7 +417,8 @@ variables: ...@@ -324,7 +417,8 @@ variables:
- name: [UNB2_FPGA_POL_ERAM_VOUT,UNB2_FPGA_POL_RXGXB_VOUT,UNB2_FPGA_POL_TXGXB_VOUT,UNB2_FPGA_POL_HGXB_VOUT,UNB2_FPGA_POL_PGM_VOUT] - name: [UNB2_FPGA_POL_ERAM_VOUT,UNB2_FPGA_POL_RXGXB_VOUT,UNB2_FPGA_POL_TXGXB_VOUT,UNB2_FPGA_POL_HGXB_VOUT,UNB2_FPGA_POL_PGM_VOUT]
driver: switch_FPGA_PS driver: switch_FPGA_PS
devreg: [0xD.0x8B,0xE.0x8B,0xF.0x8B,0x10.0x8B,0x11.0x8B] devreg: [POL_ERAM.VOUT,POL_RXGXB.VOUT,POL_TXGXB.VOUT,POL_HGXB.VOUT,POL_PGM.VOUT]
# devreg: [0xD.0x8B,0xE.0x8B,0xF.0x8B,0x10.0x8B,0x11.0x8B]
width: 16 width: 16
rw: ro rw: ro
dtype: double dtype: double
......
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