fixed various bugs

i2c/setRCUversion.py

 from I2C import *
 import time
-RCU=3
-Ver="RCU2L v0.3"
+RCU=1
+Ver="RCU2H v0.2"
 R1=0
 ROM=0x50
 
 #Set switch
-I2C1server(0x70,[1<<RCU],reg=None,read=0) #select RCU
-
+print("Set switch")
+if not(I2C1server(0x70,[1<<RCU],reg=None,read=0)): exit() #select RCU
+#exit()
 #Get ID
+print("Get ID")
 ID=[0]*4
-I2C1server(ROM,ID,reg=0xFC,read=1) #select RCU
+if not(I2C1server(ROM,ID,reg=0xFC,read=1)): exit() #select RCU
 print(ID)
-#exit()
+exit()
 
 #Upload version
-Ver2=[ord(c.encode('utf-8')[0]) for c in Ver]
+Ver2=[(c.encode('utf-8')[0]) for c in Ver]
 print(len(Ver),Ver,Ver2)
 V2=[0]
 for i,v in enumerate(Ver2):

pypcc2.py

@@ -63,7 +63,7 @@ RCUthread1=RCU.start(Q1)
 
 RunTimer=True;
 def TimerThread(Q1,RCU):
-    V1=opcuaserv.AddVar("RCU_monitor_rate",10)
+    V1=opcuaserv.AddVar("RCU_monitor_rate_RW",30)
     cnt=0;#Count second ticks
     while RunTimer:
        time.sleep(1)

rcu/HWconf.py

@@ -3,7 +3,7 @@
 from pcctypes import *
 #Mid plane address
 #MPaddr=namedtuple("MPaddr","nI2C I2C nSwitch Switch"); 
-RCU_MPaddr=MPaddr(1,[1],32,[1,2,3,4,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5])
+RCU_MPaddr=MPaddr(1,[1],32,[0,1,2,3,4,5,6,7,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5])
 #CLK_MPaddr=MPaddr(1,[1],1,[7])
 
 #DevReg=namedtuple("DevReg","Addr Register_R Register_W store"); 

rcu/RCU.py

@@ -317,8 +317,8 @@ class RCU1():
     def Queue_Monitor(self,Q1):
          Inst1=Vars.Instr(Vars.DevType.VarUpdate,Vars.RCU_temp,32,[0]*32)
          Q1.put(Inst1)
-         Inst1=Vars.Instr(Vars.DevType.VarUpdate,Vars.RCU_ADC_lock,96,[0]*96)
-         Q1.put(Inst1)
+#         Inst1=Vars.Instr(Vars.DevType.VarUpdate,Vars.RCU_ADC_lock,96,[0]*96)
+#         Q1.put(Inst1)
 
     def AddVars(self,Q1,AddVarR,AddVarW):
      for v in Vars.OPC_devvars:

rcu/Vars.py

@@ -114,23 +114,23 @@ RCU_init=Instrs("ReadRegisters",2,[
    Instr(DevType.VarUpdate,RCU_OUT2,3,[0,0,0])
 ])
 
-ADC_on=Instrs("ADC_on",15,[
-   Instr(DevType.SPIbb,RCU_ADC1_JESD_ctr,1,[14]),
+ADC_on=Instrs("ADC_on",16,[
+   Instr(DevType.SPIbb,RCU_ADC1_JESD_ctr,1,[0x14]),
    Instr(DevType.SPIbb,RCU_ADC1_CML_level,1,[0x7]),
    Instr(DevType.SPIbb,RCU_ADC1_SYNC_ctr,1,[1]),
    Instr(DevType.SPIbb,RCU_ADC1_update,1,[1]),
-   Instr(DevType.SPIbb,RCU_ADC2_JESD_ctr,1,[14]),
+   Instr(DevType.SPIbb,RCU_ADC2_JESD_ctr,1,[0x14]),
    Instr(DevType.SPIbb,RCU_ADC2_CML_level,1,[0x7]),
    Instr(DevType.SPIbb,RCU_ADC2_SYNC_ctr,1,[1]),
    Instr(DevType.SPIbb,RCU_ADC2_update,1,[1]),
-   Instr(DevType.SPIbb,RCU_ADC3_JESD_ctr,1,[14]),
+   Instr(DevType.SPIbb,RCU_ADC3_JESD_ctr,1,[0x14]),
    Instr(DevType.SPIbb,RCU_ADC3_CML_level,1,[0x7]),
    Instr(DevType.SPIbb,RCU_ADC3_SYNC_ctr,1,[1]),
    Instr(DevType.SPIbb,RCU_ADC3_update,1,[1]),
-#   Instr(DevType.VarUpdate,RCU_ADC_lock,3,[0,0,0]),
    Instr(DevType.VarUpdate,RCU_ADC_SYNC,3,[0,0,0]),
    Instr(DevType.VarUpdate,RCU_ADC_JESD,3,[0,0,0]),
-   Instr(DevType.VarUpdate,RCU_ADC_CML,3,[0,0,0])
+   Instr(DevType.VarUpdate,RCU_ADC_CML,3,[0,0,0]),
+   Instr(DevType.VarUpdate,RCU_ADC_lock,3,[0,0,0])
 ])
 
 RCU_on=Instrs("RCU_on",12,[
@@ -162,5 +162,20 @@ RCU_off=Instrs("RCU_off",1,[
 #   Instr(DevType.Var,RCU_mask,4,[0,0,0,0])
 ])
 
+RCU_update=Instrs("RCU_update",11,[
+   Instr(DevType.VarUpdate,RCU_pwrd,1,[0]),
+   Instr(DevType.VarUpdate,RCU_OUT1,3,[0,0,0]),
+   Instr(DevType.VarUpdate,RCU_OUT2,3,[0,0,0]),
+   Instr(DevType.VarUpdate,RCU_ID,1,[0]),
+#   Instr(DevType.VarUpdate,RCU_VER,1,[0]*10),
+   Instr(DevType.VarUpdate,RCU_att,3,[0,0,0]),
+   Instr(DevType.VarUpdate,RCU_band,3,[0,0,0]),
+   Instr(DevType.VarUpdate,RCU_LED,3,[0,0,0]),
+   Instr(DevType.VarUpdate,RCU_ADC_SYNC,3,[0,0,0]),
+   Instr(DevType.VarUpdate,RCU_ADC_JESD,3,[0,0,0]),
+   Instr(DevType.VarUpdate,RCU_ADC_CML,3,[0,0,0]),
+   Instr(DevType.VarUpdate,RCU_ADC_lock,3,[0,0,0])
+])
+
 
-OPC_methods=[RCU_on,RCU_off,ADC_on]
+OPC_methods=[RCU_on,RCU_off,ADC_on,RCU_update]