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    generate_ip.sh 2.11 KiB
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    #!/bin/bash
# -------------------------------------------------------------------------- #
#
#!/bin/bash
# -------------------------------------------------------------------------- #
#
# Copyright (C) 2014                                                        
# ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
# JIVE (Joint Institute for VLBI in Europe) <http://www.jive.nl/>           
# P.O.Box 2, 7990 AA Dwingeloo, The Netherlands                             
#                                                                           
# This program is free software: you can redistribute it and/or modify      
# it under the terms of the GNU General Public License as published by      
# the Free Software Foundation, either version 3 of the License, or         
# (at your option) any later version.                                       
#                                                                           
# This program is distributed in the hope that it will be useful,           
# but WITHOUT ANY WARRANTY; without even the implied warranty of            
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the             
# GNU General Public License for more details.                              
#                                                                           
# You should have received a copy of the GNU General Public License         
# along with this program.  If not, see <http://www.gnu.org/licenses/>.     
#
# -------------------------------------------------------------------------- #
#
# Purpose: Generate IP with Qsys
# Description:
#   Generate the IP in a separate generated/ subdirectory.
#
# Usage:
#
#   ./generate_ip.sh
#

# Tool settings for selected target "unb2" with arria10
. ${RADIOHDL}/tools/quartus/set_quartus unb2

#qsys-generate --help

# Only generate the source IP
# - use --synthesis=VHDL to have top level in VHDL similar as with MegaWizard
qsys-generate ip_arria10_phy_10gbase_r.qsys \
              --synthesis=VHDL \
              --simulation=VHDL \
              --output-directory=generated \
              --allow-mixed-language-simulation