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  • HPR-158
  • L2SDP-1082
  • L2SDP-LIFT
  • master default protected
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Created with Raphaël 2.2.024Oct23222019171611109543228Sep272625212019181413126531Aug3029282524222118171615141098731Jul27262565427Jun2115141312752125May242317151110982126Apr25201817117654331Mar3028272322212017161514107227Feb242322211716159872131Jan27252423191716131211109322Dec212019151312875129Nov28Changed gnu to apache and or removed '(C)' and or added space(s). Changed IP -> IP filecomment shortenedRemoved '(C)' from info header. Added and or removed space(s).Use of jupyter-notebook.Extend tb sim time to have correct result for c_verify_rx_beamlet_list_bsn.Clarified why to keep hdl_lib_technology empty.Added to hdl_lib_uses_synth the six libraries for the ip_agi027_xxxx. Added to hdl_lib_disclose_library_clause_names the five for the ip_agi027_xxxx, except complex_mult_rtl_cononical, because this one is also not added for other technologies.Replaced information header to recent standard. Added component descriptions for agi027_xxxx: ip_agi027_xxxx_mult, ip_agi027_xxxx_mult_rtl, ip_agi027_xxxx_mult_add4_rtl, ip_agi027_xxxx_complex_mult_rtl, ip_agi027_xxxx_complex_mult_rtl_canonical, ip_agi027_xxxx_complex_mult, ip_agi027_xxxx_complex_mult_27.Updated headerinformation to recent standard. Added two constants c_tech_mult_agi027_xxxx_rtl and c_tech_mult_agi027_xxxx_ip for the Agilex 7 to this package.Updated headerinformation to recent standard. There is a small error in the header information, namely “The largest pi = 2 * min**2 = 2**(c_dsp_dat_w-1) …” is not the right equation. It should be = 2**(c_dsp_prod_w-1) or = 2 * ((-2)**(c_dsp_dat_w-1))**2, and that is equal to = (-2)**(2*(c_dsp_dat_w-1)) = 2* 4*(c_dsp_dat_w-1). I updated it to 2**(c_dsp_prod_w-1). Added five (extra) libraries with two commented out: --LIBRARY ip_agi027_xxxx_mult_lib; --LIBRARY ip_agi027_xxxx_mult_rtl_lib; library ip_agi027_xxxx_complex_mult_altmult_complex_1910; library ip_agi027_xxxx_complex_mult_rtl_lib; library ip_agi027_xxxx_complex_mult_rtl_canonical_lib; Add generate-block inclusive the instantiation of a module for the agi027_xxxx: -- IP variants for <= 18 bit: ip_agi027_xxxx_complex_mult -- IP variants for > 18 bit and <= 27 bit: ip_agi027_xxxx_complex_mult_27b -- RTL variants that can infer multipliers for a technology, fits all widths: ip_agi027_xxxx_complex_mult_rtl -- RTL variants that can infer multipliers for a technology, fits all widths: ip_agi027_xxxx_complex_mult_rtl_canonical.Replaced information header to recent standard. Added library ip_agi027_xxxx_mult_add4_lib; Added generate-block inclusive the instantiation of a module for the ip_agi027_xxxx_mult_add4_rtl.Replaced information header to recent standard. Added library ip_agi027_xxxx_mult_add2_lib; Added generate-block inclusive the instantiation of a module for the ip_agi027_xxxx_mult_add2_rtl.Updated information header to recent standard. Added library ip_agi027_xxxx_mult_lib. Added generate-block inclusive the instantiation of a module for the ip_agi027_xxxx_mult and for the ip_agi027_mult_rtl.Copied from ip_arria10_e2sg/mult_add2/hdllib.cfg. Changed the technology_name from ip_arria10_e2sg to ip_agi027_xxxx for hdl_lib_name, hdl_library_clause_name, hdl_lib_technology, synth_files.Copied from ip_arria10_e2sg/mult_add2/ip_arria10_e2sg_mult_add2_rtl.vhd. Replaced information header. Changed the technology_name from ip_arria10_e2sg to ip_agi027_xxxx.Copied from ip_arria10/complex_mult_rtl_canonical/hdllib.cfg. Changed the technology_name from ip_arria10 to ip_agi027_xxxx for hdl_lib_name, hdl_library_clause_name, hdl_lib_technology (must kept empty), synth_files.Copied from ip_arria10/complex_mult_rtl_canonical/ip_agi027_xxxx_complex_mult_rtl_canonical.vhd. Updated information header to recent standard. Changed the technology_name from ip_arria10 to ip_agi027_xxxx.Copied from ip_arria10/complex_mult_rtl/hdllib.cfg. Changed the technology_name from ip_arria10 to ip_agi027_xxxx for hdl_lib_name, hdl_library_clause_name, hdl_lib_technology (must kept empty), synth_files.Copied from ip_arria10/complex_mult_rtl/ip_agi027_xxxx_complex_mult_rtl.vhd. Updated information header to recent standard. Changed the technology_name from ip_arria10 to ip_agi027_xxxx.Copied from ip_arria10_e2sg/altera_libraries/altmult_complex_1910/hdllib.cfg. Changed the technology_name from ip_arria10_e2sg to ip_agi027_xxxx for hdl_lib_name, hdl_library_clause_name, hdl_lib_technology, modelsim_compile_ip_files.Copied from ip_arria10_e2sg/altera_libraries/altmult_complex_1910/liborder.txt. Changed the technology_name from ip_arria10_e2sg to ip_agi027_xxxx.Copied from ip_arria10_e2sg/altera_libraries/altmult_complex_1910/compile_ip.tcl. Changed the technology_name from ip_arria10_e2sg to ip_agi027_xxxx and the generated hashes in the paths. Updated the information header, except the description.Copied from ip_arria10_e2sg/complex_mult/README.txt. This is file is not updated since ip_arria10. But the information is no longer accurate for both the arria10_e2sg and agi027_xxxx. Now the remark is updated.Copied from ip_arria10_e2sg/complex_mult/compile_ip.tcl. There is a file without a hash in the generated/ip_agi027_xxxx_complex/sim/. Changed the technology_name from ip_arria10_e2sg to ip_agi027_xxxx in the paths. Updated the information header, except the description.Copied from ip_arria10_e2sg/complex_mult/hdllib.cfg. Changed the technology_name from ip_arria10 to ip_agi027_xxxx for hdl_lib_name, hdl_library_clause_name, hdl_lib_uses_sim, hdl_lib_technology, modelsim_compile_ip_files, quartus_qip_files, qsys-generate_ip_files.Create new IP with the same configuration as the ip_arria10_e2sg_complex_mult_27b.ip from ip_arria10_e2sg/complex_mult/. The version is the same: 19.1.0.Create new IP with the same configuration as the ip_arria10_e2sg_complex_mult.ip from ip_arria10_e2sg/complex_mult/. The version is the same: 19.1.0.Copied from ip_arria10_e2sg. Change the technology_name from ip_arria10_e2sg to ip_agi027_xxxx for hdl_lib_name, hdl_library_clause_name, hdl_lib_technology, synth_files, qsys-generate_ip_files.Copied from ip_arria10_e2sg. Replaced headerinformation, except the description. Changed the technology_name from ip_arria10_e2sg to ip_agi027_xxxx. Updated version and hash.Copied from ip_arria10_e2sg. Replace information header. Change the technology_name from ip_arria10_e2sg to ip_agi027_xxxx.Create new IP with the same configuration as the ip_arria10_e2sg_mult_add4.ip from ip_arria10_e2sg/mult_add4/. The only difference is that it is a newer version 1920 in stead of 1910Merge branch 'master' into RTSD-182Copied from ip_arria10/mult/hdllib.cfg. Changed the technology_name from ip_arria10 to ip_agi027_xxxx for hdl_lib_name, hdl_library_clause_name, hdl_lib_technology (must kept empty), synth_files.Copied from ip_arria10/mult/ip_arria10_mult.vhd. This file is making use of the lpm library and is based a little on one of the files of the ‘hdl_generate’. So it is important to regenerate the IP with the generics etc to check if the Agilex 7 is supporting this library and it does. Lpm_mult version 19.1.0 voor arria10_e2sg and version 1920 for the agi027_xxxx. Added this IP in the folder so it is easily to check the configuration later. Updated information header. Added the lpm component, because it was not directly initialised.Copied from ip_arria10/mult/ip_arria10_mult_rtl.vhd. Replaced information header to recent standard. Changed the technology_name from ip_arria10_e2sg to ip_agi027_xxxx.Merge branch 'L2SDP-965' into 'master'Process comment comments.Default use nof_bdo_destinations_max = MM max = 32.Merge branch 'master' into L2SDP-965Add matlab fix.