Skip to content
Snippets Groups Projects
Select Git revision
  • HPR-158
  • L2SDP-LIFT
  • master default protected
3 results
You can move around the graph by using the arrow keys.
Created with Raphaël 2.2.029Feb2827222120141312876131Jan2518171110521Dec201918730Nov2423222120151413128762131Oct26252423222019171611109543228Sep272625212019181413126531Aug3029282524222118171615141098731Jul27262565427Jun2115141312752125May242317151110982126Apr25201817117654331Mar30282723222120171615Added L2TS images.Merge branch 'master' into L2SDP-1013Add g_design_name = lofar2_unb2b_sdp_station_bf_wg.First working version of tb_sdp_beamformer_remote_ring.vhd.Correct sensitivity list of p_concat.Merge branch 'master' of git.astron.nl:rtsd/hdlDefault asign unused rx_sosi_arr.Remove (I) from sensitivity list arguments.Merge branch 'HPR-152' into 'master'corrected crc checksum calculationMerge branch 'master' of git.astron.nl:rtsd/hdlAdded g_design_name = lofar2_unb2c_sdp_station_bf_wg to try SDP-ARTS equivalent in simulation.Merge branch 'HPR-150' into 'master'processed review commentsMerge branch 'L2SDP-1011' into 'master'Access SDPTR on L2TS.Add c_shiftram_latency and c_sdp_shiftram_latency to adjust WG phase for this.Cleaned up and added commentsRemove obsolete g_no_rx. Improve comments at AIT instances.Merge branch 'master' into L2SDP-1011Use nof_bdo_destinations_max = 16 as a better compromis.Use c_sdp_bdo_reorder_nof_blocks_max = 16 as a better compromis.Clarified how sync is poassed on through the FIFO.Merge branch 'master' into L2SDP-1011initial commit of cocotb tb_rdma_packetiserPut input delay buffer after WG.Add comment on FIFO data width.Decrease buffer to 1024 to save M20K RAM.Adjust sim_done to fix tb result.Merge branch 'L2SDP-1007' into 'master'Remove note on Quartus segmentation error. Explain c_sdp_bdo_reorder_nof_blocks_max = 4 and nof_bdo_destinations_max = 8.Correct i_dp_sosi_arr().data in p_deframer process.Use g_use_ctrl = false in rx_clk --> dp_clk FIFO.Explicitly set dplink_siso_arr(i).xon. Remove duplicate assignment of dp_sosi_arr and dp_sosi.Apply dp_ready FIFO flow control in generate loop, instead of using func_dp_stream_arr_set(dplink_siso_arr, dp_ready, 'READY')Use c_sdp_bdo_reorder_nof_blocks_max = 4 to save block RAM. Ensure c_sdp_bdo_reorder_nof_blocks_max <= nof_bdo_destinations_max in revision. Choose nof_bdo_destinations_max = 8.Default assign dplink_siso_arr to avoid synthesis warning on latch on xon.Use nof_bdo_destinations_max = 8 instead of 32, to save block RAM.Add g_no_st_histogram = true default, to save block RAM.Use g_use_tech_jesd204b_v2 as generic instead of internal constant, to allow different selection in designs.
Loading