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Resolve L2SDP-273

Merged Reinier van der Walle requested to merge L2SDP-273 into master
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-------------------------------------------------------------------------------
--
-- Copyright 2021
-- ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
-- P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
--
-- Licensed under the Apache License, Version 2.0 (the "License");
-- you may not use this file except in compliance with the License.
-- You may obtain a copy of the License at
--
-- http://www.apache.org/licenses/LICENSE-2.0
--
-- Unless required by applicable law or agreed to in writing, software
-- distributed under the License is distributed on an "AS IS" BASIS,
-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-- See the License for the specific language governing permissions and
-- limitations under the License.
--
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
--
-- Author: R. van der Walle
-- Purpose:
-- . Ring lane info register
-- Description:
-- See ring_pkg.vhd
-- Remark:
-- .
-------------------------------------------------------------------------------
LIBRARY IEEE, common_lib, mm_lib;
USE IEEE.STD_LOGIC_1164.ALL;
USE common_lib.common_pkg.ALL;
USE common_lib.common_mem_pkg.ALL;
USE common_lib.common_field_pkg.ALL;
USE work.ring_pkg.ALL;
ENTITY ring_lane_info IS
PORT (
-- Clocks and reset
mm_rst : IN STD_LOGIC; -- reset synchronous with mm_clk
mm_clk : IN STD_LOGIC; -- memory-mapped bus clock
dp_clk : IN STD_LOGIC;
dp_rst : IN STD_LOGIC;
reg_mosi : IN t_mem_mosi;
reg_miso : OUT t_mem_miso;
-- inputs from other blocks
lane_direction : IN STD_LOGIC;
-- sdp info
lane_info : OUT t_lane_info
);
END ring_lane_info;
ARCHITECTURE str OF ring_lane_info IS
SIGNAL lane_info_ro: t_lane_info; -- ro = read only
BEGIN
u_mm_fields: ENTITY work.ring_lane_info_reg
PORT MAP (
mm_clk => mm_clk,
mm_rst => mm_rst,
dp_clk => dp_clk,
dp_rst => dp_rst,
reg_mosi => reg_mosi,
reg_miso => reg_miso,
lane_info_ro => lane_info_ro,
lane_info => lane_info
);
lane_info_ro.lane_direction <= lane_direction;
END str;
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