Skip to content
Snippets Groups Projects

Resolve L2SDP-383

Merged Reinier van der Walle requested to merge L2SDP-383 into master
15 files
+ 710
4983
Compare changes
  • Side-by-side
  • Inline

Files

@@ -2218,7 +2218,7 @@
@@ -2218,7 +2218,7 @@
<spirit:parameter>
<spirit:parameter>
<spirit:name>dataSlaveMapParam</spirit:name>
<spirit:name>dataSlaveMapParam</spirit:name>
<spirit:displayName>dataSlaveMapParam</spirit:displayName>
<spirit:displayName>dataSlaveMapParam</spirit:displayName>
<spirit:value spirit:format="string" spirit:id="dataSlaveMapParam"><![CDATA[<address-map><slave name='pio_system_info.mem' start='0x0' end='0x80' datawidth='32' /><slave name='reg_diag_data_buffer_bsn.mem' start='0x80' end='0x100' datawidth='32' /><slave name='reg_stat_hdr_dat_bst_0.mem' start='0x100' end='0x200' datawidth='32' /><slave name='reg_hdr_dat.mem' start='0x200' end='0x400' datawidth='32' /><slave name='reg_bsn_monitor_input.mem' start='0x400' end='0x800' datawidth='32' /><slave name='ram_scrap.mem' start='0x800' end='0x1000' datawidth='32' /><slave name='avs_eth_0.mms_tse' start='0x1000' end='0x2000' datawidth='32' /><slave name='avs_eth_0.mms_ram' start='0x2000' end='0x3000' datawidth='32' /><slave name='reg_wdi.mem' start='0x3000' end='0x3008' datawidth='32' /><slave name='reg_bsn_scheduler_xsub.mem' start='0x3008' end='0x3010' datawidth='32' /><slave name='pio_wdi.s1' start='0x3010' end='0x3020' datawidth='32' /><slave name='timer_0.s1' start='0x3020' end='0x3040' datawidth='16' /><slave name='avs_eth_0.mms_reg' start='0x3040' end='0x3080' datawidth='32' /><slave name='reg_dp_shiftram.mem' start='0x3080' end='0x3100' datawidth='32' /><slave name='reg_stat_hdr_dat_bst_1.mem' start='0x3100' end='0x3200' datawidth='32' /><slave name='reg_stat_hdr_dat_sst.mem' start='0x3200' end='0x3300' datawidth='32' /><slave name='reg_wg.mem' start='0x3300' end='0x3400' datawidth='32' /><slave name='reg_aduh_monitor.mem' start='0x3400' end='0x3500' datawidth='32' /><slave name='reg_unb_pmbus.mem' start='0x3500' end='0x3600' datawidth='32' /><slave name='reg_unb_sens.mem' start='0x3600' end='0x3700' datawidth='32' /><slave name='reg_crosslets_info.mem' start='0x3700' end='0x3740' datawidth='32' /><slave name='reg_sdp_info.mem' start='0x3740' end='0x3780' datawidth='32' /><slave name='reg_fpga_voltage_sens.mem' start='0x3780' end='0x37C0' datawidth='32' /><slave name='reg_bsn_source_v2.mem' start='0x37C0' end='0x37E0' datawidth='32' /><slave name='reg_fpga_temp_sens.mem' start='0x37E0' end='0x3800' datawidth='32' /><slave name='cpu_0.debug_mem_slave' start='0x3800' end='0x4000' datawidth='32' /><slave name='ram_st_bst.mem' start='0x4000' end='0x8000' datawidth='32' /><slave name='reg_nw_10gbe_mac.mem' start='0x8000' end='0x10000' datawidth='32' /><slave name='rom_system_info.mem' start='0x10000' end='0x18000' datawidth='32' /><slave name='ram_equalizer_gains.mem' start='0x18000' end='0x20000' datawidth='32' /><slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' datawidth='32' /><slave name='ram_bf_weights.mem' start='0x40000' end='0x60000' datawidth='32' /><slave name='ram_st_xsq.mem' start='0x60000' end='0x70000' datawidth='32' /><slave name='ram_ss_ss_wide.mem' start='0x70000' end='0x80000' datawidth='32' /><slave name='ram_wg.mem' start='0x80000' end='0x90000' datawidth='32' /><slave name='ram_fil_coefs.mem' start='0x90000' end='0xA0000' datawidth='32' /><slave name='ram_st_sst.mem' start='0xA0000' end='0xB0000' datawidth='32' /><slave name='jesd204b.mem' start='0xB0000' end='0xB4000' datawidth='32' /><slave name='reg_epcs.mem' start='0xB4000' end='0xB4020' datawidth='32' /><slave name='reg_remu.mem' start='0xB4020' end='0xB4040' datawidth='32' /><slave name='reg_dp_xonoff.mem' start='0xB4040' end='0xB4050' datawidth='32' /><slave name='reg_bf_scale.mem' start='0xB4050' end='0xB4060' datawidth='32' /><slave name='reg_dp_sync_insert_v2.mem' start='0xB4060' end='0xB4068' datawidth='32' /><slave name='reg_stat_enable_bst_1.mem' start='0xB4068' end='0xB4070' datawidth='32' /><slave name='reg_stat_enable_bst_0.mem' start='0xB4070' end='0xB4078' datawidth='32' /><slave name='reg_stat_enable_sst.mem' start='0xB4078' end='0xB4080' datawidth='32' /><slave name='pio_jesd_ctrl.mem' start='0xB4080' end='0xB4088' datawidth='32' /><slave name='reg_nw_10gbe_eth10g.mem' start='0xB4088' end='0xB4090' datawidth='32' /><slave name='reg_dp_selector.mem' start='0xB4090' end='0xB4098' datawidth='32' /><slave name='reg_bsn_scheduler.mem' start='0xB4098' end='0xB40A0' datawidth='32' /><slave name='reg_si.mem' start='0xB40A0' end='0xB40A8' datawidth='32' /><slave name='reg_mmdp_data.mem' start='0xB40A8' end='0xB40B0' datawidth='32' /><slave name='reg_mmdp_ctrl.mem' start='0xB40B0' end='0xB40B8' datawidth='32' /><slave name='reg_dpmm_data.mem' start='0xB40B8' end='0xB40C0' datawidth='32' /><slave name='reg_dpmm_ctrl.mem' start='0xB40C0' end='0xB40C8' datawidth='32' /><slave name='pio_pps.mem' start='0xB40C8' end='0xB40D0' datawidth='32' /><slave name='jtag_uart_0.avalon_jtag_slave' start='0xB40D0' end='0xB40D8' datawidth='32' /><slave name='ram_diag_data_buffer_bsn.mem' start='0x800000' end='0x1000000' datawidth='32' /></address-map>]]></spirit:value>
<spirit:value spirit:format="string" spirit:id="dataSlaveMapParam"><![CDATA[<address-map><slave name='pio_system_info.mem' start='0x0' end='0x80' datawidth='32' /><slave name='reg_diag_data_buffer_bsn.mem' start='0x80' end='0x100' datawidth='32' /><slave name='reg_stat_hdr_dat_sst.mem' start='0x100' end='0x200' datawidth='32' /><slave name='reg_stat_hdr_dat_bst.mem' start='0x200' end='0x400' datawidth='32' /><slave name='reg_bsn_monitor_input.mem' start='0x400' end='0x800' datawidth='32' /><slave name='ram_scrap.mem' start='0x800' end='0x1000' datawidth='32' /><slave name='avs_eth_0.mms_tse' start='0x1000' end='0x2000' datawidth='32' /><slave name='avs_eth_0.mms_ram' start='0x2000' end='0x3000' datawidth='32' /><slave name='reg_wdi.mem' start='0x3000' end='0x3008' datawidth='32' /><slave name='reg_bsn_scheduler_xsub.mem' start='0x3008' end='0x3010' datawidth='32' /><slave name='pio_wdi.s1' start='0x3010' end='0x3020' datawidth='32' /><slave name='timer_0.s1' start='0x3020' end='0x3040' datawidth='16' /><slave name='avs_eth_0.mms_reg' start='0x3040' end='0x3080' datawidth='32' /><slave name='reg_dp_shiftram.mem' start='0x3080' end='0x3100' datawidth='32' /><slave name='reg_wg.mem' start='0x3100' end='0x3200' datawidth='32' /><slave name='reg_hdr_dat.mem' start='0x3200' end='0x3400' datawidth='32' /><slave name='reg_aduh_monitor.mem' start='0x3400' end='0x3500' datawidth='32' /><slave name='reg_unb_pmbus.mem' start='0x3500' end='0x3600' datawidth='32' /><slave name='reg_unb_sens.mem' start='0x3600' end='0x3700' datawidth='32' /><slave name='reg_crosslets_info.mem' start='0x3700' end='0x3740' datawidth='32' /><slave name='reg_sdp_info.mem' start='0x3740' end='0x3780' datawidth='32' /><slave name='reg_fpga_voltage_sens.mem' start='0x3780' end='0x37C0' datawidth='32' /><slave name='reg_bsn_source_v2.mem' start='0x37C0' end='0x37E0' datawidth='32' /><slave name='reg_fpga_temp_sens.mem' start='0x37E0' end='0x3800' datawidth='32' /><slave name='cpu_0.debug_mem_slave' start='0x3800' end='0x4000' datawidth='32' /><slave name='ram_st_bst.mem' start='0x4000' end='0x8000' datawidth='32' /><slave name='reg_nw_10gbe_mac.mem' start='0x8000' end='0x10000' datawidth='32' /><slave name='rom_system_info.mem' start='0x10000' end='0x18000' datawidth='32' /><slave name='ram_equalizer_gains.mem' start='0x18000' end='0x20000' datawidth='32' /><slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' datawidth='32' /><slave name='ram_bf_weights.mem' start='0x40000' end='0x60000' datawidth='32' /><slave name='ram_st_xsq.mem' start='0x60000' end='0x70000' datawidth='32' /><slave name='ram_ss_ss_wide.mem' start='0x70000' end='0x80000' datawidth='32' /><slave name='ram_wg.mem' start='0x80000' end='0x90000' datawidth='32' /><slave name='ram_fil_coefs.mem' start='0x90000' end='0xA0000' datawidth='32' /><slave name='ram_st_sst.mem' start='0xA0000' end='0xB0000' datawidth='32' /><slave name='jesd204b.mem' start='0xB0000' end='0xB4000' datawidth='32' /><slave name='reg_epcs.mem' start='0xB4000' end='0xB4020' datawidth='32' /><slave name='reg_remu.mem' start='0xB4020' end='0xB4040' datawidth='32' /><slave name='reg_stat_enable_bst.mem' start='0xB4040' end='0xB4050' datawidth='32' /><slave name='reg_dp_xonoff.mem' start='0xB4050' end='0xB4060' datawidth='32' /><slave name='reg_bf_scale.mem' start='0xB4060' end='0xB4070' datawidth='32' /><slave name='reg_dp_sync_insert_v2.mem' start='0xB4070' end='0xB4078' datawidth='32' /><slave name='reg_stat_enable_sst.mem' start='0xB4078' end='0xB4080' datawidth='32' /><slave name='pio_jesd_ctrl.mem' start='0xB4080' end='0xB4088' datawidth='32' /><slave name='reg_nw_10gbe_eth10g.mem' start='0xB4088' end='0xB4090' datawidth='32' /><slave name='reg_dp_selector.mem' start='0xB4090' end='0xB4098' datawidth='32' /><slave name='reg_bsn_scheduler.mem' start='0xB4098' end='0xB40A0' datawidth='32' /><slave name='reg_si.mem' start='0xB40A0' end='0xB40A8' datawidth='32' /><slave name='reg_mmdp_data.mem' start='0xB40A8' end='0xB40B0' datawidth='32' /><slave name='reg_mmdp_ctrl.mem' start='0xB40B0' end='0xB40B8' datawidth='32' /><slave name='reg_dpmm_data.mem' start='0xB40B8' end='0xB40C0' datawidth='32' /><slave name='reg_dpmm_ctrl.mem' start='0xB40C0' end='0xB40C8' datawidth='32' /><slave name='pio_pps.mem' start='0xB40C8' end='0xB40D0' datawidth='32' /><slave name='jtag_uart_0.avalon_jtag_slave' start='0xB40D0' end='0xB40D8' datawidth='32' /><slave name='ram_diag_data_buffer_bsn.mem' start='0x800000' end='0x1000000' datawidth='32' /></address-map>]]></spirit:value>
</spirit:parameter>
</spirit:parameter>
<spirit:parameter>
<spirit:parameter>
<spirit:name>tightlyCoupledDataMaster0MapParam</spirit:name>
<spirit:name>tightlyCoupledDataMaster0MapParam</spirit:name>
@@ -3489,7 +3489,7 @@
@@ -3489,7 +3489,7 @@
<suppliedSystemInfos>
<suppliedSystemInfos>
<entry>
<entry>
<key>ADDRESS_MAP</key>
<key>ADDRESS_MAP</key>
<value>&lt;address-map&gt;&lt;slave name='pio_system_info.mem' start='0x0' end='0x80' datawidth='32' /&gt;&lt;slave name='reg_diag_data_buffer_bsn.mem' start='0x80' end='0x100' datawidth='32' /&gt;&lt;slave name='reg_stat_hdr_dat_bst_0.mem' start='0x100' end='0x200' datawidth='32' /&gt;&lt;slave name='reg_hdr_dat.mem' start='0x200' end='0x400' datawidth='32' /&gt;&lt;slave name='reg_bsn_monitor_input.mem' start='0x400' end='0x800' datawidth='32' /&gt;&lt;slave name='ram_scrap.mem' start='0x800' end='0x1000' datawidth='32' /&gt;&lt;slave name='avs_eth_0.mms_tse' start='0x1000' end='0x2000' datawidth='32' /&gt;&lt;slave name='avs_eth_0.mms_ram' start='0x2000' end='0x3000' datawidth='32' /&gt;&lt;slave name='reg_wdi.mem' start='0x3000' end='0x3008' datawidth='32' /&gt;&lt;slave name='reg_bsn_scheduler_xsub.mem' start='0x3008' end='0x3010' datawidth='32' /&gt;&lt;slave name='pio_wdi.s1' start='0x3010' end='0x3020' datawidth='32' /&gt;&lt;slave name='timer_0.s1' start='0x3020' end='0x3040' datawidth='16' /&gt;&lt;slave name='avs_eth_0.mms_reg' start='0x3040' end='0x3080' datawidth='32' /&gt;&lt;slave name='reg_dp_shiftram.mem' start='0x3080' end='0x3100' datawidth='32' /&gt;&lt;slave name='reg_stat_hdr_dat_bst_1.mem' start='0x3100' end='0x3200' datawidth='32' /&gt;&lt;slave name='reg_stat_hdr_dat_sst.mem' start='0x3200' end='0x3300' datawidth='32' /&gt;&lt;slave name='reg_wg.mem' start='0x3300' end='0x3400' datawidth='32' /&gt;&lt;slave name='reg_aduh_monitor.mem' start='0x3400' end='0x3500' datawidth='32' /&gt;&lt;slave name='reg_unb_pmbus.mem' start='0x3500' end='0x3600' datawidth='32' /&gt;&lt;slave name='reg_unb_sens.mem' start='0x3600' end='0x3700' datawidth='32' /&gt;&lt;slave name='reg_crosslets_info.mem' start='0x3700' end='0x3740' datawidth='32' /&gt;&lt;slave name='reg_sdp_info.mem' start='0x3740' end='0x3780' datawidth='32' /&gt;&lt;slave name='reg_fpga_voltage_sens.mem' start='0x3780' end='0x37C0' datawidth='32' /&gt;&lt;slave name='reg_bsn_source_v2.mem' start='0x37C0' end='0x37E0' datawidth='32' /&gt;&lt;slave name='reg_fpga_temp_sens.mem' start='0x37E0' end='0x3800' datawidth='32' /&gt;&lt;slave name='cpu_0.debug_mem_slave' start='0x3800' end='0x4000' datawidth='32' /&gt;&lt;slave name='ram_st_bst.mem' start='0x4000' end='0x8000' datawidth='32' /&gt;&lt;slave name='reg_nw_10gbe_mac.mem' start='0x8000' end='0x10000' datawidth='32' /&gt;&lt;slave name='rom_system_info.mem' start='0x10000' end='0x18000' datawidth='32' /&gt;&lt;slave name='ram_equalizer_gains.mem' start='0x18000' end='0x20000' datawidth='32' /&gt;&lt;slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' datawidth='32' /&gt;&lt;slave name='ram_bf_weights.mem' start='0x40000' end='0x60000' datawidth='32' /&gt;&lt;slave name='ram_st_xsq.mem' start='0x60000' end='0x70000' datawidth='32' /&gt;&lt;slave name='ram_ss_ss_wide.mem' start='0x70000' end='0x80000' datawidth='32' /&gt;&lt;slave name='ram_wg.mem' start='0x80000' end='0x90000' datawidth='32' /&gt;&lt;slave name='ram_fil_coefs.mem' start='0x90000' end='0xA0000' datawidth='32' /&gt;&lt;slave name='ram_st_sst.mem' start='0xA0000' end='0xB0000' datawidth='32' /&gt;&lt;slave name='jesd204b.mem' start='0xB0000' end='0xB4000' datawidth='32' /&gt;&lt;slave name='reg_epcs.mem' start='0xB4000' end='0xB4020' datawidth='32' /&gt;&lt;slave name='reg_remu.mem' start='0xB4020' end='0xB4040' datawidth='32' /&gt;&lt;slave name='reg_dp_xonoff.mem' start='0xB4040' end='0xB4050' datawidth='32' /&gt;&lt;slave name='reg_bf_scale.mem' start='0xB4050' end='0xB4060' datawidth='32' /&gt;&lt;slave name='reg_dp_sync_insert_v2.mem' start='0xB4060' end='0xB4068' datawidth='32' /&gt;&lt;slave name='reg_stat_enable_bst_1.mem' start='0xB4068' end='0xB4070' datawidth='32' /&gt;&lt;slave name='reg_stat_enable_bst_0.mem' start='0xB4070' end='0xB4078' datawidth='32' /&gt;&lt;slave name='reg_stat_enable_sst.mem' start='0xB4078' end='0xB4080' datawidth='32' /&gt;&lt;slave name='pio_jesd_ctrl.mem' start='0xB4080' end='0xB4088' datawidth='32' /&gt;&lt;slave name='reg_nw_10gbe_eth10g.mem' start='0xB4088' end='0xB4090' datawidth='32' /&gt;&lt;slave name='reg_dp_selector.mem' start='0xB4090' end='0xB4098' datawidth='32' /&gt;&lt;slave name='reg_bsn_scheduler.mem' start='0xB4098' end='0xB40A0' datawidth='32' /&gt;&lt;slave name='reg_si.mem' start='0xB40A0' end='0xB40A8' datawidth='32' /&gt;&lt;slave name='reg_mmdp_data.mem' start='0xB40A8' end='0xB40B0' datawidth='32' /&gt;&lt;slave name='reg_mmdp_ctrl.mem' start='0xB40B0' end='0xB40B8' datawidth='32' /&gt;&lt;slave name='reg_dpmm_data.mem' start='0xB40B8' end='0xB40C0' datawidth='32' /&gt;&lt;slave name='reg_dpmm_ctrl.mem' start='0xB40C0' end='0xB40C8' datawidth='32' /&gt;&lt;slave name='pio_pps.mem' start='0xB40C8' end='0xB40D0' datawidth='32' /&gt;&lt;slave name='jtag_uart_0.avalon_jtag_slave' start='0xB40D0' end='0xB40D8' datawidth='32' /&gt;&lt;slave name='ram_diag_data_buffer_bsn.mem' start='0x800000' end='0x1000000' datawidth='32' /&gt;&lt;/address-map&gt;</value>
<value>&lt;address-map&gt;&lt;slave name='pio_system_info.mem' start='0x0' end='0x80' datawidth='32' /&gt;&lt;slave name='reg_diag_data_buffer_bsn.mem' start='0x80' end='0x100' datawidth='32' /&gt;&lt;slave name='reg_stat_hdr_dat_sst.mem' start='0x100' end='0x200' datawidth='32' /&gt;&lt;slave name='reg_stat_hdr_dat_bst.mem' start='0x200' end='0x400' datawidth='32' /&gt;&lt;slave name='reg_bsn_monitor_input.mem' start='0x400' end='0x800' datawidth='32' /&gt;&lt;slave name='ram_scrap.mem' start='0x800' end='0x1000' datawidth='32' /&gt;&lt;slave name='avs_eth_0.mms_tse' start='0x1000' end='0x2000' datawidth='32' /&gt;&lt;slave name='avs_eth_0.mms_ram' start='0x2000' end='0x3000' datawidth='32' /&gt;&lt;slave name='reg_wdi.mem' start='0x3000' end='0x3008' datawidth='32' /&gt;&lt;slave name='reg_bsn_scheduler_xsub.mem' start='0x3008' end='0x3010' datawidth='32' /&gt;&lt;slave name='pio_wdi.s1' start='0x3010' end='0x3020' datawidth='32' /&gt;&lt;slave name='timer_0.s1' start='0x3020' end='0x3040' datawidth='16' /&gt;&lt;slave name='avs_eth_0.mms_reg' start='0x3040' end='0x3080' datawidth='32' /&gt;&lt;slave name='reg_dp_shiftram.mem' start='0x3080' end='0x3100' datawidth='32' /&gt;&lt;slave name='reg_wg.mem' start='0x3100' end='0x3200' datawidth='32' /&gt;&lt;slave name='reg_hdr_dat.mem' start='0x3200' end='0x3400' datawidth='32' /&gt;&lt;slave name='reg_aduh_monitor.mem' start='0x3400' end='0x3500' datawidth='32' /&gt;&lt;slave name='reg_unb_pmbus.mem' start='0x3500' end='0x3600' datawidth='32' /&gt;&lt;slave name='reg_unb_sens.mem' start='0x3600' end='0x3700' datawidth='32' /&gt;&lt;slave name='reg_crosslets_info.mem' start='0x3700' end='0x3740' datawidth='32' /&gt;&lt;slave name='reg_sdp_info.mem' start='0x3740' end='0x3780' datawidth='32' /&gt;&lt;slave name='reg_fpga_voltage_sens.mem' start='0x3780' end='0x37C0' datawidth='32' /&gt;&lt;slave name='reg_bsn_source_v2.mem' start='0x37C0' end='0x37E0' datawidth='32' /&gt;&lt;slave name='reg_fpga_temp_sens.mem' start='0x37E0' end='0x3800' datawidth='32' /&gt;&lt;slave name='cpu_0.debug_mem_slave' start='0x3800' end='0x4000' datawidth='32' /&gt;&lt;slave name='ram_st_bst.mem' start='0x4000' end='0x8000' datawidth='32' /&gt;&lt;slave name='reg_nw_10gbe_mac.mem' start='0x8000' end='0x10000' datawidth='32' /&gt;&lt;slave name='rom_system_info.mem' start='0x10000' end='0x18000' datawidth='32' /&gt;&lt;slave name='ram_equalizer_gains.mem' start='0x18000' end='0x20000' datawidth='32' /&gt;&lt;slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' datawidth='32' /&gt;&lt;slave name='ram_bf_weights.mem' start='0x40000' end='0x60000' datawidth='32' /&gt;&lt;slave name='ram_st_xsq.mem' start='0x60000' end='0x70000' datawidth='32' /&gt;&lt;slave name='ram_ss_ss_wide.mem' start='0x70000' end='0x80000' datawidth='32' /&gt;&lt;slave name='ram_wg.mem' start='0x80000' end='0x90000' datawidth='32' /&gt;&lt;slave name='ram_fil_coefs.mem' start='0x90000' end='0xA0000' datawidth='32' /&gt;&lt;slave name='ram_st_sst.mem' start='0xA0000' end='0xB0000' datawidth='32' /&gt;&lt;slave name='jesd204b.mem' start='0xB0000' end='0xB4000' datawidth='32' /&gt;&lt;slave name='reg_epcs.mem' start='0xB4000' end='0xB4020' datawidth='32' /&gt;&lt;slave name='reg_remu.mem' start='0xB4020' end='0xB4040' datawidth='32' /&gt;&lt;slave name='reg_stat_enable_bst.mem' start='0xB4040' end='0xB4050' datawidth='32' /&gt;&lt;slave name='reg_dp_xonoff.mem' start='0xB4050' end='0xB4060' datawidth='32' /&gt;&lt;slave name='reg_bf_scale.mem' start='0xB4060' end='0xB4070' datawidth='32' /&gt;&lt;slave name='reg_dp_sync_insert_v2.mem' start='0xB4070' end='0xB4078' datawidth='32' /&gt;&lt;slave name='reg_stat_enable_sst.mem' start='0xB4078' end='0xB4080' datawidth='32' /&gt;&lt;slave name='pio_jesd_ctrl.mem' start='0xB4080' end='0xB4088' datawidth='32' /&gt;&lt;slave name='reg_nw_10gbe_eth10g.mem' start='0xB4088' end='0xB4090' datawidth='32' /&gt;&lt;slave name='reg_dp_selector.mem' start='0xB4090' end='0xB4098' datawidth='32' /&gt;&lt;slave name='reg_bsn_scheduler.mem' start='0xB4098' end='0xB40A0' datawidth='32' /&gt;&lt;slave name='reg_si.mem' start='0xB40A0' end='0xB40A8' datawidth='32' /&gt;&lt;slave name='reg_mmdp_data.mem' start='0xB40A8' end='0xB40B0' datawidth='32' /&gt;&lt;slave name='reg_mmdp_ctrl.mem' start='0xB40B0' end='0xB40B8' datawidth='32' /&gt;&lt;slave name='reg_dpmm_data.mem' start='0xB40B8' end='0xB40C0' datawidth='32' /&gt;&lt;slave name='reg_dpmm_ctrl.mem' start='0xB40C0' end='0xB40C8' datawidth='32' /&gt;&lt;slave name='pio_pps.mem' start='0xB40C8' end='0xB40D0' datawidth='32' /&gt;&lt;slave name='jtag_uart_0.avalon_jtag_slave' start='0xB40D0' end='0xB40D8' datawidth='32' /&gt;&lt;slave name='ram_diag_data_buffer_bsn.mem' start='0x800000' end='0x1000000' datawidth='32' /&gt;&lt;/address-map&gt;</value>
</entry>
</entry>
<entry>
<entry>
<key>ADDRESS_WIDTH</key>
<key>ADDRESS_WIDTH</key>
Loading