Reinier van der Walle
--- a/libraries/base/dp/src/vhdl/dp_sync_recover.vhd
+++ b/libraries/base/dp/src/vhdl/dp_sync_recover.vhd
    dp_clk     : IN  STD_LOGIC;
    
    in_sosi    : IN  t_dp_sosi := c_dp_sosi_rst;
-    val        : IN  STD_LOGIC; -- valid at the output
+    val        : IN  STD_LOGIC; -- desired valid of the output
--- a/libraries/base/dp/src/vhdl/dp_sync_recover.vhd
+++ b/libraries/base/dp/src/vhdl/dp_sync_recover.vhd
 ARCHITECTURE rtl OF dp_sync_recover IS

  TYPE t_reg IS RECORD  -- local registers
-    bsn_at_sync : STD_LOGIC_VECTOR(c_dp_stream_bsn_w -1 DOWNTO 0);
-    data_cnt    : NATURAL RANGE 0 TO g_nof_data_per_block;
-    out_bsn     : STD_LOGIC_VECTOR(c_dp_stream_bsn_w -1 DOWNTO 0);
-    out_sosi    : t_dp_sosi;
+    bsn_at_sync        : STD_LOGIC_VECTOR(c_dp_stream_bsn_w -1 DOWNTO 0);
+    bsn_before_restart : STD_LOGIC_VECTOR(c_dp_stream_bsn_w -1 DOWNTO 0);
+    bsn_at_restart     : STD_LOGIC_VECTOR(c_dp_stream_bsn_w -1 DOWNTO 0);