Fix expected c_rx_exp_latency_st.

libraries/io/eth/tb/vhdl/tb_eth_tester.vhd

@@ -118,9 +118,9 @@ ARCHITECTURE tb OF tb_eth_tester IS
   -- Expected Tx --> Rx latency values obtained from a tb run
   CONSTANT c_tx_exp_latency          : NATURAL := 0;
   CONSTANT c_rx_exp_latency_en       : BOOLEAN := c_bg_block_len_max >= 50;
-  CONSTANT c_rx_exp_latency_st       : NATURAL := 27;
-  CONSTANT c_rx_exp_latency_sim_tse  : NATURAL := 165;
-  CONSTANT c_rx_exp_latency_tech_tse : NATURAL := 375;
+  CONSTANT c_rx_exp_latency_st       : NATURAL := 28;
+  CONSTANT c_rx_exp_latency_sim_tse  : NATURAL := 167;
+  CONSTANT c_rx_exp_latency_tech_tse : NATURAL := 372;
 
   -- CRC is added by Tx TSE IP and removed by dp_offload_rx when g_remove_crc =
   -- g_loopback_eth = TRUE. Therefore internally only application payload
@@ -522,7 +522,7 @@ BEGIN
               END IF;
             END IF;
           ELSE
-            ASSERT almost_equal(rx_mon_latency_arr(I), c_rx_exp_latency_st, 0) REPORT
+            ASSERT almost_equal(rx_mon_latency_arr(I), c_rx_exp_latency_st, 10) REPORT
                 c_tb_str & "Wrong rx latency using st interface (" & NATURAL'IMAGE(I) & ")" SEVERITY ERROR;
           END IF;
         END IF;