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Commit fe697c9f authored by Pepping's avatar Pepping
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Replaced to bf library

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libraries/dsp/bf/designs/unb1_fn_bf/src/vhdl/node_unb1_fn_bf.vhd deleted 100644 → 0
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-------------------------------------------------------------------------------
--
-- Copyright (C) 2011
-- ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
-- P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
--
-- This program is free software: you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation, either version 3 of the License, or
-- (at your option) any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program. If not, see <http://www.gnu.org/licenses/>.
--
-------------------------------------------------------------------------------
LIBRARY IEEE, common_lib, dp_lib, diag_lib, eth_lib, tech_tse_lib, bf_lib;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.NUMERIC_STD.ALL;
USE common_lib.common_pkg.ALL;
USE common_lib.common_mem_pkg.ALL;
USE common_lib.common_network_total_header_pkg.ALL;
USE dp_lib.dp_stream_pkg.ALL;
USE diag_lib.diag_pkg.ALL;
USE eth_lib.eth_pkg.ALL;
USE tech_tse_lib.tech_tse_pkg.ALL;
USE tech_tse_lib.tb_tech_tse_pkg.ALL;
USE bf_lib.ALL;
USE bf_lib.bf_pkg.ALL;
ENTITY node_unb1_fn_bf IS
GENERIC(
g_use_bf : BOOLEAN := TRUE; -- FALSE skips instantiation of the BF
g_bf : t_c_bf := c_bf;
g_bf_weights_file_name : STRING := "../../../../../dsp/bf/build/data/weights"; -- default file location for synthesis
g_ss_wide_file_prefix : STRING := "UNUSED"; -- path_to_file
g_bf_offload : BOOLEAN := FALSE; -- Use DP TX offload to stream BF output towards LCU
g_use_block_gen : BOOLEAN := TRUE; -- FALSE uses external input.
g_block_gen_file_prefix : STRING := "../../../../../modules/Lofar/diag/src/data/bf_in_data"; -- default file location for synthesis
g_bg_diag_wave_period : POSITIVE := 4; -- This generic defines the period of the waveform that is generated with the block generator.
g_weights_write_only : BOOLEAN := FALSE -- When set to TRUE the M9K blocks are forced to Simple Dual Port mode. When FALSE it is True Dual Port.
);
PORT(
-- System
mm_rst : IN STD_LOGIC;
mm_clk : IN STD_LOGIC; -- 125 MHz from xo_clk PLL in SOPC system
dp_rst : IN STD_LOGIC;
dp_clk : IN STD_LOGIC; -- 200 MHz from CLK system clock
-- MM interface
-- . block generator
reg_diag_bg_mosi : IN t_mem_mosi;
reg_diag_bg_miso : OUT t_mem_miso;
ram_diag_bg_mosi : IN t_mem_mosi;
ram_diag_bg_miso : OUT t_mem_miso;
-- . beam former
ram_ss_ss_wide_mosi : IN t_mem_mosi;
ram_ss_ss_wide_miso : OUT t_mem_miso := c_mem_miso_rst;
ram_bf_weights_mosi : IN t_mem_mosi;
ram_bf_weights_miso : OUT t_mem_miso;
ram_st_sst_bf_mosi : IN t_mem_mosi;
ram_st_sst_bf_miso : OUT t_mem_miso;
reg_st_sst_bf_mosi : IN t_mem_mosi;
reg_st_sst_bf_miso : OUT t_mem_miso;
-- . hdr_insert and hdr_remove for bf_out_offload
reg_hdr_insert_mosi : IN t_mem_mosi := c_mem_mosi_rst;
ram_hdr_insert_mosi : IN t_mem_mosi := c_mem_mosi_rst;
-- . Nof words to offload selection
reg_dp_split_mosi : IN t_mem_mosi := c_mem_mosi_rst;
reg_dp_split_miso : OUT t_mem_miso;
reg_dp_pkt_merge_mosi : IN t_mem_mosi := c_mem_mosi_rst;
reg_dp_pkt_merge_miso : OUT t_mem_miso;
-- ST interface, BF subbands in
ext_in_sosi_arr : IN t_dp_sosi_arr( g_bf.nof_input_streams-1 DOWNTO 0) := (OTHERS=>c_dp_sosi_rst);
ext_in_siso_arr : OUT t_dp_siso_arr( g_bf.nof_input_streams-1 DOWNTO 0) := (OTHERS=>c_dp_siso_rst);
-- ST interface, BF beamlets out
out_raw_sosi_arr : OUT t_dp_sosi_arr( g_bf.nof_bf_units-1 DOWNTO 0); -- raw beamlets
out_bst_sosi_arr : OUT t_dp_sosi_arr( g_bf.nof_bf_units-1 DOWNTO 0); -- 16b beamlets; a selection can be offloaded via bf_out_offload_tx_sosi_arr.
out_qua_sosi_arr : OUT t_dp_sosi_arr( g_bf.nof_bf_units-1 DOWNTO 0); -- 8b beamlets
-- DP offload for 1GbE
bf_out_offload_tx_sosi_arr : OUT t_dp_sosi_arr(c_eth_nof_udp_ports-1 DOWNTO 0); -- 16b beamlets
bf_out_offload_tx_siso_arr : IN t_dp_siso_arr(c_eth_nof_udp_ports-1 DOWNTO 0) := (OTHERS => c_dp_siso_rst)
);
END node_unb1_fn_bf;
ARCHITECTURE str OF node_unb1_fn_bf IS
CONSTANT c_buf_addr_w : NATURAL := ceil_log2(g_bg_diag_wave_period) + ceil_log2(g_bf.nof_subbands*g_bf.nof_signal_paths/g_bf.nof_input_streams);
SIGNAL bf_in_sosi_arr : t_dp_sosi_arr( g_bf.nof_input_streams-1 DOWNTO 0);
SIGNAL bg_out_sosi_arr : t_dp_sosi_arr( g_bf.nof_input_streams-1 DOWNTO 0);
SIGNAL i_out_bst_sosi_arr : t_dp_sosi_arr(g_bf.nof_bf_units-1 DOWNTO 0);
BEGIN
out_bst_sosi_arr <= i_out_bst_sosi_arr;
---------------------------------------------------------------------------------------
-- Use Block Generator input by default
---------------------------------------------------------------------------------------
gen_block_gen : IF g_use_block_gen = TRUE GENERATE
u_bg : ENTITY diag_lib.mms_diag_block_gen
GENERIC MAP(
g_blk_sync => TRUE,
g_nof_output_streams => g_bf.nof_input_streams,
g_buf_dat_w => c_nof_complex*g_bf.in_dat_w,
g_buf_addr_w => c_buf_addr_w, -- Waveform buffer size 2**g_buf_addr_w nof samples
g_file_name_prefix => g_block_gen_file_prefix
)
PORT MAP(
-- System
mm_rst => mm_rst,
mm_clk => mm_clk,
dp_rst => dp_rst,
dp_clk => dp_clk,
-- MM interface
reg_bg_ctrl_mosi => reg_diag_bg_mosi,
reg_bg_ctrl_miso => reg_diag_bg_miso,
ram_bg_data_mosi => ram_diag_bg_mosi,
ram_bg_data_miso => ram_diag_bg_miso,
-- ST interface
out_sosi_arr => bg_out_sosi_arr
);
bf_in_sosi_arr <= bg_out_sosi_arr;
END GENERATE;
---------------------------------------------------------------------------------------
-- Override Block Generator output and use external input instead
---------------------------------------------------------------------------------------
gen_ext_in : IF g_use_block_gen = FALSE GENERATE
bf_in_sosi_arr <= ext_in_sosi_arr;
END GENERATE;
---------------------------------------------------------------------------------------
-- Beam Former
---------------------------------------------------------------------------------------
gen_bf : IF g_use_bf = TRUE GENERATE
u_bf : ENTITY bf_lib.bf
GENERIC MAP (
g_bf => g_bf,
g_bf_weights_file_name => g_bf_weights_file_name,
g_ss_wide_file_prefix => g_ss_wide_file_prefix,
g_weights_write_only => g_weights_write_only
)
PORT MAP (
-- System
dp_rst => dp_rst,
dp_clk => dp_clk,
mm_rst => mm_rst,
mm_clk => mm_clk,
-- MM interface
ram_ss_ss_wide_mosi => ram_ss_ss_wide_mosi,
ram_ss_ss_wide_miso => ram_ss_ss_wide_miso,
ram_bf_weights_mosi => ram_bf_weights_mosi,
ram_bf_weights_miso => ram_bf_weights_miso,
ram_st_sst_mosi => ram_st_sst_bf_mosi,
ram_st_sst_miso => ram_st_sst_bf_miso,
reg_st_sst_mosi => reg_st_sst_bf_mosi,
reg_st_sst_miso => reg_st_sst_bf_miso,
-- ST interface
in_sosi_arr => bf_in_sosi_arr,
in_siso_arr => ext_in_siso_arr,
out_raw_sosi_arr => out_raw_sosi_arr, -- raw beamlets
out_bst_sosi_arr => i_out_bst_sosi_arr, -- 16b beamlets
out_qua_sosi_arr => out_qua_sosi_arr -- 8b beamlets
);
END GENERATE;
---------------------------------------------------------------------------------------
-- Offload 16b beamlets from out_bst_sosi_arr to udp_offload TX port in ctrl_unb_common
---------------------------------------------------------------------------------------
gen_bf_offload : IF g_bf_offload = TRUE GENERATE
u_dp_offload : ENTITY dp_lib.dp_offload_tx
GENERIC MAP (
g_nof_streams => g_bf.nof_bf_units,
g_data_w => c_eth_data_w,
g_block_size => g_bf.nof_weights, -- = 256
g_block_nof_sel_words => 20,
g_nof_words_per_pkt => 360,
g_hdr_nof_words => c_network_total_header_32b_nof_words,
g_use_complex => TRUE,
g_use_input_fifo => TRUE,
g_use_output_fifo => TRUE
)
PORT MAP (
mm_rst => mm_rst,
mm_clk => mm_clk,
st_rst => dp_rst,
st_clk => dp_clk,
reg_hdr_insert_mosi => reg_hdr_insert_mosi,
ram_hdr_insert_mosi => ram_hdr_insert_mosi,
reg_dp_split_mosi => reg_dp_split_mosi,
reg_dp_split_miso => reg_dp_split_miso,
reg_dp_pkt_merge_mosi => reg_dp_pkt_merge_mosi,
reg_dp_pkt_merge_miso => reg_dp_pkt_merge_miso,
dp_sosi_arr => i_out_bst_sosi_arr,
dp_siso_arr => OPEN, -- No flow control, so we're instantiating an input FIFO.
tx_sosi_arr => bf_out_offload_tx_sosi_arr(g_bf.nof_bf_units-1 DOWNTO 0),
tx_siso_arr => bf_out_offload_tx_siso_arr(g_bf.nof_bf_units-1 DOWNTO 0)
);
END GENERATE;
END str;
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