Only clear counts on MM clear write.

libraries/base/dp/src/vhdl/dp_strobe_total_count.vhd

@@ -26,8 +26,8 @@
 -- * g_nof_counts >= 1, maximum c_nof_counts_max = 15
 --   There are g_nof_counts in parallel, one clear that clears them all
 --   . count any strobe like e.g. sync, sop, valid, error flag, ...
---   . MM read or write of clear registers clears all counter immediately,
---     the clear data value is dont care.
+--   . MM write of clear registers clears all counter immediately, the
+--     clear data value is dont care.
 --   . the count clips at 2**g_count_w-1 in case of overflow when g_clip =
 --     TRUE, else it wraps and continues from 0.
 -- * g_count_w <= 64
@@ -130,7 +130,8 @@ BEGIN
   ASSERT g_nof_counts <= c_nof_counts_max REPORT "Too many counters to fit REGMAP." SEVERITY FAILURE;
   ASSERT g_count_w <= g_mm_w*2 REPORT "Too wide counter to fit REGMAP." SEVERITY FAILURE;
 
-  mm_cnt_clr <= (reg_mosi.rd OR reg_mosi.wr) WHEN TO_UINT(reg_mosi.address(c_mm_reg.adr_w-1 DOWNTO 0)) = c_clear_adr ELSE '0' ;
+  -- Only clear on MM write, to allow MM read of all register fields without clear
+  mm_cnt_clr <= reg_mosi.wr WHEN TO_UINT(reg_mosi.address(c_mm_reg.adr_w-1 DOWNTO 0)) = c_clear_adr ELSE '0' ;
 
   u_common_spulse : ENTITY common_lib.common_spulse
     PORT MAP (