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Commit fa5aea78 authored by Eric Kooistra's avatar Eric Kooistra
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Added ip_arria10_phy_10gbase_r_24.qsys that generates a component with 24 10GBASE_R transceivers.

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...@@ -10,6 +10,11 @@ README.txt for $RADIOHDL/libraries/technology/ip_arria10/phy_10gbase_r ...@@ -10,6 +10,11 @@ README.txt for $RADIOHDL/libraries/technology/ip_arria10/phy_10gbase_r
1) Porting 1) Porting
The phy_10gbase_r IP is new for Arria10. However it serves the similar purpose as the phy_xaui IP for Stratix IV. The phy_10gbase_r IP is new for Arria10. However it serves the similar purpose as the phy_xaui IP for Stratix IV.
There are several Qsys variants for the phy_10gbase_r IP:
- ip_arria10_phy_10gbase_r.qsys generates a component with 1 10GBASE_R transceiver.
- ip_arria10_phy_10gbase_r_24.qsys generates a component with 24 10GBASE_R transceivers.
- ip_arria10_phy_10gbase_r_48.qsys generates a component with 48 10GBASE_R transceivers.
2) IP component 2) IP component
......
README.txt for $RADIOHDL/libraries/technology/ip_arria10/phy_10gbase_r_24
This ip_arria10_phy_10gbase_r_24.qsys generates a component with 24 10GBASE_R transceivers. For more info see README for phy_10gbase_r.
\ No newline at end of file
#------------------------------------------------------------------------------
#
# Copyright (C) 2014
# ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
# JIVE (Joint Institute for VLBI in Europe) <http://www.jive.nl/>
# P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
#
# This program is free software: you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation, either version 3 of the License, or
# (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program. If not, see <http://www.gnu.org/licenses/>.
#
#------------------------------------------------------------------------------
# This file is based on generated file mentor/msim_setup.tcl.
# - the values for modelsim_search_libraries key in the hdllib.cfg follow from altera libraries vmap section in the msim_setup.tcl
# - vmap for the IP specific libraries and compile all IP source files into those libraries similar as in the msim_setup.tcl
# - replace QSYS_SIMDIR by IP_DIR
# - if the testbench is also generated with QSYS then only the IP_TBDIR files are needed, because these also contain the source files.
set IP_DIR "$env(RADIOHDL)/libraries/technology/ip_arria10/phy_10gbase_r_24/generated/sim"
#vlib ./work/ ;# Assume library work already exists
vmap ip_arria10_phy_10gbase_r_24_altera_xcvr_native_a10_141 ./work/
vlog -sv "$IP_DIR/../altera_xcvr_native_a10_141/sim/altera_xcvr_functions.sv" -work ip_arria10_phy_10gbase_r_24_altera_xcvr_native_a10_141
vlog -sv "$IP_DIR/../altera_xcvr_native_a10_141/sim/mentor/altera_xcvr_functions.sv" -work ip_arria10_phy_10gbase_r_24_altera_xcvr_native_a10_141
vlog -sv "$IP_DIR/../altera_xcvr_native_a10_141/sim/alt_xcvr_resync.sv" -work ip_arria10_phy_10gbase_r_24_altera_xcvr_native_a10_141
vlog -sv "$IP_DIR/../altera_xcvr_native_a10_141/sim/mentor/alt_xcvr_resync.sv" -work ip_arria10_phy_10gbase_r_24_altera_xcvr_native_a10_141
vlog -sv "$IP_DIR/../altera_xcvr_native_a10_141/sim/twentynm_pcs.sv" -work ip_arria10_phy_10gbase_r_24_altera_xcvr_native_a10_141
vlog -sv "$IP_DIR/../altera_xcvr_native_a10_141/sim/twentynm_pma.sv" -work ip_arria10_phy_10gbase_r_24_altera_xcvr_native_a10_141
vlog -sv "$IP_DIR/../altera_xcvr_native_a10_141/sim/twentynm_xcvr_avmm.sv" -work ip_arria10_phy_10gbase_r_24_altera_xcvr_native_a10_141
vlog -sv "$IP_DIR/../altera_xcvr_native_a10_141/sim/twentynm_xcvr_native.sv" -work ip_arria10_phy_10gbase_r_24_altera_xcvr_native_a10_141
vlog -sv "$IP_DIR/../altera_xcvr_native_a10_141/sim/mentor/twentynm_pcs.sv" -work ip_arria10_phy_10gbase_r_24_altera_xcvr_native_a10_141
vlog -sv "$IP_DIR/../altera_xcvr_native_a10_141/sim/mentor/twentynm_pma.sv" -work ip_arria10_phy_10gbase_r_24_altera_xcvr_native_a10_141
vlog -sv "$IP_DIR/../altera_xcvr_native_a10_141/sim/mentor/twentynm_xcvr_avmm.sv" -work ip_arria10_phy_10gbase_r_24_altera_xcvr_native_a10_141
vlog -sv "$IP_DIR/../altera_xcvr_native_a10_141/sim/mentor/twentynm_xcvr_native.sv" -work ip_arria10_phy_10gbase_r_24_altera_xcvr_native_a10_141
vlog -sv "$IP_DIR/../altera_xcvr_native_a10_141/sim/a10_avmm_h.sv" -work ip_arria10_phy_10gbase_r_24_altera_xcvr_native_a10_141
vlog -sv "$IP_DIR/../altera_xcvr_native_a10_141/sim/altera_xcvr_native_a10.sv" -work ip_arria10_phy_10gbase_r_24_altera_xcvr_native_a10_141
vlog -sv "$IP_DIR/../altera_xcvr_native_a10_141/sim/alt_xcvr_native_avmm_nf.sv" -work ip_arria10_phy_10gbase_r_24_altera_xcvr_native_a10_141
vlog -sv "$IP_DIR/../altera_xcvr_native_a10_141/sim/alt_xcvr_native_avmm_csr.sv" -work ip_arria10_phy_10gbase_r_24_altera_xcvr_native_a10_141
vlog -sv "$IP_DIR/../altera_xcvr_native_a10_141/sim/alt_xcvr_native_prbs_accum.sv" -work ip_arria10_phy_10gbase_r_24_altera_xcvr_native_a10_141
vlog -sv "$IP_DIR/../altera_xcvr_native_a10_141/sim/alt_xcvr_native_embedded_debug.sv" -work ip_arria10_phy_10gbase_r_24_altera_xcvr_native_a10_141
vlog -sv "$IP_DIR/../altera_xcvr_native_a10_141/sim/mentor/a10_avmm_h.sv" -work ip_arria10_phy_10gbase_r_24_altera_xcvr_native_a10_141
vlog -sv "$IP_DIR/../altera_xcvr_native_a10_141/sim/mentor/altera_xcvr_native_a10.sv" -work ip_arria10_phy_10gbase_r_24_altera_xcvr_native_a10_141
vlog -sv "$IP_DIR/../altera_xcvr_native_a10_141/sim/mentor/alt_xcvr_native_avmm_nf.sv" -work ip_arria10_phy_10gbase_r_24_altera_xcvr_native_a10_141
vlog -sv "$IP_DIR/../altera_xcvr_native_a10_141/sim/mentor/alt_xcvr_native_avmm_csr.sv" -work ip_arria10_phy_10gbase_r_24_altera_xcvr_native_a10_141
vlog -sv "$IP_DIR/../altera_xcvr_native_a10_141/sim/mentor/alt_xcvr_native_prbs_accum.sv" -work ip_arria10_phy_10gbase_r_24_altera_xcvr_native_a10_141
vlog -sv "$IP_DIR/../altera_xcvr_native_a10_141/sim/mentor/alt_xcvr_native_embedded_debug.sv" -work ip_arria10_phy_10gbase_r_24_altera_xcvr_native_a10_141
vcom "$IP_DIR/ip_arria10_phy_10gbase_r_24.vhd"
#!/bin/bash
# -------------------------------------------------------------------------- #
#
# Copyright (C) 2015
# ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
# JIVE (Joint Institute for VLBI in Europe) <http://www.jive.nl/>
# P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
#
# This program is free software: you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation, either version 3 of the License, or
# (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program. If not, see <http://www.gnu.org/licenses/>.
#
# -------------------------------------------------------------------------- #
#
# Purpose: Generate IP with Qsys
# Description:
# Generate the IP in a separate generated/ subdirectory.
#
# Usage:
#
# ./generate_ip.sh
#
# Tool settings for selected target "unb2" with arria10
. ${RADIOHDL}/tools/quartus/set_quartus unb2
#qsys-generate --help
# Only generate the source IP
# - use --synthesis=VHDL to have top level in VHDL similar as with MegaWizard
qsys-generate ip_arria10_phy_10gbase_r_24.qsys \
--synthesis=VHDL \
--simulation=VHDL \
--output-directory=generated \
--allow-mixed-language-simulation
hdl_lib_name = ip_arria10_phy_10gbase_r_24
hdl_library_clause_name = ip_arria10_phy_10gbase_r_altera_xcvr_native_a10_141
hdl_lib_uses_synth =
hdl_lib_uses_sim =
hdl_lib_technology = ip_arria10
build_dir_sim = $HDL_BUILD_DIR
build_dir_synth = $HDL_BUILD_DIR
modelsim_compile_ip_files =
$RADIOHDL/libraries/technology/ip_arria10/phy_10gbase_r_24/compile_ip.tcl
synth_files =
test_bench_files =
quartus_qip_files =
generated/ip_arria10_phy_10gbase_r_24.qip
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