Use fixed O_rn and N_rn of 8 bits wide.

libraries/base/ring/src/vhdl/ring_info.vhd

@@ -38,10 +38,6 @@ USE common_lib.common_field_pkg.ALL;
 USE work.ring_pkg.ALL;
 
 ENTITY ring_info IS
-  GENERIC (
-    -- Actual ring_info.O_rn field width can be less than a byte
-    g_ring_info_O_rn_w : NATURAL := c_byte_w
-  );
   PORT (
     -- Clocks and reset
     mm_rst     : IN  STD_LOGIC;   -- reset synchronous with mm_clk
@@ -62,8 +58,6 @@ ARCHITECTURE str OF ring_info IS
 
   SIGNAL mm_fields_out : STD_LOGIC_VECTOR(field_slv_out_len(c_ring_info_field_arr)-1 DOWNTO 0);
 
-  SIGNAL O_rn : STD_LOGIC_VECTOR(c_byte_w-1 DOWNTO 0);
-
 BEGIN
 
   u_mm_fields: ENTITY mm_lib.mm_fields
@@ -87,9 +81,7 @@ BEGIN
   );
 
   -- get "RW" fields from mm_fields
-  O_rn <= mm_fields_out(field_hi(c_ring_info_field_arr, "O_rn") DOWNTO field_lo(c_ring_info_field_arr, "O_rn"));
-
-  ring_info.O_rn <= RESIZE_UVEC(O_rn(g_ring_info_O_rn_w-1 DOWNTO 0), c_byte_w);
+  ring_info.O_rn <= mm_fields_out(field_hi(c_ring_info_field_arr, "O_rn") DOWNTO field_lo(c_ring_info_field_arr, "O_rn"));
   ring_info.N_rn <= mm_fields_out(field_hi(c_ring_info_field_arr, "N_rn") DOWNTO field_lo(c_ring_info_field_arr, "N_rn"));
 
   ring_info.use_cable_to_previous_rn <= sl(mm_fields_out(field_hi(c_ring_info_field_arr, "use_cable_to_previous_rn") DOWNTO field_lo(c_ring_info_field_arr, "use_cable_to_previous_rn")));