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RTSD
HDL
Commits
f6c5f590
Commit
f6c5f590
authored
10 years ago
by
Pepping
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Added entry for reg_io_ddr
parent
fc4e910c
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applications/unb1_reorder/quartus/sopc_unb1_reorder.sopc
+84
-50
84 additions, 50 deletions
applications/unb1_reorder/quartus/sopc_unb1_reorder.sopc
with
84 additions
and
50 deletions
applications/unb1_reorder/quartus/sopc_unb1_reorder.sopc
+
84
−
50
View file @
f6c5f590
...
...
@@ -14,7 +14,7 @@
{
datum baseAddress
{
value = "110
4
";
value = "11
2
0";
type = "long";
}
}
...
...
@@ -84,7 +84,23 @@
type = "String";
}
}
element pio_system_info.mem
element ram_diag_data_buffer_re.mem
{
datum baseAddress
{
value = "393216";
type = "long";
}
}
element ram_diag_bg.mem
{
datum baseAddress
{
value = "524288";
type = "long";
}
}
element reg_wdi.mem
{
datum _lockedAddress
{
...
...
@@ -93,23 +109,28 @@
}
datum baseAddress
{
value = "
0
";
value = "
12288
";
type = "long";
}
}
element ram_
diag_data_buffer_im
.mem
element ram_
ss_ss_wide
.mem
{
datum baseAddress
{
value = "
262144
";
value = "
32768
";
type = "long";
}
}
element pio_pps.mem
element rom_system_info.mem
{
datum _lockedAddress
{
value = "1";
type = "boolean";
}
datum baseAddress
{
value = "
1112
";
value = "
4096
";
type = "long";
}
}
...
...
@@ -121,27 +142,27 @@
type = "long";
}
}
element r
am_diag_data_buffer_re
.mem
element r
eg_unb_sens
.mem
{
datum baseAddress
{
value = "
393216
";
value = "
480
";
type = "long";
}
}
element
reg_diag_data_buffer_re
.mem
element
pio_pps
.mem
{
datum baseAddress
{
value = "
256
";
value = "
1128
";
type = "long";
}
}
element reg_
unb_sens
.mem
element reg_
diag_data_buffer_re
.mem
{
datum baseAddress
{
value = "
480
";
value = "
256
";
type = "long";
}
}
...
...
@@ -153,53 +174,40 @@
type = "long";
}
}
element rom_system_info.mem
{
datum _lockedAddress
element reg_io_ddr.mem
{
value = "1";
type = "boolean";
}
datum baseAddress
{
value = "
4096
";
value = "
1104
";
type = "long";
}
}
element ram_
ss_ss_wide
.mem
element ram_
diag_data_buffer_im
.mem
{
datum baseAddress
{
value = "
32768
";
value = "
262144
";
type = "long";
}
}
element reg_wdi.mem
{
datum _lockedAddress
element reg_diag_data_buffer_im.mem
{
value = "1";
type = "boolean";
}
datum baseAddress
{
value = "12
28
8";
value = "128";
type = "long";
}
}
element
ram_diag_bg
.mem
element
pio_system_info
.mem
{
datum
base
Address
datum
_locked
Address
{
value = "524288";
type = "long";
}
value = "1";
type = "boolean";
}
element reg_diag_data_buffer_im.mem
{
datum baseAddress
{
value = "
128
";
value = "
0
";
type = "long";
}
}
...
...
@@ -354,6 +362,14 @@
type = "int";
}
}
element reg_io_ddr
{
datum _sortIndex
{
value = "22";
type = "int";
}
}
element reg_unb_sens
{
datum _sortIndex
...
...
@@ -386,14 +402,6 @@
type = "long";
}
}
element timer_0.s1
{
datum baseAddress
{
value = "448";
type = "long";
}
}
element onchip_memory2_0.s1
{
datum _lockedAddress
...
...
@@ -407,6 +415,14 @@
type = "long";
}
}
element timer_0.s1
{
datum baseAddress
{
value = "448";
type = "long";
}
}
element pio_debug_wave.s1
{
datum baseAddress
...
...
@@ -440,8 +456,8 @@
<parameter
name=
"maxAdditionalLatency"
value=
"0"
/>
<parameter
name=
"projectName"
value=
"unb1_reorder.qpf"
/>
<parameter
name=
"sopcBorderPoints"
value=
"true"
/>
<parameter
name=
"systemHash"
value=
"-4
4271126507
"
/>
<parameter
name=
"timeStamp"
value=
"142720
5044735
"
/>
<parameter
name=
"systemHash"
value=
"-4
0450262752
"
/>
<parameter
name=
"timeStamp"
value=
"1427
7
20
908319
"
/>
<parameter
name=
"useTestBenchNamingPattern"
value=
"false"
/>
<module
kind=
"clock_source"
version=
"11.1"
enabled=
"1"
name=
"clk_0"
>
<parameter
name=
"clockFrequency"
value=
"25000000"
/>
...
...
@@ -542,7 +558,7 @@
<parameter
name=
"dcache_numTCDM"
value=
"_0"
/>
<parameter
name=
"dcache_lineSize"
value=
"_32"
/>
<parameter
name=
"dcache_bursts"
value=
"false"
/>
<parameter
name=
"dataSlaveMapParam"
>
<![CDATA[<address-map><slave name='pio_system_info.mem' start='0x0' end='0x80' /><slave name='reg_diag_data_buffer_im.mem' start='0x80' end='0x100' /><slave name='reg_diag_data_buffer_re.mem' start='0x100' end='0x180' /><slave name='avs_eth_0.mms_reg' start='0x180' end='0x1C0' /><slave name='timer_0.s1' start='0x1C0' end='0x1E0' /><slave name='reg_unb_sens.mem' start='0x1E0' end='0x200' /><slave name='reg_bsn_monitor.mem' start='0x200' end='0x400' /><slave name='reg_diag_bg.mem' start='0x400' end='0x420' /><slave name='altpll_0.pll_slave' start='0x420' end='0x430' /><slave name='pio_debug_wave.s1' start='0x430' end='0x440' /><slave name='pio_wdi.s1' start='0x440' end='0x450' /><slave name='jtag_uart_0.avalon_jtag_slave' start='0x4
5
0' end='0x4
5
8' /><slave name='pio_pps.mem' start='0x4
5
8' end='0x4
6
0' /><slave name='rom_system_info.mem' start='0x1000' end='0x2000' /><slave name='avs_eth_0.mms_tse' start='0x2000' end='0x3000' /><slave name='reg_wdi.mem' start='0x3000' end='0x3008' /><slave name='cpu_0.jtag_debug_module' start='0x3800' end='0x4000' /><slave name='avs_eth_0.mms_ram' start='0x4000' end='0x5000' /><slave name='ram_ss_ss_wide.mem' start='0x8000' end='0x10000' /><slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' /><slave name='ram_diag_data_buffer_im.mem' start='0x40000' end='0x60000' /><slave name='ram_diag_data_buffer_re.mem' start='0x60000' end='0x80000' /><slave name='ram_diag_bg.mem' start='0x80000' end='0xA0000' /></address-map>]]>
</parameter>
<parameter
name=
"dataSlaveMapParam"
>
<![CDATA[<address-map><slave name='pio_system_info.mem' start='0x0' end='0x80' /><slave name='reg_diag_data_buffer_im.mem' start='0x80' end='0x100' /><slave name='reg_diag_data_buffer_re.mem' start='0x100' end='0x180' /><slave name='avs_eth_0.mms_reg' start='0x180' end='0x1C0' /><slave name='timer_0.s1' start='0x1C0' end='0x1E0' /><slave name='reg_unb_sens.mem' start='0x1E0' end='0x200' /><slave name='reg_bsn_monitor.mem' start='0x200' end='0x400' /><slave name='reg_diag_bg.mem' start='0x400' end='0x420' /><slave name='altpll_0.pll_slave' start='0x420' end='0x430' /><slave name='pio_debug_wave.s1' start='0x430' end='0x440' /><slave name='pio_wdi.s1' start='0x440' end='0x450' /><slave
name='reg_io_ddr.mem' start='0x450' end='0x460' /><slave
name='jtag_uart_0.avalon_jtag_slave' start='0x4
6
0' end='0x4
6
8' /><slave name='pio_pps.mem' start='0x4
6
8' end='0x4
7
0' /><slave name='rom_system_info.mem' start='0x1000' end='0x2000' /><slave name='avs_eth_0.mms_tse' start='0x2000' end='0x3000' /><slave name='reg_wdi.mem' start='0x3000' end='0x3008' /><slave name='cpu_0.jtag_debug_module' start='0x3800' end='0x4000' /><slave name='avs_eth_0.mms_ram' start='0x4000' end='0x5000' /><slave name='ram_ss_ss_wide.mem' start='0x8000' end='0x10000' /><slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' /><slave name='ram_diag_data_buffer_im.mem' start='0x40000' end='0x60000' /><slave name='ram_diag_data_buffer_re.mem' start='0x60000' end='0x80000' /><slave name='ram_diag_bg.mem' start='0x80000' end='0xA0000' /></address-map>]]>
</parameter>
<parameter
name=
"dataAddrWidth"
value=
"20"
/>
<parameter
name=
"customInstSlavesSystemInfo"
value=
"<info/>"
/>
<parameter
name=
"cpuReset"
value=
"false"
/>
...
...
@@ -889,6 +905,11 @@ q]]></parameter>
<module
kind=
"avs2_eth_coe"
version=
"1.0"
enabled=
"1"
name=
"avs_eth_0"
>
<parameter
name=
"AUTO_MM_CLOCK_RATE"
value=
"50000000"
/>
</module>
<module
kind=
"avs_common_mm"
version=
"1.0"
enabled=
"1"
name=
"reg_io_ddr"
>
<parameter
name=
"g_adr_w"
value=
"2"
/>
<parameter
name=
"g_dat_w"
value=
"32"
/>
<parameter
name=
"AUTO_SYSTEM_CLOCK_RATE"
value=
"50000000"
/>
</module>
<connection
kind=
"avalon"
version=
"11.1"
...
...
@@ -927,7 +948,7 @@ q]]></parameter>
start=
"cpu_0.data_master"
end=
"jtag_uart_0.avalon_jtag_slave"
>
<parameter
name=
"arbitrationPriority"
value=
"1"
/>
<parameter
name=
"baseAddress"
value=
"0x04
5
0"
/>
<parameter
name=
"baseAddress"
value=
"0x04
6
0"
/>
</connection>
<connection
kind=
"interrupt"
...
...
@@ -1036,7 +1057,7 @@ q]]></parameter>
start=
"cpu_0.data_master"
end=
"pio_pps.mem"
>
<parameter
name=
"arbitrationPriority"
value=
"1"
/>
<parameter
name=
"baseAddress"
value=
"0x04
5
8"
/>
<parameter
name=
"baseAddress"
value=
"0x04
6
8"
/>
</connection>
<connection
kind=
"clock"
version=
"11.1"
start=
"altpll_0.c0"
end=
"reg_wdi.system"
/>
<connection
...
...
@@ -1183,4 +1204,17 @@ q]]></parameter>
end=
"avs_eth_0.interrupt"
>
<parameter
name=
"irqNumber"
value=
"2"
/>
</connection>
<connection
kind=
"clock"
version=
"11.1"
start=
"altpll_0.c0"
end=
"reg_io_ddr.system"
/>
<connection
kind=
"avalon"
version=
"11.1"
start=
"cpu_0.data_master"
end=
"reg_io_ddr.mem"
>
<parameter
name=
"arbitrationPriority"
value=
"1"
/>
<parameter
name=
"baseAddress"
value=
"0x0450"
/>
</connection>
</system>
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