Clarify en_sync with BG enable.

libraries/base/diag/src/vhdl/diag_block_gen.vhd

@@ -158,7 +158,7 @@ begin
         -- apply ctrl.enable immediately
         v.blk_en := ctrl.enable;
       else
-        -- keep blk_en and apply ctrl.enable at input sync pulse
+        -- keep blk_en and apply ctrl.enable (on or off) at input sync pulse
         if en_sync='1' then
           v.blk_en := ctrl.enable;
         end if;