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RTSD
HDL
Commits
ed8d42b8
Commit
ed8d42b8
authored
9 years ago
by
Zanting
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Updated documentation
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Simulation
----------
-> Read ../../doc/README first until step 3
Modelsim instructions:
# in Modelsim do:
lp unb1_test_ddr_MB_I_II
mk all
# now double click on testbench file
as 10
run 500us
# while the simulation runs... in another terminal/bash session do:
cd unb1_test/tb/python
# To test the ddr3 modules; do:
python tc_unb1_test_ddr.py --sim --unb 0 --fn 0 -v 5 -s I,II --rep 1 -n 1000
# to end simulation in Modelsim do:
quit -sim
Testing on hardware
-------------------
-> Read ../../doc/README first until step 5
# (assume that the Uniboard is --unb 1)
# To read out the design_name, ppsh and sensors; do:
python tc_unb1_test.py --unb 1 --fn 0:3 --seq REGMAP,INFO,PPSH,SENSORS -v5
# To test the ddr3 modules:
python tc_unb1_test_ddr.py --unb 1 --fn 0:3 -v 5 -s I,II --rep 1 -n 10000000
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