-Added multi-instance support to MMS wrapper.

libraries/dsp/st/src/vhdl/mms_st_histogram.vhd

@@ -18,37 +18,10 @@
 --
 -------------------------------------------------------------------------------
 
--------------------------------------------------------------------------------
--- 
--- Author: J.W.E. Oudman
--- Purpose: Create a histogram from the input data and present it to the MM bus
--- Description: 
---   mms_st_histogram couples the st_histogram component which works entirely
---   in the dp clock domain through st_histogram_reg that handles the cross
---   domain conversion to the MM bus.
---   
---
---             --------------------------------------
---             | mms_st_histogram                   |
---             |                                    |
---             |   ----------------                 |         -------
---   snk_in -->|-->| st_histogram |                 |             ^
---             |   ----------------                 |             |
---             |      |      ^                      |
---             |      |      |                      |           dp clock domain
---             |    ram_st_histogram_miso           |
---             |      |      |                      |          
---             |      |    ram_st_histogram_mosi    |             |
---             |      v      |                      |             v
---             | --------------------               |         -------
---             | | st_histogram_reg |-- ram_miso -->|-->        mm clock domain
---             | |                  |<-- ram_mosi --|<--
---             | --------------------               |         -------
---             |                                    |
---             --------------------------------------
---
---
--------------------------------------------------------------------------------
+-- Author: 
+-- . Daniel van der Schuur 
+-- Purpose:
+-- . MM-wrapper that adds registers and multi-instance support to st_histogram.
 
 LIBRARY IEEE, common_lib, mm_lib, technology_lib, dp_lib;
 USE IEEE.std_logic_1164.ALL;
@@ -59,6 +32,7 @@ USE technology_lib.technology_select_pkg.ALL;
 
 ENTITY mms_st_histogram IS
   GENERIC (
+    g_nof_instances     : NATURAL;
     g_data_w            : NATURAL;
     g_nof_bins          : NATURAL;
     g_nof_data_per_sync : NATURAL        
@@ -67,7 +41,7 @@ ENTITY mms_st_histogram IS
     dp_clk     : IN  STD_LOGIC;
     dp_rst     : IN  STD_LOGIC;
 
-    snk_in   : IN  t_dp_sosi;
+    snk_in_arr : IN  t_dp_sosi_arr(g_nof_instances-1 DOWNTO 0);
 
     mm_clk     : IN  STD_LOGIC;
     mm_rst     : IN  STD_LOGIC;               
@@ -82,11 +56,21 @@ END mms_st_histogram;
 
 ARCHITECTURE str OF mms_st_histogram IS
 
-  SIGNAL ram_clear    : STD_LOGIC;
-  SIGNAL ram_clearing : STD_LOGIC;
+  SIGNAL reg_mosi_arr : t_mem_mosi_arr(g_nof_instances-1 DOWNTO 0);
+  SIGNAL reg_miso_arr : t_mem_miso_arr(g_nof_instances-1 DOWNTO 0);
+
+  SIGNAL ram_mosi_arr : t_mem_mosi_arr(g_nof_instances-1 DOWNTO 0);
+  SIGNAL ram_miso_arr : t_mem_miso_arr(g_nof_instances-1 DOWNTO 0);
+
+  SIGNAL ram_clear_arr    : STD_LOGIC_VECTOR(g_nof_instances-1 DOWNTO 0);
+  SIGNAL ram_clearing_arr : STD_LOGIC_VECTOR(g_nof_instances-1 DOWNTO 0);
    
 BEGIN 
 
+  -------------------------------------------------------------------------------
+  -- st_histogram instances and their registers
+  -------------------------------------------------------------------------------
+  gen_st_histogram : FOR i IN 0 TO g_nof_instances-1 GENERATE
     u_st_histogram : ENTITY work.st_histogram
     GENERIC MAP(
       g_data_w            => g_data_w,
@@ -97,13 +81,13 @@ BEGIN
       dp_clk       => dp_clk,
       dp_rst       => dp_rst,
       
-    snk_in       => snk_in,
+      snk_in       => snk_in_arr(i),
   
-    ram_clear    => ram_clear,
-    ram_clearing => ram_clearing,
+      ram_clear    => ram_clear_arr(i),
+      ram_clearing => ram_clearing_arr(i),
   
-    ram_mosi     => ram_mosi,
-    ram_miso     => ram_miso
+      ram_mosi     => ram_mosi_arr(i),
+      ram_miso     => ram_miso_arr(i)
     );
 
     u_st_histogram_reg : ENTITY work.st_histogram_reg
@@ -111,15 +95,27 @@ BEGIN
       dp_clk       => dp_clk,
       dp_rst       => dp_rst,
   
-    ram_clearing => ram_clearing,
+      ram_clearing => ram_clearing_arr(i),
   
       mm_clk       => mm_clk,
       mm_rst       => mm_rst,
   
-    ram_clear    => ram_clear,
+      ram_clear    => ram_clear_arr(i),
       
       reg_mosi     => reg_mosi,
       reg_miso     => reg_miso
     );
+  END GENERATE;
+
+
+  -------------------------------------------------------------------------------
+  -- reg_mosi/miso multiplexer from g_nof_instances to 1
+  -------------------------------------------------------------------------------
+
+
+  -------------------------------------------------------------------------------
+  -- ram_mosi/miso multiplexer from g_nof_instances to 1
+  -------------------------------------------------------------------------------
+
   
 END str;