Moves modelsim_search_libraries to hdltool_unb1.cfg.

applications/apertif/designs/apertif_unb1_fn_beamformer/hdllib.cfg

@@ -3,10 +3,6 @@ hdl_library_clause_name = apertif_unb1_fn_beamformer_lib
 hdl_lib_uses_synth = common technology tech_mac_10g tr_10GbE mm i2c unb1_board bf apertif tech_ddr io_ddr
 hdl_lib_technology = ip_stratixiv
 
-modelsim_search_libraries =
-    altera_ver lpm_ver sgate_ver altera_mf_ver altera_lnsim_ver stratixiv_ver stratixiv_hssi_ver stratixiv_pcie_hip_ver
-    altera     lpm     sgate     altera_mf     altera_lnsim     stratixiv     stratixiv_hssi     stratixiv_pcie_hip
-
 synth_files =   
     $HDL_BUILD_DIR/quartus/apertif_unb1_fn_beamformer/sopc_apertif_unb1_fn_beamformer.vhd
     src/vhdl/apertif_unb1_fn_beamformer_udp_offload.vhd

applications/unb1_reorder/hdllib.cfg

@@ -43,14 +43,3 @@ quartus_qip_files =
 modelsim_compile_ip_files =
     $RADIOHDL/libraries/technology/ip_stratixiv/ddr3_uphy_4g_800_master/copy_hex_files.tcl
     
-modelsim_search_libraries =
-# stratixiv only
-    altera_ver lpm_ver sgate_ver altera_mf_ver altera_lnsim_ver stratixiv_ver stratixiv_hssi_ver stratixiv_pcie_hip_ver
-    altera     lpm     sgate     altera_mf     altera_lnsim     stratixiv     stratixiv_hssi     stratixiv_pcie_hip
-# arria10 only
-#    altera_ver lpm_ver sgate_ver altera_mf_ver altera_lnsim_ver twentynm_ver twentynm_hssi_ver twentynm_hip_ver
-#    altera     lpm     sgate     altera_mf     altera_lnsim     twentynm     twentynm_hssi     twentynm_hip
-# both (will yield errors if the technology library is not available in simulator but these errors can be ignored)
-#    altera_ver lpm_ver sgate_ver altera_mf_ver altera_lnsim_ver stratixiv_ver stratixiv_hssi_ver stratixiv_pcie_hip_ver twentynm_ver twentynm_hssi_ver twentynm_hip_ver
-#    altera     lpm     sgate     altera_mf     altera_lnsim     stratixiv     stratixiv_hssi     stratixiv_pcie_hip     twentynm     twentynm_hssi     twentynm_hip
-