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RTSD
HDL
Commits
e7f240d1
Commit
e7f240d1
authored
9 years ago
by
Pepping
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Added entry for 2nd bsn_monitor
parent
3600fad2
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applications/apertif/designs/apertif_unb1_fn_beamformer/quartus/sopc_apertif_unb1_fn_beamformer.sopc
+146
-108
146 additions, 108 deletions
...n_beamformer/quartus/sopc_apertif_unb1_fn_beamformer.sopc
with
146 additions
and
108 deletions
applications/apertif/designs/apertif_unb1_fn_beamformer/quartus/sopc_apertif_unb1_fn_beamformer.sopc
+
146
−
108
View file @
e7f240d1
...
...
@@ -14,7 +14,7 @@
{
datum baseAddress
{
value = "1
568
";
value = "1
696
";
type = "long";
}
}
...
...
@@ -92,51 +92,80 @@
type = "String";
}
}
element r
am_ss_ss_wide
.mem
element r
eg_mdio_2
.mem
{
datum baseAddress
{
value = "
524288
";
value = "
1600
";
type = "long";
}
}
element r
eg_mdio_2
.mem
element r
om_system_info
.mem
{
datum _lockedAddress
{
value = "1";
type = "boolean";
}
datum baseAddress
{
value = "
1472
";
value = "
4096
";
type = "long";
}
}
element r
am_st_sst
.mem
element r
eg_bsn_monitor
.mem
{
datum baseAddress
{
value = "1
6384
";
value = "1
088
";
type = "long";
}
}
element reg_
tr_10GbE
.mem
element reg_
diag_data_buffer
.mem
{
datum baseAddress
{
value = "
786432
";
value = "
128
";
type = "long";
}
}
element reg_
unb_sens
.mem
element reg_
dp_pkt_merge
.mem
{
datum baseAddress
{
value = "1
248
";
value = "1
504
";
type = "long";
}
}
element reg_dp_offload_tx
_hdr_dat
.mem
element reg_dp_offload_tx.mem
{
datum baseAddress
{
value = "768";
value = "1704";
type = "long";
}
}
element reg_st_sst.mem
{
datum baseAddress
{
value = "1152";
type = "long";
}
}
element ram_ss_ss_transp.mem
{
datum baseAddress
{
value = "819200";
type = "long";
}
}
element reg_dp_split.mem
{
datum baseAddress
{
value = "1472";
type = "long";
}
}
...
...
@@ -148,19 +177,19 @@
type = "long";
}
}
element r
eg_dp_pkt_merg
e.mem
element r
am_ss_ss_wid
e.mem
{
datum baseAddress
{
value = "
1376
";
value = "
524288
";
type = "long";
}
}
element reg_
diag_data_buffer
.mem
element reg_
tr_10GbE
.mem
{
datum baseAddress
{
value = "
128
";
value = "
786432
";
type = "long";
}
}
...
...
@@ -177,71 +206,71 @@
type = "long";
}
}
element r
eg_diag_bg
.mem
element r
am_dp_ram_from_mm
.mem
{
datum baseAddress
{
value = "12
80
";
value = "
5
12";
type = "long";
}
}
element reg_d
p_ram_from_mm
.mem
element reg_d
iag_bg
.mem
{
datum baseAddress
{
value = "1
312
";
value = "1
408
";
type = "long";
}
}
element r
eg_bsn_monitor
.mem
element r
am_diag_bg
.mem
{
datum baseAddress
{
value = "
960
";
value = "
32768
";
type = "long";
}
}
element reg_
diagnostics_mesh
.mem
element reg_
tr_xaui
.mem
{
datum baseAddress
{
value = "
256
";
value = "
851968
";
type = "long";
}
}
element reg_tr_
xaui
.mem
element reg_tr_
nonbonded_mesh
.mem
{
datum baseAddress
{
value = "
851968
";
value = "
1024
";
type = "long";
}
}
element reg_
st_sst
.mem
element reg_
dp_ram_from_mm
.mem
{
datum baseAddress
{
value = "1
024
";
value = "1
440
";
type = "long";
}
}
element r
am_dp_ram_from_mm
.mem
element r
eg_diagnostics_mesh
.mem
{
datum baseAddress
{
value = "
512
";
value = "
256
";
type = "long";
}
}
element r
am_ss_ss_transp
.mem
element r
eg_bsn_monitor_output
.mem
{
datum baseAddress
{
value = "8
19200
";
value = "8
96
";
type = "long";
}
}
element
rom
_system_info.mem
element
pio
_system_info.mem
{
datum _lockedAddress
{
...
...
@@ -250,7 +279,7 @@
}
datum baseAddress
{
value = "
4096
";
value = "
0
";
type = "long";
}
}
...
...
@@ -258,76 +287,55 @@
{
datum baseAddress
{
value = "1152";
type = "long";
}
}
element reg_dp_split.mem
{
datum baseAddress
{
value = "1344";
type = "long";
}
}
element reg_mdio_0.mem
{
datum baseAddress
{
value = "1408";
value = "1280";
type = "long";
}
}
element r
eg_mdio_1
.mem
element r
am_bf_weights
.mem
{
datum baseAddress
{
value = "144
0
";
value = "
262
144";
type = "long";
}
}
element reg_dp_offload_tx.mem
element reg_dp_offload_tx
_hdr_dat
.mem
{
datum baseAddress
{
value = "
15
76";
value = "76
8
";
type = "long";
}
}
element r
am_diag_bg
.mem
element r
eg_mdio_0
.mem
{
datum baseAddress
{
value = "
32768
";
value = "
1536
";
type = "long";
}
}
element
pio_system_info
.mem
element
reg_unb_sens
.mem
{
datum _lockedAddress
{
value = "1";
type = "boolean";
}
datum baseAddress
{
value = "
0
";
value = "
1376
";
type = "long";
}
}
element reg_
tr_nonbonded_mesh
.mem
element reg_
mdio_1
.mem
{
datum baseAddress
{
value = "
896
";
value = "
1568
";
type = "long";
}
}
element ram_
bf_weights
.mem
element ram_
st_sst
.mem
{
datum baseAddress
{
value = "
26214
4";
value = "
1638
4";
type = "long";
}
}
...
...
@@ -343,7 +351,7 @@
{
datum baseAddress
{
value = "1
088
";
value = "1
216
";
type = "long";
}
}
...
...
@@ -419,7 +427,7 @@
}
datum baseAddress
{
value = "1
504
";
value = "1
632
";
type = "long";
}
}
...
...
@@ -487,6 +495,14 @@
type = "int";
}
}
element reg_bsn_monitor_output
{
datum _sortIndex
{
value = "38";
type = "int";
}
}
element reg_diag_bg
{
datum _sortIndex
...
...
@@ -639,11 +655,16 @@
type = "int";
}
}
element
timer_0
.s1
element
pio_wdi
.s1
{
datum _lockedAddress
{
value = "0";
type = "boolean";
}
datum baseAddress
{
value = "1
216
";
value = "1
664
";
type = "long";
}
}
...
...
@@ -660,32 +681,27 @@
type = "long";
}
}
element
pio_wdi
.s1
element
timer_0
.s1
{
datum _lockedAddress
{
value = "0";
type = "boolean";
}
datum baseAddress
{
value = "1
536
";
value = "1
344
";
type = "long";
}
}
element pio_
debug_wave
.s1
element pio_
pps
.s1
{
datum baseAddress
{
value = "1
52
0";
value = "1
68
0";
type = "long";
}
}
element pio_
pps
.s1
element pio_
debug_wave
.s1
{
datum baseAddress
{
value = "1
552
";
value = "1
648
";
type = "long";
}
}
...
...
@@ -717,10 +733,10 @@
<parameter
name=
"globalResetBus"
value=
"true"
/>
<parameter
name=
"hdlLanguage"
value=
"VHDL"
/>
<parameter
name=
"maxAdditionalLatency"
value=
"0"
/>
<parameter
name=
"projectName"
>
apertif_unb1_fn_beamformer_t
rans
.qpf
</parameter>
<parameter
name=
"projectName"
>
apertif_unb1_fn_beamformer_t
p_bg
.qpf
</parameter>
<parameter
name=
"sopcBorderPoints"
value=
"true"
/>
<parameter
name=
"systemHash"
value=
"-768
65851009
"
/>
<parameter
name=
"timeStamp"
value=
"14
29538234399
"
/>
<parameter
name=
"systemHash"
value=
"-768
21780215
"
/>
<parameter
name=
"timeStamp"
value=
"14
30725932488
"
/>
<parameter
name=
"useTestBenchNamingPattern"
value=
"false"
/>
<module
kind=
"clock_source"
version=
"11.1"
enabled=
"1"
name=
"clk_0"
>
<parameter
name=
"clockFrequency"
value=
"25000000"
/>
...
...
@@ -821,7 +837,7 @@
<parameter
name=
"dcache_numTCDM"
value=
"_0"
/>
<parameter
name=
"dcache_lineSize"
value=
"_32"
/>
<parameter
name=
"dcache_bursts"
value=
"false"
/>
<parameter
name=
"dataSlaveMapParam"
>
<![CDATA[<address-map><slave name='pio_system_info.mem' start='0x0' end='0x80' /><slave name='reg_diag_data_buffer.mem' start='0x80' end='0x100' /><slave name='reg_diagnostics_mesh.mem' start='0x100' end='0x200' /><slave name='ram_dp_ram_from_mm.mem' start='0x200' end='0x300' /><slave name='reg_dp_offload_tx_hdr_dat.mem' start='0x300' end='0x380' /><slave name='reg_tr_nonbonded_mesh.mem' start='0x
38
0' end='0x
3C
0' /><slave name='reg_bsn_monitor.mem' start='0x
3C
0' end='0x4
0
0' /><slave name='reg_st_sst.mem' start='0x4
0
0' end='0x4
4
0' /><slave name='avs_eth_0.mms_reg' start='0x4
4
0' end='0x
48
0' /><slave name='reg_io_ddr.mem' start='0x
48
0' end='0x4
C
0' /><slave name='timer_0.s1' start='0x4
C
0' end='0x
4E
0' /><slave name='reg_unb_sens.mem' start='0x
4E
0' end='0x5
0
0' /><slave name='reg_diag_bg.mem' start='0x5
0
0' end='0x5
2
0' /><slave name='reg_dp_ram_from_mm.mem' start='0x5
2
0' end='0x5
4
0' /><slave name='reg_dp_split.mem' start='0x5
4
0' end='0x5
6
0' /><slave name='reg_dp_pkt_merge.mem' start='0x5
6
0' end='0x
58
0' /><slave name='reg_mdio_0.mem' start='0x
58
0' end='0x
5A
0' /><slave name='reg_mdio_1.mem' start='0x
5A
0' end='0x
5C
0' /><slave name='reg_mdio_2.mem' start='0x
5C
0' end='0x
5E
0' /><slave name='altpll_0.pll_slave' start='0x
5E
0' end='0x
5F
0' /><slave name='pio_debug_wave.s1' start='0x
5F
0' end='0x6
0
0' /><slave name='pio_wdi.s1' start='0x6
0
0' end='0x6
1
0' /><slave name='pio_pps.s1' start='0x6
1
0' end='0x6
2
0' /><slave name='jtag_uart_0.avalon_jtag_slave' start='0x6
2
0' end='0x6
2
8' /><slave name='reg_dp_offload_tx.mem' start='0x6
2
8' end='0x6
3
0' /><slave name='rom_system_info.mem' start='0x1000' end='0x2000' /><slave name='avs_eth_0.mms_tse' start='0x2000' end='0x3000' /><slave name='reg_wdi.mem' start='0x3000' end='0x3008' /><slave name='cpu_0.jtag_debug_module' start='0x3800' end='0x4000' /><slave name='ram_st_sst.mem' start='0x4000' end='0x8000' /><slave name='ram_diag_bg.mem' start='0x8000' end='0x10000' /><slave name='ram_diag_data_buffer.mem' start='0x10000' end='0x20000' /><slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' /><slave name='ram_bf_weights.mem' start='0x40000' end='0x80000' /><slave name='ram_ss_ss_wide.mem' start='0x80000' end='0xC0000' /><slave name='reg_tr_10GbE.mem' start='0xC0000' end='0xC8000' /><slave name='ram_ss_ss_transp.mem' start='0xC8000' end='0xD0000' /><slave name='reg_tr_xaui.mem' start='0xD0000' end='0xD2000' /><slave name='avs_eth_0.mms_ram' start='0xD2000' end='0xD3000' /></address-map>]]>
</parameter>
<parameter
name=
"dataSlaveMapParam"
>
<![CDATA[<address-map><slave name='pio_system_info.mem' start='0x0' end='0x80' /><slave name='reg_diag_data_buffer.mem' start='0x80' end='0x100' /><slave name='reg_diagnostics_mesh.mem' start='0x100' end='0x200' /><slave name='ram_dp_ram_from_mm.mem' start='0x200' end='0x300' /><slave name='reg_dp_offload_tx_hdr_dat.mem' start='0x300' end='0x380' /><slave
name='reg_bsn_monitor_output.mem' start='0x380' end='0x400' /><slave
name='reg_tr_nonbonded_mesh.mem' start='0x
40
0' end='0x
44
0' /><slave name='reg_bsn_monitor.mem' start='0x
44
0' end='0x4
8
0' /><slave name='reg_st_sst.mem' start='0x4
8
0' end='0x4
C
0' /><slave name='avs_eth_0.mms_reg' start='0x4
C
0' end='0x
50
0' /><slave name='reg_io_ddr.mem' start='0x
50
0' end='0x
5
40' /><slave name='timer_0.s1' start='0x
5
40' end='0x
56
0' /><slave name='reg_unb_sens.mem' start='0x
56
0' end='0x5
8
0' /><slave name='reg_diag_bg.mem' start='0x5
8
0' end='0x5
A
0' /><slave name='reg_dp_ram_from_mm.mem' start='0x5
A
0' end='0x5
C
0' /><slave name='reg_dp_split.mem' start='0x5
C
0' end='0x5
E
0' /><slave name='reg_dp_pkt_merge.mem' start='0x5
E
0' end='0x
60
0' /><slave name='reg_mdio_0.mem' start='0x
60
0' end='0x
62
0' /><slave name='reg_mdio_1.mem' start='0x
62
0' end='0x
64
0' /><slave name='reg_mdio_2.mem' start='0x
64
0' end='0x
66
0' /><slave name='altpll_0.pll_slave' start='0x
66
0' end='0x
67
0' /><slave name='pio_debug_wave.s1' start='0x
67
0' end='0x6
8
0' /><slave name='pio_wdi.s1' start='0x6
8
0' end='0x6
9
0' /><slave name='pio_pps.s1' start='0x6
9
0' end='0x6
A
0' /><slave name='jtag_uart_0.avalon_jtag_slave' start='0x6
A
0' end='0x6
A
8' /><slave name='reg_dp_offload_tx.mem' start='0x6
A
8' end='0x6
B
0' /><slave name='rom_system_info.mem' start='0x1000' end='0x2000' /><slave name='avs_eth_0.mms_tse' start='0x2000' end='0x3000' /><slave name='reg_wdi.mem' start='0x3000' end='0x3008' /><slave name='cpu_0.jtag_debug_module' start='0x3800' end='0x4000' /><slave name='ram_st_sst.mem' start='0x4000' end='0x8000' /><slave name='ram_diag_bg.mem' start='0x8000' end='0x10000' /><slave name='ram_diag_data_buffer.mem' start='0x10000' end='0x20000' /><slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' /><slave name='ram_bf_weights.mem' start='0x40000' end='0x80000' /><slave name='ram_ss_ss_wide.mem' start='0x80000' end='0xC0000' /><slave name='reg_tr_10GbE.mem' start='0xC0000' end='0xC8000' /><slave name='ram_ss_ss_transp.mem' start='0xC8000' end='0xD0000' /><slave name='reg_tr_xaui.mem' start='0xD0000' end='0xD2000' /><slave name='avs_eth_0.mms_ram' start='0xD2000' end='0xD3000' /></address-map>]]>
</parameter>
<parameter
name=
"dataAddrWidth"
value=
"20"
/>
<parameter
name=
"customInstSlavesSystemInfo"
value=
"<info/>"
/>
<parameter
name=
"cpuReset"
value=
"false"
/>
...
...
@@ -1289,6 +1305,15 @@ q]]></parameter>
<parameter
name=
"g_dat_w"
value=
"32"
/>
<parameter
name=
"AUTO_SYSTEM_CLOCK_RATE"
value=
"50000000"
/>
</module>
<module
kind=
"avs_common_mm"
version=
"1.0"
enabled=
"1"
name=
"reg_bsn_monitor_output"
>
<parameter
name=
"g_adr_w"
value=
"5"
/>
<parameter
name=
"g_dat_w"
value=
"32"
/>
<parameter
name=
"AUTO_SYSTEM_CLOCK_RATE"
value=
"50000000"
/>
</module>
<connection
kind=
"avalon"
version=
"11.1"
...
...
@@ -1327,7 +1352,7 @@ q]]></parameter>
start=
"cpu_0.data_master"
end=
"jtag_uart_0.avalon_jtag_slave"
>
<parameter
name=
"arbitrationPriority"
value=
"1"
/>
<parameter
name=
"baseAddress"
value=
"0x06
2
0"
/>
<parameter
name=
"baseAddress"
value=
"0x06
a
0"
/>
</connection>
<connection
kind=
"interrupt"
...
...
@@ -1342,7 +1367,7 @@ q]]></parameter>
start=
"cpu_0.data_master"
end=
"altpll_0.pll_slave"
>
<parameter
name=
"arbitrationPriority"
value=
"1"
/>
<parameter
name=
"baseAddress"
value=
"0x0
5e
0"
/>
<parameter
name=
"baseAddress"
value=
"0x0
66
0"
/>
</connection>
<connection
kind=
"clock"
version=
"11.1"
start=
"altpll_0.c0"
end=
"cpu_0.clk"
/>
<connection
kind=
"clock"
version=
"11.1"
start=
"altpll_0.c0"
end=
"jtag_uart_0.clk"
/>
...
...
@@ -1362,7 +1387,7 @@ q]]></parameter>
start=
"cpu_0.data_master"
end=
"pio_debug_wave.s1"
>
<parameter
name=
"arbitrationPriority"
value=
"1"
/>
<parameter
name=
"baseAddress"
value=
"0x0
5f
0"
/>
<parameter
name=
"baseAddress"
value=
"0x0
67
0"
/>
</connection>
<connection
kind=
"clock"
version=
"11.1"
start=
"altpll_0.c0"
end=
"timer_0.clk"
/>
<connection
...
...
@@ -1371,7 +1396,7 @@ q]]></parameter>
start=
"cpu_0.data_master"
end=
"timer_0.s1"
>
<parameter
name=
"arbitrationPriority"
value=
"1"
/>
<parameter
name=
"baseAddress"
value=
"0x04
c
0"
/>
<parameter
name=
"baseAddress"
value=
"0x0
5
40"
/>
</connection>
<connection
kind=
"interrupt"
version=
"11.1"
start=
"cpu_0.d_irq"
end=
"timer_0.irq"
>
<parameter
name=
"irqNumber"
value=
"1"
/>
...
...
@@ -1383,7 +1408,7 @@ q]]></parameter>
start=
"cpu_0.data_master"
end=
"pio_wdi.s1"
>
<parameter
name=
"arbitrationPriority"
value=
"1"
/>
<parameter
name=
"baseAddress"
value=
"0x06
0
0"
/>
<parameter
name=
"baseAddress"
value=
"0x06
8
0"
/>
</connection>
<connection
kind=
"clock"
...
...
@@ -1397,7 +1422,7 @@ q]]></parameter>
start=
"cpu_0.data_master"
end=
"pio_pps.s1"
>
<parameter
name=
"arbitrationPriority"
value=
"1"
/>
<parameter
name=
"baseAddress"
value=
"0x06
1
0"
/>
<parameter
name=
"baseAddress"
value=
"0x06
9
0"
/>
</connection>
<connection
kind=
"clock"
...
...
@@ -1410,7 +1435,7 @@ q]]></parameter>
start=
"cpu_0.data_master"
end=
"reg_unb_sens.mem"
>
<parameter
name=
"arbitrationPriority"
value=
"1"
/>
<parameter
name=
"baseAddress"
value=
"0x0
4e
0"
/>
<parameter
name=
"baseAddress"
value=
"0x0
56
0"
/>
</connection>
<connection
kind=
"clock"
...
...
@@ -1423,7 +1448,7 @@ q]]></parameter>
start=
"cpu_0.data_master"
end=
"reg_tr_nonbonded_mesh.mem"
>
<parameter
name=
"arbitrationPriority"
value=
"1"
/>
<parameter
name=
"baseAddress"
value=
"0x0
38
0"
/>
<parameter
name=
"baseAddress"
value=
"0x0
40
0"
/>
</connection>
<connection
kind=
"clock"
...
...
@@ -1488,7 +1513,7 @@ q]]></parameter>
start=
"cpu_0.data_master"
end=
"reg_bsn_monitor.mem"
>
<parameter
name=
"arbitrationPriority"
value=
"1"
/>
<parameter
name=
"baseAddress"
value=
"0x0
3c
0"
/>
<parameter
name=
"baseAddress"
value=
"0x0
44
0"
/>
</connection>
<connection
kind=
"clock"
version=
"11.1"
start=
"altpll_0.c0"
end=
"reg_wdi.system"
/>
<connection
...
...
@@ -1562,7 +1587,7 @@ q]]></parameter>
start=
"cpu_0.data_master"
end=
"reg_diag_bg.mem"
>
<parameter
name=
"arbitrationPriority"
value=
"1"
/>
<parameter
name=
"baseAddress"
value=
"0x05
0
0"
/>
<parameter
name=
"baseAddress"
value=
"0x05
8
0"
/>
</connection>
<connection
kind=
"clock"
...
...
@@ -1575,7 +1600,7 @@ q]]></parameter>
start=
"cpu_0.data_master"
end=
"reg_dp_ram_from_mm.mem"
>
<parameter
name=
"arbitrationPriority"
value=
"1"
/>
<parameter
name=
"baseAddress"
value=
"0x05
2
0"
/>
<parameter
name=
"baseAddress"
value=
"0x05
a
0"
/>
</connection>
<connection
kind=
"clock"
...
...
@@ -1614,7 +1639,7 @@ q]]></parameter>
start=
"cpu_0.data_master"
end=
"reg_dp_split.mem"
>
<parameter
name=
"arbitrationPriority"
value=
"1"
/>
<parameter
name=
"baseAddress"
value=
"0x05
4
0"
/>
<parameter
name=
"baseAddress"
value=
"0x05
c
0"
/>
</connection>
<connection
kind=
"clock"
...
...
@@ -1627,7 +1652,7 @@ q]]></parameter>
start=
"cpu_0.data_master"
end=
"reg_st_sst.mem"
>
<parameter
name=
"arbitrationPriority"
value=
"1"
/>
<parameter
name=
"baseAddress"
value=
"0x04
0
0"
/>
<parameter
name=
"baseAddress"
value=
"0x04
8
0"
/>
</connection>
<connection
kind=
"clock"
...
...
@@ -1640,7 +1665,7 @@ q]]></parameter>
start=
"cpu_0.data_master"
end=
"reg_dp_pkt_merge.mem"
>
<parameter
name=
"arbitrationPriority"
value=
"1"
/>
<parameter
name=
"baseAddress"
value=
"0x05
6
0"
/>
<parameter
name=
"baseAddress"
value=
"0x05
e
0"
/>
</connection>
<connection
kind=
"clock"
...
...
@@ -1666,7 +1691,7 @@ q]]></parameter>
start=
"cpu_0.data_master"
end=
"reg_dp_offload_tx.mem"
>
<parameter
name=
"arbitrationPriority"
value=
"1"
/>
<parameter
name=
"baseAddress"
value=
"0x06
2
8"
/>
<parameter
name=
"baseAddress"
value=
"0x06
a
8"
/>
</connection>
<connection
kind=
"clock"
...
...
@@ -1705,7 +1730,7 @@ q]]></parameter>
start=
"cpu_0.data_master"
end=
"reg_mdio_0.mem"
>
<parameter
name=
"arbitrationPriority"
value=
"1"
/>
<parameter
name=
"baseAddress"
value=
"0x0
58
0"
/>
<parameter
name=
"baseAddress"
value=
"0x0
60
0"
/>
</connection>
<connection
kind=
"clock"
...
...
@@ -1718,7 +1743,7 @@ q]]></parameter>
start=
"cpu_0.data_master"
end=
"reg_mdio_1.mem"
>
<parameter
name=
"arbitrationPriority"
value=
"1"
/>
<parameter
name=
"baseAddress"
value=
"0x0
5a
0"
/>
<parameter
name=
"baseAddress"
value=
"0x0
62
0"
/>
</connection>
<connection
kind=
"clock"
...
...
@@ -1731,7 +1756,7 @@ q]]></parameter>
start=
"cpu_0.data_master"
end=
"reg_mdio_2.mem"
>
<parameter
name=
"arbitrationPriority"
value=
"1"
/>
<parameter
name=
"baseAddress"
value=
"0x0
5c
0"
/>
<parameter
name=
"baseAddress"
value=
"0x0
64
0"
/>
</connection>
<connection
kind=
"clock"
version=
"11.1"
start=
"altpll_0.c0"
end=
"avs_eth_0.mm"
/>
<connection
...
...
@@ -1748,7 +1773,7 @@ q]]></parameter>
start=
"cpu_0.data_master"
end=
"avs_eth_0.mms_reg"
>
<parameter
name=
"arbitrationPriority"
value=
"1"
/>
<parameter
name=
"baseAddress"
value=
"0x04
4
0"
/>
<parameter
name=
"baseAddress"
value=
"0x04
c
0"
/>
</connection>
<connection
kind=
"avalon"
...
...
@@ -1789,6 +1814,19 @@ q]]></parameter>
start=
"cpu_0.data_master"
end=
"reg_io_ddr.mem"
>
<parameter
name=
"arbitrationPriority"
value=
"1"
/>
<parameter
name=
"baseAddress"
value=
"0x0480"
/>
<parameter
name=
"baseAddress"
value=
"0x0500"
/>
</connection>
<connection
kind=
"clock"
version=
"11.1"
start=
"altpll_0.c0"
end=
"reg_bsn_monitor_output.system"
/>
<connection
kind=
"avalon"
version=
"11.1"
start=
"cpu_0.data_master"
end=
"reg_bsn_monitor_output.mem"
>
<parameter
name=
"arbitrationPriority"
value=
"1"
/>
<parameter
name=
"baseAddress"
value=
"0x0380"
/>
</connection>
</system>
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