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RTSD
HDL
Commits
e7dfcef1
Commit
e7dfcef1
authored
10 years ago
by
Daniel van der Schuur
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-Added .rec file modification triggers for furnther automation.
parent
d8be9c14
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libraries/dsp/correlator/tb/python/verify_correlator.py
+94
-51
94 additions, 51 deletions
libraries/dsp/correlator/tb/python/verify_correlator.py
with
94 additions
and
51 deletions
libraries/dsp/correlator/tb/python/verify_correlator.py
+
94
−
51
View file @
e7dfcef1
...
@@ -19,6 +19,8 @@
...
@@ -19,6 +19,8 @@
#
#
###############################################################################
###############################################################################
import
sys
import
sys
import
os
import
time
from
common
import
*
from
common
import
*
from
common_dsp
import
*
from
common_dsp
import
*
from
mem_init_file
import
list_to_hex
from
mem_init_file
import
list_to_hex
...
@@ -37,24 +39,40 @@ from mem_init_file import list_to_hex
...
@@ -37,24 +39,40 @@ from mem_init_file import list_to_hex
# . Input 23 - 23 degrees
# . Input 23 - 23 degrees
NOF_INPUTS
=
6
NOF_INPUTS
=
6
NOF_
VISIBILITIES
=
(
NOF_INPUTS
*
(
NOF_INPUTS
+
1
))
/
2
NOF_
CHANNELS
=
4
COMPLEX_WIDTH
=
8
NOF_FOLDS
=
0
NOF_FOLDS
=
0
NOF_INPUT_STREAMS
=
NOF_INPUTS
/
pow
(
2
,
NOF_FOLDS
)
NOF_CHANNELS
=
64
USE_NEW_REC_FILE
=
False
# True = don't use outdated .rec file; wait for new one.
COMPLEX_WIDTH
=
8
PLOT_CORR_OUT_PHASES
=
False
# Plot the correlator output phases of channel 0 of both the VHDL and the Model
NOF_VISIBILITIES
=
(
NOF_INPUTS
*
(
NOF_INPUTS
+
1
))
/
2
NOF_LINES_IN_REC_FILE_TO_VERIFY
=
NOF_CHANNELS
*
NOF_VISIBILITIES
NOF_INPUT_STREAMS
=
NOF_INPUTS
/
pow
(
2
,
NOF_FOLDS
)
INTEGRATION_PERIOD
=
NOF_VISIBILITIES
INTEGRATION_PERIOD
=
NOF_VISIBILITIES
CORRELATOR_MULT_OUTPUT_COMPLEX_WIDTH
=
2
*
COMPLEX_WIDTH
CORRELATOR_MULT_OUTPUT_COMPLEX_WIDTH
=
2
*
COMPLEX_WIDTH
CORRELATOR_OUTPUT_COMPLEX_WIDTH
=
CORRELATOR_MULT_OUTPUT_COMPLEX_WIDTH
+
ceil_log2
(
INTEGRATION_PERIOD
)
CORRELATOR_OUTPUT_COMPLEX_WIDTH
=
CORRELATOR_MULT_OUTPUT_COMPLEX_WIDTH
+
ceil_log2
(
INTEGRATION_PERIOD
)
NOF_WORDS_PER_BLOCK
=
NOF_CHANNELS
*
pow
(
2
,
NOF_FOLDS
)
NOF_WORDS_PER_BLOCK
=
NOF_CHANNELS
*
pow
(
2
,
NOF_FOLDS
)
MEM_WIDTH
=
COMPLEX_WIDTH
*
2
MEM_WIDTH
=
COMPLEX_WIDTH
*
2
MEM_DEPTH
=
NOF_WORDS_PER_BLOCK
MEM_DEPTH
=
NOF_WORDS_PER_BLOCK
PATH
=
"
../../src/hex
"
PATH
=
"
../../src/hex
"
FILENAME
=
"
complex_subbands
"
FILENAME
=
"
complex_subbands
"
REC_FILE
=
os
.
environ
[
'
RADIOHDL
'
]
+
'
/libraries/dsp/correlator/tb/rec/correlator_src_out_arr0.rec
'
NOF_DP_RECORD_FIELDS
=
11
DP_RECORD_INDEX_SYNC
=
0
DP_RECORD_INDEX_BSN
=
1
DP_RECORD_INDEX_DATA
=
2
DP_RECORD_INDEX_RE
=
3
DP_RECORD_INDEX_IM
=
4
DP_RECORD_INDEX_VALID
=
5
DP_RECORD_INDEX_SOP
=
6
DP_RECORD_INDEX_EOP
=
7
DP_RECORD_INDEX_EMPTY
=
8
DP_RECORD_INDEX_CHANNEL
=
9
DP_RECORD_INDEX_ERR
=
10
def
gen_complex_inputs
(
nof_inputs
,
nof_channels
,
complex_width
):
def
gen_complex_inputs
(
nof_inputs
,
nof_channels
,
complex_width
):
"""
"""
...
@@ -186,25 +204,6 @@ def correlate(input_lists, accumulation_factor):
...
@@ -186,25 +204,6 @@ def correlate(input_lists, accumulation_factor):
return
vis_per_channel
return
vis_per_channel
REC_FILE
=
os
.
environ
[
'
RADIOHDL
'
]
+
'
/libraries/dsp/correlator/tb/rec/correlator_src_out_arr0.rec
'
NOF_DP_RECORD_FIELDS
=
11
DP_RECORD_INDEX_SYNC
=
0
DP_RECORD_INDEX_BSN
=
1
DP_RECORD_INDEX_DATA
=
2
DP_RECORD_INDEX_RE
=
3
DP_RECORD_INDEX_IM
=
4
DP_RECORD_INDEX_VALID
=
5
DP_RECORD_INDEX_SOP
=
6
DP_RECORD_INDEX_EOP
=
7
DP_RECORD_INDEX_EMPTY
=
8
DP_RECORD_INDEX_CHANNEL
=
9
DP_RECORD_INDEX_ERR
=
10
def
rec_file_to_list
(
filename
,
field_indices
=
range
(
11
)):
def
rec_file_to_list
(
filename
,
field_indices
=
range
(
11
)):
"""
"""
Read a .rec file written by dp_stream_recorder.vhd and return the contents
Read a .rec file written by dp_stream_recorder.vhd and return the contents
...
@@ -258,6 +257,37 @@ def rec_file_to_list(filename, field_indices=range(11)):
...
@@ -258,6 +257,37 @@ def rec_file_to_list(filename, field_indices=range(11)):
return
[
fields
[
i
]
for
i
in
field_indices
]
return
[
fields
[
i
]
for
i
in
field_indices
]
def
wait_for_rec_file
(
filename
,
nof_lines
):
"""
Wait for .rec file with filename to contain nof_lines.
"""
cur_time
=
datetime
.
datetime
.
now
()
print
cur_time
def
file_a_newer_than_b
(
filename_a
,
filename_b
):
"""
Returns True if file_a is newer than file_b, else False.
"""
file_a_mtime
=
os
.
path
.
getmtime
(
filename_a
)
file_a_mtime
=
os
.
path
.
getmtime
(
filename_b
)
if
file_a_mtime
>
file_b_mtime
:
return
True
else
:
return
False
def
file_mod_time
(
filename
):
"""
Returns the time a file was last modified.
"""
return
os
.
path
.
getmtime
(
filename
)
def
file_linecount
(
filename
):
"""
Returns the number of lines in file with fname.
"""
with
open
(
filename
)
as
f
:
return
sum
(
1
for
_
in
f
)
def
rec_file_to_complex
(
filename
,
complex_width
):
def
rec_file_to_complex
(
filename
,
complex_width
):
"""
"""
...
@@ -286,24 +316,6 @@ def rec_file_to_complex(filename, complex_width):
...
@@ -286,24 +316,6 @@ def rec_file_to_complex(filename, complex_width):
# Split the complex_list into packet_size chunks and return the result.
# Split the complex_list into packet_size chunks and return the result.
return
split_list
(
complex_list
,
packet_size
)
return
split_list
(
complex_list
,
packet_size
)
# Generate input data
correlator_snk_in_arr_complex
=
gen_complex_inputs
(
NOF_INPUTS
,
NOF_CHANNELS
,
COMPLEX_WIDTH
)
# Convert to int and generate HEX files from input data
correlator_snk_in_arr_int
=
complex_to_int
(
correlator_snk_in_arr_complex
)
gen_correlator_snk_in_arr_hex
(
correlator_snk_in_arr_int
)
# Calculate correlator output from input lists
correlator_src_out_arr_ref
=
correlate
(
correlator_snk_in_arr_int
,
INTEGRATION_PERIOD
)
# (run TB)
# Read test bench output file written by dp_stream_rec_play.vhd
correlator_src_out_arr
=
rec_file_to_complex
(
REC_FILE
,
complex_width
=
CORRELATOR_OUTPUT_COMPLEX_WIDTH
)
def
compare_correlator_src_out_arr
(
vhdl_out
,
model_out
):
def
compare_correlator_src_out_arr
(
vhdl_out
,
model_out
):
"""
"""
...
@@ -321,11 +333,7 @@ def compare_correlator_src_out_arr(vhdl_out, model_out):
...
@@ -321,11 +333,7 @@ def compare_correlator_src_out_arr(vhdl_out, model_out):
sys
.
exit
()
sys
.
exit
()
vis_nr
+=
1
vis_nr
+=
1
channel_nr
+=
1
channel_nr
+=
1
print
'
Checked %d channels, %d visibilities each: PASSED
'
%
(
channel_nr
,
vis_nr
)
print
'
corr out
'
,
correlator_src_out_arr
[
0
]
print
'
corr ref
'
,
correlator_src_out_arr_ref
[
0
]
compare_correlator_src_out_arr
(
correlator_src_out_arr
,
correlator_src_out_arr_ref
)
def
plot_phase_shifts
(
correlator_output
):
def
plot_phase_shifts
(
correlator_output
):
"""
"""
...
@@ -351,6 +359,41 @@ def plot_phase_shifts(correlator_output):
...
@@ -351,6 +359,41 @@ def plot_phase_shifts(correlator_output):
phases_mat
=
numpy
.
array
(
channel_phases
)
phases_mat
=
numpy
.
array
(
channel_phases
)
mat
=
unique_vis_to_full_matrix
(
phases_mat
)
mat
=
unique_vis_to_full_matrix
(
phases_mat
)
plot_matrix_color
([[
mat
]])
plot_matrix_color
([[
mat
]])
plot_phase_shifts
(
correlator_src_out_arr
[
0
])
plot_phase_shifts
(
correlator_src_out_arr_ref
[
0
])
# Generate input data
correlator_snk_in_arr_complex
=
gen_complex_inputs
(
NOF_INPUTS
,
NOF_CHANNELS
,
COMPLEX_WIDTH
)
# Convert to int and generate HEX files from input data
correlator_snk_in_arr_int
=
complex_to_int
(
correlator_snk_in_arr_complex
)
gen_correlator_snk_in_arr_hex
(
correlator_snk_in_arr_int
)
# Calculate correlator output from input lists
correlator_src_out_arr_ref
=
correlate
(
correlator_snk_in_arr_int
,
INTEGRATION_PERIOD
)
# (run TB)
if
USE_NEW_REC_FILE
==
True
:
# Wait for the correlator output
print
'
Waiting for %s to be modified...
'
%
REC_FILE
now
=
time
.
time
()
do_until_gt
(
file_mod_time
,
now
,
s_timeout
=
900
,
filename
=
REC_FILE
)
print
'
%s modified. Waiting for %d lines to be written...
'
%
(
REC_FILE
,
NOF_LINES_IN_REC_FILE_TO_VERIFY
)
do_until_gt
(
file_linecount
,
NOF_LINES_IN_REC_FILE_TO_VERIFY
,
s_timeout
=
900
,
filename
=
REC_FILE
)
else
:
print
'
Using old .rec file
'
# Read test bench output file written by dp_stream_rec_play.vhd
correlator_src_out_arr
=
rec_file_to_complex
(
REC_FILE
,
complex_width
=
CORRELATOR_OUTPUT_COMPLEX_WIDTH
)
# Compare modeloutput to VHDL output
compare_correlator_src_out_arr
(
correlator_src_out_arr
,
correlator_src_out_arr_ref
)
if
PLOT_CORR_OUT_PHASES
==
True
:
plot_phase_shifts
(
correlator_src_out_arr
[
0
])
plot_phase_shifts
(
correlator_src_out_arr_ref
[
0
])
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