Use FPGA parameters.

applications/lofar2/designs/lofar2_unb2b_beamformer/lofar2_unb2b_beamformer.fpga.yaml

-schema_name   : args
+schema_name: args
 schema_version: 1.0
-schema_type   : fpga
+schema_type: fpga
 
 hdl_library_name: lofar2_unb2b_beamformer
-fpga_name       : lofar2_unb2b_beamformer
+fpga_name: lofar2_unb2b_beamformer
 fpga_description: "FPGA design lofar2_unb2b_beamformer"
+parameters:
+  - { name: c_N_pol,              value: 2 }
+  - { name: c_N_beamsets,         value: 2 }
+  - { name: c_N_sub,              value: 512 }
+  - { name: c_N_fft,              value: 1024 }
+  - { name: c_S_pn,               value: 12 }
+  - { name: c_Q_fft,              value: 2 }
+  - { name: c_N_taps,             value: 16 }
+  - { name: c_W_adc_jesd,         value: 16 }  # NOTE: define c_W_adc_jesd before c_W_adc, to avoid that c_W_adc_jesd gets substituted by 14_jesd
+  - { name: c_W_adc,              value: 14 }
+  - { name: c_V_sample_delay,     value: 4096 }
+  - { name: c_V_si_db_large,      value: 131072 }  # NOTE: define c_V_si_db_large before c_V_si_db, to avoid that c_V_si_db_large gets substituted by 1024_large
+  - { name: c_V_si_db,            value: 1024 }
+  - { name: c_W_fir_coef,         value: 16 }
+  - { name: c_W_subband,          value: 18 }
+  - { name: c_P_pfb,              value: c_S_pn / c_Q_fft }  # = 6
+  - { name: c_S_sub_bf,           value: 488 }
+  - { name: c_f_adc_MHz,          value: 200 }
+  - { name: c_W_sub_weight,       value: 16 }
+  - { name: c_W_bf_weight,        value: 16 }
+  - { name: c_W_beamlet,          value: 8 }
+  - { name: c_W_beamlet_scale,    value: 16 }
+  - { name: c_nof_clk_per_pps,    value: c_f_adc_MHz * 10**6 }  # = 200000000
+  - { name: c_nof_block_per_sync, value: 195313 }  # TBD temporarily use 390625 = 2 * 195312, to have integer number of blocks in 2 s sync interval, TODO: remove when REG_BSN_SOURCE_V2 is used
 
 peripherals:
   #############################################################################
@@ -71,24 +95,24 @@ peripherals:
   
   - peripheral_name: dp/dp_shiftram
     parameter_overrides:
-      - { name: g_nof_streams, value: 12 }  # = S_pn
-      - { name: g_nof_words, value: 4096 }
-      - { name: g_data_w, value: 16 }
+      - { name: g_nof_streams, value: c_S_pn }
+      - { name: g_nof_words, value: c_V_sample_delay }
+      - { name: g_data_w, value: c_W_adc_jesd }
     slave_port_names:
       - REG_DP_SHIFTRAM
 
   - peripheral_name: dp/dp_bsn_source
     parameter_overrides:
-      - { name: g_nof_block_per_sync, value: 195313 }  # 390625 = 2 * 195312, to have integer number of blocks in 2 s sync interval
+      - { name: g_nof_block_per_sync, value: c_nof_block_per_sync }
     slave_port_names:
       - REG_BSN_SOURCE
       
   # TODO: Use REG_BSN_SOURCE_V2 instead of REG_BSN_SOURCE
   #peripheral_name: dp/dp_bsn_source_v2
   #parameter_overrides:
-  #  - { name: g_nof_clk_per_sync, value: 200000000 }  # = f_adc
-  #  - { name: g_block_size, value: 1024 }       # = N_fft
-  #  - { name: g_bsn_time_offset_w, value: 10 }  # note: g_bsn_time_offset_w = ceil_log2(g_block_size)
+  #  - { name: g_nof_clk_per_sync, value: c_nof_clk_per_pps }
+  #  - { name: g_block_size, value: c_N_fft }
+  #  - { name: g_bsn_time_offset_w, value: ceil_log2(c_N_fft) }
   #slave_port_names:
   #  - REG_BSN_SOURCE_V2
       
@@ -103,34 +127,34 @@ peripherals:
   
   - peripheral_name: diag/diag_wg_wideband
     parameter_overrides:
-      - { name: g_nof_streams, value: 12 }  # = S_pn
+      - { name: g_nof_streams, value: c_S_pn }
     slave_port_names:
       - REG_DIAG_WG
       - RAM_DIAG_WG
       
   - peripheral_name: aduh/aduh_mon_dc_power
     parameter_overrides:
-      - { name: g_nof_streams, value: 12 }  # = S_pn
+      - { name: g_nof_streams, value: c_S_pn }
     slave_port_names:
       - REG_ADUH_MON
 
   # Commented RAM_ADUH_MON, because use RAM_DIAG_DATA_BUF_BSN instead
   #- peripheral_name: aduh/aduh_mon_data_buffer
   #  parameter_overrides:
-  #    - { name: g_nof_streams, value: 12 }  # = S_pn
-  #    - { name: g_symbol_w, value: 16 }
+  #    - { name: g_nof_streams, value: c_S_pn }
+  #    - { name: g_symbol_w, value: c_W_adc_jesd }
   #    - { name: g_nof_symbols_per_data, value: 1 }
   #    - { name: g_buffer_nof_symbols, value: 512 }
-  #    - { name: g_buffer_use_sync, value: true }
+  #    - { name: g_buffer_use_sync, value: True }
   #  slave_port_names:
   #    - RAM_ADUH_MON
 
   - peripheral_name: diag/diag_data_buffer
     peripheral_group: bsn
     parameter_overrides:
-      - { name: g_nof_streams, value: 12 }  # = S_pn
-      - { name: g_data_w, value: 16 }
-      - { name: g_nof_data, value: 1024 }
+      - { name: g_nof_streams, value: c_S_pn }
+      - { name: g_data_w, value: c_W_adc_jesd }
+      - { name: g_nof_data, value: c_V_si_db }
     slave_port_names:
       - REG_DIAG_DATA_BUF_BSN
       - RAM_DIAG_DATA_BUF_BSN
@@ -145,10 +169,9 @@ peripherals:
       
   - peripheral_name: filter/fil_ppf_w
     parameter_overrides:
-      - { name: g_wb_factor, value: 1 }
-      - { name: g_nof_taps, value: 16 }  # = N_taps
-      - { name: g_nof_bands, value: 1024 }  # = N_fft
-      - { name: g_coef_dat_w, value: 16 }  # = W_fir_coef
+      - { name: g_nof_taps, value: c_N_taps }
+      - { name: g_nof_bands, value: c_N_fft }
+      - { name: g_coef_dat_w, value: c_W_fir_coef }
     slave_port_names:
       - RAM_FIL_COEFS
       
@@ -175,8 +198,8 @@ peripherals:
       
   - peripheral_name: reorder/reorder_col_wide
     parameter_overrides:
-      - { name: g_wb_factor, value: 12 }  # N_beamsets * P_pfb
-      - { name: g_nof_ch_in, value: 1024 }  # = N_sub * Q_fft
-      - { name: g_nof_ch_sel, value: 976 }  # = S_sub_bf * Q_fft
+      - { name: g_wb_factor, value: c_N_beamsets * c_P_pfb }
+      - { name: g_nof_ch_in, value: c_N_sub * c_Q_fft }
+      - { name: g_nof_ch_sel, value: c_S_sub_bf * c_Q_fft }
     slave_port_names:
       - RAM_SS_SS_WIDE