Updated information header. Added component descriptions for agi027_xxxx:...

Updated information header. Added component descriptions for agi027_xxxx: ip_agi027_xxxx_ram_cr_cw, ip_agi027_xxxx_ram_rw_rw, ip_agi027_xxxx_ram_r_w and a notification for the components ip_agi027_xxxx_ram_crwk_crw and ip_agi027_xxxx_ram_crw_crw.

libraries/technology/memory/tech_memory_component_pkg.vhd

--------------------------------------------------------------------------------
+-- -----------------------------------------------------------------------------
 --
--- Copyright (C) 2014
+-- Copyright 2014-2023
 -- ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
 -- P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
 --
--- This program is free software: you can redistribute it and/or modify
--- it under the terms of the GNU General Public License as published by
--- the Free Software Foundation, either version 3 of the License, or
--- (at your option) any later version.
+-- Licensed under the Apache License, Version 2.0 (the "License");
+-- you may not use this file except in compliance with the License.
+-- You may obtain a copy of the License at
 --
--- This program is distributed in the hope that it will be useful,
--- but WITHOUT ANY WARRANTY; without even the implied warranty of
--- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
--- GNU General Public License for more details.
+-- http://www.apache.org/licenses/LICENSE-2.0
 --
--- You should have received a copy of the GNU General Public License
--- along with this program.  If not, see <http://www.gnu.org/licenses/>.
+-- Unless required by applicable law or agreed to in writing, software
+-- distributed under the License is distributed on an "AS IS" BASIS,
+-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+-- See the License for the specific language governing permissions and
+-- limitations under the License.
 --
--------------------------------------------------------------------------------
-
--- Purpose: IP components declarations for various devices that get wrapped by the tech components
+-- -----------------------------------------------------------------------------
+--
+-- Author : -
+-- Changed by : D.F. Brouwer
+-- Purpose: 
+--   IP components declarations for various devices that get wrapped by the tech components
 
 library IEEE;
 use IEEE.std_logic_1164.all;
@@ -562,4 +564,75 @@ package tech_memory_component_pkg is
   );
   end component;
 
+  -----------------------------------------------------------------------------
+  -- ip_agi027_xxxx
+  -----------------------------------------------------------------------------
+
+  -- components ip_agi027_xxxx_ram_crwk_crw and ip_agi027_xxxx_ram_crw_crw are 
+  -- not available for the Agilex 7. For more details please refer the
+  -- README.txt in the technology/ip_agi027_xxxx/ram/ folder.
+
+  component ip_agi027_xxxx_ram_cr_cw is
+  generic (
+    g_inferred   : boolean := false;
+    g_adr_w      : natural := 5;
+    g_dat_w      : natural := 8;
+    g_nof_words  : natural := 2**5;
+    g_rd_latency : natural := 1;  -- choose 1 or 2
+    g_init_file  : string  := "UNUSED"
+  );
+  port
+  (
+    data      : in  std_logic_vector(g_dat_w - 1 downto 0);
+    rdaddress : in  std_logic_vector(g_adr_w - 1 downto 0);
+    rdclk     : in  std_logic;
+    wraddress : in  std_logic_vector(g_adr_w - 1 downto 0);
+    wrclk     : in  std_logic  := '1';
+    wren      : in  std_logic  := '0';
+    q         : out std_logic_vector(g_dat_w - 1 downto 0)
+  );
+  end component;
+
+  component ip_agi027_xxxx_ram_rw_rw is
+  generic (
+    g_inferred   : boolean := false;
+    g_adr_w      : natural := 5;
+    g_dat_w      : natural := 8;
+    g_nof_words  : natural := 2**5;
+    g_rd_latency : natural := 1;  -- choose 1 or 2
+    g_init_file  : string  := "UNUSED"
+  );
+  port
+  (
+    address_a : in std_logic_vector(g_adr_w - 1 downto 0);
+    address_b : in std_logic_vector(g_adr_w - 1 downto 0);
+    clk       : in std_logic  := '1';
+    data_a    : in std_logic_vector(g_dat_w - 1 downto 0);
+    data_b    : in std_logic_vector(g_dat_w - 1 downto 0);
+    wren_a    : in std_logic  := '0';
+    wren_b    : in std_logic  := '0';
+    q_a       : out std_logic_vector(g_dat_w - 1 downto 0);
+    q_b       : out std_logic_vector(g_dat_w - 1 downto 0)
+  );
+  end component;
+
+  component ip_agi027_xxxx_ram_r_w is
+  generic (
+    g_inferred   : boolean := false;
+    g_adr_w      : natural := 5;
+    g_dat_w      : natural := 8;
+    g_nof_words  : natural := 2**5;
+    g_rd_latency : natural := 1;  -- choose 1 or 2
+    g_init_file  : string  := "UNUSED"
+  );
+  port (
+    clk         : in std_logic  := '1';
+    data        : in std_logic_vector(g_dat_w - 1 downto 0) := (others => '0');
+    rdaddress   : in std_logic_vector(g_adr_w - 1 downto 0) := (others => '0');
+    wraddress   : in std_logic_vector(g_adr_w - 1 downto 0) := (others => '0');
+    wren        : in std_logic  := '0';
+    q           : out std_logic_vector(g_dat_w - 1 downto 0)
+  );
+  end component;
+
 end tech_memory_component_pkg;