added st_histogram to VHDL

applications/lofar2/designs/lofar2_unb2b_sdp_station/src/vhdl/lofar2_unb2b_sdp_station.vhd

@@ -238,6 +238,10 @@ ARCHITECTURE str OF lofar2_unb2b_sdp_station IS
   SIGNAL reg_diag_data_buf_bsn_mosi : t_mem_mosi := c_mem_mosi_rst;
   SIGNAL reg_diag_data_buf_bsn_miso : t_mem_miso := c_mem_miso_rst;
 
+  -- ST Histogram 
+  SIGNAL ram_st_histogram_mosi      : t_mem_mosi := c_mem_mosi_rst;
+  SIGNAL ram_st_histogram_miso      : t_mem_miso := c_mem_miso_rst;
+
   -- Aduh statistics monitor
   SIGNAL reg_aduh_monitor_mosi      : t_mem_mosi := c_mem_mosi_rst;
   SIGNAL reg_aduh_monitor_miso      : t_mem_miso := c_mem_miso_rst;
@@ -592,6 +596,8 @@ BEGIN
     ram_diag_data_buf_bsn_miso  => ram_diag_data_buf_bsn_miso,
     reg_diag_data_buf_bsn_mosi  => reg_diag_data_buf_bsn_mosi,
     reg_diag_data_buf_bsn_miso  => reg_diag_data_buf_bsn_miso,
+    ram_st_histogram_mosi       => ram_st_histogram_mosi,
+    ram_st_histogram_miso       => ram_st_histogram_miso,
     reg_aduh_monitor_mosi       => reg_aduh_monitor_mosi,
     reg_aduh_monitor_miso       => reg_aduh_monitor_miso,
     ram_st_sst_mosi             => ram_st_sst_mosi,   
@@ -713,6 +719,8 @@ BEGIN
     ram_diag_data_buf_bsn_miso  => ram_diag_data_buf_bsn_miso,
     reg_diag_data_buf_bsn_mosi  => reg_diag_data_buf_bsn_mosi,
     reg_diag_data_buf_bsn_miso  => reg_diag_data_buf_bsn_miso,
+    ram_st_histogram_mosi       => ram_st_histogram_mosi,
+    ram_st_histogram_miso       => ram_st_histogram_miso,
     reg_aduh_monitor_mosi       => reg_aduh_monitor_mosi,
     reg_aduh_monitor_miso       => reg_aduh_monitor_miso,
                                                                

applications/lofar2/designs/lofar2_unb2b_sdp_station/src/vhdl/mmm_lofar2_unb2b_sdp_station.vhd

@@ -130,6 +130,10 @@ ENTITY mmm_lofar2_unb2b_sdp_station IS
     reg_diag_data_buf_bsn_mosi    : OUT t_mem_mosi;
     reg_diag_data_buf_bsn_miso    : IN  t_mem_miso;
 
+    -- ST Histogram
+    ram_st_histogram_mosi         : OUT t_mem_mosi;
+    ram_st_histogram_miso         : IN  t_mem_miso;
+
     -- Aduh
     reg_aduh_monitor_mosi         : OUT t_mem_mosi;
     reg_aduh_monitor_miso         : IN  t_mem_miso;
@@ -304,6 +308,9 @@ BEGIN
     u_mm_file_reg_diag_data_buf_bsn   : mm_file GENERIC MAP(mmf_unb_file_prefix(g_sim_unb_nr, c_sim_node_nr, c_sim_node_type) & "REG_DIAG_DATA_BUFFER_BSN")
                                                 PORT MAP(mm_rst, mm_clk, reg_diag_data_buf_bsn_mosi, reg_diag_data_buf_bsn_miso );
 
+    u_mm_file_ram_st_histogram        : mm_file GENERIC MAP(mmf_unb_file_prefix(g_sim_unb_nr, c_sim_node_nr, c_sim_node_type) & "RAM_ST_HISTOGRAM")
+                                                PORT MAP(mm_rst, mm_clk, ram_st_histogram_mosi, ram_st_histogram_miso );
+
     u_mm_file_reg_aduh_monitor        : mm_file GENERIC MAP(mmf_unb_file_prefix(g_sim_unb_nr, c_sim_node_nr, c_sim_node_type) & "REG_ADUH_MONITOR")
                                                 PORT MAP(mm_rst, mm_clk, reg_aduh_monitor_mosi, reg_aduh_monitor_miso );
 
@@ -599,7 +606,6 @@ BEGIN
       reg_mmdp_ctrl_write_export                => reg_mmdp_ctrl_mosi.wr,
       reg_mmdp_ctrl_writedata_export            => reg_mmdp_ctrl_mosi.wrdata(c_word_w-1 DOWNTO 0),
 
-
       ram_diag_data_buffer_bsn_clk_export       => OPEN,
       ram_diag_data_buffer_bsn_reset_export     => OPEN,
       ram_diag_data_buffer_bsn_address_export   => ram_diag_data_buf_bsn_mosi.address(c_sdp_ram_diag_data_buf_bsn_addr_w-1 DOWNTO 0),
@@ -616,6 +622,14 @@ BEGIN
       reg_diag_data_buffer_bsn_read_export      => reg_diag_data_buf_bsn_mosi.rd,
       reg_diag_data_buffer_bsn_readdata_export  => reg_diag_data_buf_bsn_miso.rddata(c_word_w-1 DOWNTO 0),
 
+      ram_st_histogram_clk_export               => OPEN,
+      ram_st_histogram_reset_export             => OPEN,
+      ram_st_histogram_address_export           => ram_st_histogram_mosi.address(c_sdp_ram_st_histogram_addr_w-1 DOWNTO 0),
+      ram_st_histogram_write_export             => ram_st_histogram_mosi.wr,
+      ram_st_histogram_writedata_export         => ram_st_histogram_mosi.wrdata(c_word_w-1 DOWNTO 0),
+      ram_st_histogram_read_export              => ram_st_histogram_mosi.rd,
+      ram_st_histogram_readdata_export          => ram_st_histogram_miso.rddata(c_word_w-1 DOWNTO 0),
+
       reg_aduh_monitor_reset_export             => OPEN,
       reg_aduh_monitor_clk_export               => OPEN,
       reg_aduh_monitor_address_export           => reg_aduh_monitor_mosi.address(c_sdp_reg_aduh_monitor_addr_w-1 DOWNTO 0),

applications/lofar2/designs/lofar2_unb2b_sdp_station/src/vhdl/qsys_lofar2_unb2b_sdp_station_pkg.vhd

@@ -91,6 +91,13 @@ PACKAGE qsys_lofar2_unb2b_sdp_station_pkg IS
             ram_diag_data_buffer_bsn_reset_export     : out std_logic;                                        -- export
             ram_diag_data_buffer_bsn_write_export     : out std_logic;                                        -- export
             ram_diag_data_buffer_bsn_writedata_export : out std_logic_vector(31 downto 0);                    -- export
+            ram_st_histogram_address_export           : out std_logic_vector(12 downto 0);                    -- export
+            ram_st_histogram_clk_export               : out std_logic;                                        -- export
+            ram_st_histogram_read_export              : out std_logic;                                        -- export
+            ram_st_histogram_readdata_export          : in  std_logic_vector(31 downto 0) := (others => 'X'); -- export
+            ram_st_histogram_reset_export             : out std_logic;                                        -- export
+            ram_st_histogram_write_export             : out std_logic;                                        -- export
+            ram_st_histogram_writedata_export         : out std_logic_vector(31 downto 0);                    -- export
             ram_equalizer_gains_address_export        : out std_logic_vector(12 downto 0);                    -- export
             ram_equalizer_gains_clk_export            : out std_logic;                                        -- export
             ram_equalizer_gains_read_export           : out std_logic;                                        -- export

applications/lofar2/libraries/sdp/src/vhdl/node_sdp_adc_input_and_timing.vhd

@@ -85,6 +85,10 @@ ENTITY node_sdp_adc_input_and_timing IS
     reg_diag_data_buf_bsn_mosi     : IN  t_mem_mosi;
     reg_diag_data_buf_bsn_miso     : OUT t_mem_miso;
 
+    -- ST Histogram
+    ram_st_histogram_mosi          : IN  t_mem_mosi;
+    ram_st_histogram_miso          : OUT t_mem_miso;
+
     -- Aduh (statistics) monitor
     reg_aduh_monitor_mosi          : IN  t_mem_mosi;
     reg_aduh_monitor_miso          : OUT t_mem_miso;
@@ -442,6 +446,32 @@ BEGIN
     in_sync           => st_sosi_arr(0).sync
   );
 
+  -----------------------------------------------------------------------------
+  -- ST Histogram
+  -----------------------------------------------------------------------------
+
+  u_st_histogram : ENTITY st_lib.mmp_st_histogram
+  GENERIC MAP (
+    g_nof_instances     => c_sdp_S_pn,
+    g_data_w            => c_sdp_W_adc,
+    g_nof_bins          => c_sdp_V_si_histogram,
+    g_nof_data_per_sync => 10**6 * c_sdp_f_adc_MHz
+  )
+  PORT MAP (
+    mm_rst            => mm_rst_internal,
+    mm_clk            => mm_clk,
+    dp_rst            => rx_rst,
+    dp_clk            => rx_clk,
+
+    ram_copi          => ram_st_histogram_mosi,
+    ram_cipo          => ram_st_histogram_miso,
+
+    snk_in_arr        => st_sosi_arr
+  );
+
+
+
+
 
   -----------------------------------------------------------------------------
   -- Output Stage

applications/lofar2/libraries/sdp/src/vhdl/sdp_pkg.vhd

@@ -84,6 +84,7 @@ PACKAGE sdp_pkg is
   CONSTANT c_sdp_V_sample_delay  : NATURAL := 4096;
   CONSTANT c_sdp_V_si_db         : NATURAL := 1024;
   CONSTANT c_sdp_V_si_db_large   : NATURAL := 131072;
+  CONSTANT c_sdp_V_si_histogram  : NATURAL := 512;
   CONSTANT c_sdp_W_adc           : NATURAL := 14;
   CONSTANT c_sdp_W_adc_jesd      : NATURAL := 16;
   CONSTANT c_sdp_W_beamlet       : NATURAL := 8;
@@ -297,6 +298,7 @@ PACKAGE sdp_pkg is
   CONSTANT c_sdp_reg_bsn_scheduler_addr_w      : NATURAL := 1;
   CONSTANT c_sdp_ram_diag_data_buf_bsn_addr_w  : NATURAL := ceil_log2(c_sdp_S_pn*c_sdp_V_si_db_large); -- Dimension DB address range for largest DB, so that both the large and the default small DB fit.
   CONSTANT c_sdp_reg_diag_data_buf_bsn_addr_w  : NATURAL := 1 + ceil_log2(c_sdp_S_pn);  
+  CONSTANT c_sdp_ram_st_histogram_addr_w       : NATURAL := ceil_log2(c_sdp_S_pn*c_sdp_V_si_histogram); 
   CONSTANT c_sdp_reg_aduh_monitor_addr_w       : NATURAL := 2 + ceil_log2(c_sdp_S_pn);
 
   -- FSUB MM address widths

applications/lofar2/libraries/sdp/src/vhdl/sdp_station.vhd

@@ -134,6 +134,10 @@ ENTITY sdp_station IS
     reg_diag_data_buf_bsn_mosi : IN  t_mem_mosi := c_mem_mosi_rst;
     reg_diag_data_buf_bsn_miso : OUT t_mem_miso := c_mem_miso_rst;
 
+    -- ST Histogram
+    ram_st_histogram_mosi      : IN  t_mem_mosi := c_mem_mosi_rst;
+    ram_st_histogram_miso      : OUT t_mem_miso := c_mem_miso_rst;
+
     -- Aduh statistics monitor
     reg_aduh_monitor_mosi      : IN  t_mem_mosi := c_mem_mosi_rst;
     reg_aduh_monitor_miso      : OUT t_mem_miso := c_mem_miso_rst;
@@ -428,6 +432,8 @@ BEGIN
     ram_diag_data_buf_bsn_miso  => ram_diag_data_buf_bsn_miso,
     reg_diag_data_buf_bsn_mosi  => reg_diag_data_buf_bsn_mosi,
     reg_diag_data_buf_bsn_miso  => reg_diag_data_buf_bsn_miso,
+    ram_st_histogram_mosi       => ram_st_histogram_mosi,
+    ram_st_histogram_miso       => ram_st_histogram_miso,
     reg_aduh_monitor_mosi       => reg_aduh_monitor_mosi,
     reg_aduh_monitor_miso       => reg_aduh_monitor_miso,