Add g_fifo_note_is_ful=false for dp_fifo_fill_eop_sc.

libraries/base/dp/src/vhdl/dp_block_validate_err.vhd

@@ -86,6 +86,7 @@ entity dp_block_validate_err is
     g_min_block_size     : positive := 1;  -- smallest possible incoming block size.
     g_nof_err_counts     : natural  := 8;
     -- fifo generics
+    g_fifo_note_is_ful   : boolean  := true;
     g_fifo_size          : positive := 256;  -- fifo size to buffer incoming blocks, should be >= g_max_block_size
     g_data_w             : natural  := 16;
     g_bsn_w              : natural  := 1;
@@ -292,8 +293,9 @@ begin
     out_reg     => open  -- no write
   );
 
-  u_fifo_fill_eop : entity work.dp_fifo_fill_eop
+  u_fifo_fill_eop : entity work.dp_fifo_fill_eop_sc
   generic map (
+    g_note_is_ful  => g_fifo_note_is_ful,
     g_data_w       => g_data_w,
     g_bsn_w        => g_bsn_w,
     g_empty_w      => g_empty_w,
@@ -307,11 +309,8 @@ begin
     g_fifo_size    => g_fifo_size
   )
   port map (
-    wr_rst => dp_rst,
-    wr_clk => dp_clk,
-    rd_rst => dp_rst,
-    rd_clk => dp_clk,
-
+    rst     => dp_rst,
+    clk     => dp_clk,
     -- ST sink
     snk_out => snk_out,
     snk_in  => snk_in,

libraries/base/ring/src/vhdl/ring_rx.vhd

@@ -123,6 +123,7 @@ begin
     g_max_block_size  => c_packet_size,
     g_min_block_size  => c_packet_size,
     g_nof_err_counts  => g_nof_err_counts,
+    g_fifo_note_is_ful=> false,  -- use false, because g_fifo_size = c_packet_size
     g_fifo_size       => c_packet_size,  -- can be same as g_max_block_size as src_in.ready = '1'
     g_use_sync        => false,  -- no need to pass on ref_sync
     g_data_w          => g_data_w