No need to use ip/ and no need to use *_top.vhd.

libraries/technology/ip_arria10/transceiver_reset_controller_1/hdllib.cfg

 hdl_lib_name = ip_arria10_transceiver_reset_controller_1
-hdl_library_clause_name = ip_arria10_transceiver_reset_controller_1_lib
-hdl_lib_uses = ip_arria10_transceiver_reset_controller_1_altera_xcvr_reset_control_140
+hdl_library_clause_name = ip_arria10_transceiver_reset_controller_1_altera_xcvr_reset_control_140
+hdl_lib_uses = 
 hdl_lib_technology = ip_arria10
 
 build_dir_sim = $HDL_BUILD_DIR
 build_dir_synth = $HDL_BUILD_DIR
 
+modelsim_compile_ip_files =
+    $RADIOHDL/libraries/technology/ip_arria10/transceiver_reset_controller_1/compile_ip.tcl
+
 synth_files =
-    ip_arria10_transceiver_reset_controller_1_top.vhd
     
 test_bench_files = 
 
-modelsim_search_libraries =
-    altera_ver lpm_ver sgate_ver altera_mf_ver altera_lnsim_ver twentynm_ver twentynm_hssi_ver twentynm_hip_ver
-    altera     lpm     sgate     altera_mf     altera_lnsim     twentynm     twentynm_hssi     twentynm_hip
+quartus_qip_files =
+    generated/ip_arria10_transceiver_reset_controller_1.qip

libraries/technology/ip_arria10/transceiver_reset_controller_1/ip/hdllib.cfg

-hdl_lib_name = ip_arria10_transceiver_reset_controller_1_altera_xcvr_reset_control_140  
-hdl_library_clause_name = ip_arria10_transceiver_reset_controller_1_altera_xcvr_reset_control_140
-hdl_lib_uses = 
-hdl_lib_technology = ip_arria10
-
-build_dir_sim = $HDL_BUILD_DIR
-build_dir_synth = $HDL_BUILD_DIR
-
-modelsim_compile_ip_files =
-    $RADIOHDL/libraries/technology/ip_arria10/transceiver_reset_controller_1/ip/compile_ip.tcl
-
-synth_files =
-    
-test_bench_files = 
-
-quartus_qip_files =
-    generated/ip_arria10_transceiver_reset_controller_1.qip

libraries/technology/ip_arria10/transceiver_reset_controller_1/ip_arria10_transceiver_reset_controller_1_top.vhd

--------------------------------------------------------------------------------
---
--- Copyright (C) 2014
--- ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
--- JIVE (Joint Institute for VLBI in Europe) <http://www.jive.nl/>
--- P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
---
--- This program is free software: you can redistribute it and/or modify
--- it under the terms of the GNU General Public License as published by
--- the Free Software Foundation, either version 3 of the License, or
--- (at your option) any later version.
---
--- This program is distributed in the hope that it will be useful,
--- but WITHOUT ANY WARRANTY; without even the implied warranty of
--- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
--- GNU General Public License for more details.
---
--- You should have received a copy of the GNU General Public License
--- along with this program.  If not, see <http://www.gnu.org/licenses/>.
---
--------------------------------------------------------------------------------
-
--- Purpose: Wrapper for generated ip_arria10_transceiver_reset_controller_1.vhd
--- Description:
---   This wrapper avoids the need to vmap the ip_arria10_transceiver_reset_controller_1_altera_xcvr_reset_control_140 library
---   in the technology independent library that instantiate this IP.
--- Remarks:
--- . Manually created from generated ip_arria10_transceiver_reset_controller_1.vhd.
-
-library IEEE;
-use IEEE.std_logic_1164.all;
-                   
-library ip_arria10_transceiver_reset_controller_1_altera_xcvr_reset_control_140;
-
-entity ip_arria10_transceiver_reset_controller_1_top is
-  port (
-    clock              : in  std_logic                    := '0';             --              clock.clk
-    reset              : in  std_logic                    := '0';             --              reset.reset
-    pll_powerdown      : out std_logic_vector(0 downto 0);                    --      pll_powerdown.pll_powerdown
-    tx_analogreset     : out std_logic_vector(0 downto 0);                    --     tx_analogreset.tx_analogreset
-    tx_digitalreset    : out std_logic_vector(0 downto 0);                    --    tx_digitalreset.tx_digitalreset
-    tx_ready           : out std_logic_vector(0 downto 0);                    --           tx_ready.tx_ready
-    pll_locked         : in  std_logic_vector(0 downto 0) := (others => '0'); --         pll_locked.pll_locked
-    pll_select         : in  std_logic_vector(0 downto 0) := (others => '0'); --         pll_select.pll_select
-    tx_cal_busy        : in  std_logic_vector(0 downto 0) := (others => '0'); --        tx_cal_busy.tx_cal_busy
-    rx_analogreset     : out std_logic_vector(0 downto 0);                    --     rx_analogreset.rx_analogreset
-    rx_digitalreset    : out std_logic_vector(0 downto 0);                    --    rx_digitalreset.rx_digitalreset
-    rx_ready           : out std_logic_vector(0 downto 0);                    --           rx_ready.rx_ready
-    rx_is_lockedtodata : in  std_logic_vector(0 downto 0) := (others => '0'); -- rx_is_lockedtodata.rx_is_lockedtodata
-    rx_cal_busy        : in  std_logic_vector(0 downto 0) := (others => '0')  --        rx_cal_busy.rx_cal_busy
-  );
-end ip_arria10_transceiver_reset_controller_1_top;
-
-architecture str of ip_arria10_transceiver_reset_controller_1_top is
-begin
-
-  u_ip_arria10_transceiver_reset_controller_1 : entity ip_arria10_transceiver_reset_controller_1_altera_xcvr_reset_control_140.ip_arria10_transceiver_reset_controller_1
-  port map (
-    clock              => clock             ,  --              clock.clk
-    reset              => reset             ,  --              reset.reset
-    pll_powerdown      => pll_powerdown     ,  --      pll_powerdown.pll_powerdown
-    tx_analogreset     => tx_analogreset    ,  --     tx_analogreset.tx_analogreset
-    tx_digitalreset    => tx_digitalreset   ,  --    tx_digitalreset.tx_digitalreset
-    tx_ready           => tx_ready          ,  --           tx_ready.tx_ready
-    pll_locked         => pll_locked        ,  --         pll_locked.pll_locked
-    pll_select         => pll_select        ,  --         pll_select.pll_select
-    tx_cal_busy        => tx_cal_busy       ,  --        tx_cal_busy.tx_cal_busy
-    rx_analogreset     => rx_analogreset    ,  --     rx_analogreset.rx_analogreset
-    rx_digitalreset    => rx_digitalreset   ,  --    rx_digitalreset.rx_digitalreset
-    rx_ready           => rx_ready          ,  --           rx_ready.rx_ready
-    rx_is_lockedtodata => rx_is_lockedtodata,  -- rx_is_lockedtodata.rx_is_lockedtodata
-    rx_cal_busy        => rx_cal_busy          --        rx_cal_busy.rx_cal_busy
-  );
-
-end str;