Corrected ta2_channel_cross offset constants

applications/ta2/ip/ta2_channel_cross/ta2_channel_cross.vhd

@@ -109,14 +109,13 @@ ARCHITECTURE str OF ta2_channel_cross IS
   CONSTANT c_bsn_w     : NATURAL := sel_a_b(g_use_bsn, g_bsn_w, 0);
   CONSTANT c_channel_w : NATURAL := sel_a_b(g_use_channel, g_channel_w, 0);
 
-  CONSTANT c_err_offset     : NATURAL := (g_nof_bytes+1 * c_byte_w);
-  CONSTANT c_bsn_offset     : NATURAL := c_err_offset+c_err_w;
-  CONSTANT c_channel_offset : NATURAL := c_bsn_offset+c_bsn_w;
-
   CONSTANT c_sop_offset     : NATURAL := g_nof_bytes*c_byte_w;
   CONSTANT c_eop_offset     : NATURAL := g_nof_bytes*c_byte_w+1;
   CONSTANT c_sync_offset    : NATURAL := g_nof_bytes*c_byte_w+2;
-  CONSTANT c_empty_offset : NATURAL := c_byte_w*(g_nof_bytes+1);
+  CONSTANT c_empty_high     : NATURAL := c_byte_w*(g_nof_bytes+1);
+  CONSTANT c_err_offset     : NATURAL := c_byte_w*(g_nof_bytes+1);
+  CONSTANT c_bsn_offset     : NATURAL := c_err_offset+c_err_w;
+  CONSTANT c_channel_offset : NATURAL := c_bsn_offset+c_bsn_w;
 
   SIGNAL dp_latency_adapter_tx_snk_in_arr  : t_dp_sosi_arr(g_nof_streams-1 DOWNTO 0); 
   SIGNAL dp_latency_adapter_tx_snk_out_arr : t_dp_siso_arr(g_nof_streams-1 DOWNTO 0);
@@ -200,7 +199,7 @@ BEGIN
     kernel_src_out_arr(stream).data(c_sop_offset)  <= dp_latency_adapter_tx_src_out_arr(stream).sop;
     kernel_src_out_arr(stream).data(c_eop_offset)  <= dp_latency_adapter_tx_src_out_arr(stream).eop;
     kernel_src_out_arr(stream).data(c_sync_offset) <= dp_latency_adapter_tx_src_out_arr(stream).sync WHEN g_use_sync ELSE '0';
-    kernel_src_out_arr(stream).data(c_empty_offset-1 DOWNTO c_empty_offset-c_empty_w) <= dp_latency_adapter_tx_src_out_arr(stream).empty(c_empty_w-1 DOWNTO 0);
+    kernel_src_out_arr(stream).data(c_empty_high-1 DOWNTO c_empty_high-c_empty_w) <= dp_latency_adapter_tx_src_out_arr(stream).empty(c_empty_w-1 DOWNTO 0);
     kernel_src_out_arr(stream).valid <= dp_latency_adapter_tx_src_out_arr(stream).valid;
     dp_latency_adapter_tx_src_in_arr(stream).ready <= kernel_src_in_arr(stream).ready;
     dp_latency_adapter_tx_src_in_arr(stream).xon <= '1';
@@ -245,10 +244,10 @@ BEGIN
     END GENERATE;
 
     -- Assign correct data fields to control signals.
-    dp_latency_adapter_rx_snk_in_arr(stream).sop <= kernel_snk_in_arr(stream).data(c_byte_w*g_nof_bytes+0);
-    dp_latency_adapter_rx_snk_in_arr(stream).eop <= kernel_snk_in_arr(stream).data(c_byte_w*g_nof_bytes+1);
-    dp_latency_adapter_rx_snk_in_arr(stream).sync <= kernel_snk_in_arr(stream).data(c_byte_w*g_nof_bytes+2) WHEN g_use_sync ELSE '0';
-    dp_latency_adapter_rx_snk_in_arr(stream).empty(c_empty_w-1 DOWNTO 0) <= kernel_snk_in_arr(stream).data(c_byte_w*(g_nof_bytes+1)-1 DOWNTO c_byte_w*(g_nof_bytes+1)-c_empty_w);
+    dp_latency_adapter_rx_snk_in_arr(stream).sop <= kernel_snk_in_arr(stream).data(c_sop_offset);
+    dp_latency_adapter_rx_snk_in_arr(stream).eop <= kernel_snk_in_arr(stream).data(c_eop_offset);
+    dp_latency_adapter_rx_snk_in_arr(stream).sync <= kernel_snk_in_arr(stream).data(c_sync_offset) WHEN g_use_sync ELSE '0';
+    dp_latency_adapter_rx_snk_in_arr(stream).empty(c_empty_w-1 DOWNTO 0) <= kernel_snk_in_arr(stream).data(c_empty_high-1 DOWNTO c_empty_high-c_empty_w);
     dp_latency_adapter_rx_snk_in_arr(stream).valid <= kernel_snk_in_arr(stream).valid;
     kernel_snk_out_arr(stream).ready <= dp_latency_adapter_rx_snk_out_arr(stream).ready; -- Flow control towards source 
     kernel_snk_out_arr(stream).xon <= dp_latency_adapter_rx_snk_out_arr(stream).xon;