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RTSD
HDL
Commits
de1680ae
Commit
de1680ae
authored
3 years ago
by
Eric Kooistra
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Default use round half to even, to have unbiased power values.
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libraries/base/common/src/vhdl/common_requantize.vhd
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libraries/base/common/src/vhdl/common_requantize.vhd
libraries/base/dp/src/vhdl/dp_requantize.vhd
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libraries/base/dp/src/vhdl/dp_requantize.vhd
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