Skip to content
Snippets Groups Projects
Commit de029b85 authored by Eric Kooistra's avatar Eric Kooistra
Browse files

Ported tse_sgmii_lvds v9.1 from $UNB to ip_stratix_tse_sgmii_lvds in $RADIOHDL.

parent 0cdf162d
No related branches found
No related tags found
No related merge requests found
Expand all Hide whitespace changes
Inline Side-by-side
Showing
with 21511 additions and 0 deletions
libraries/technology/ip_stratixiv/tse_sgmii_lvds/ip_stratixiv_tse_sgmii_lvds.qip 0 → 100644
+ 161
− 0
View file @ de029b85
set_global_assignment -name IP_TOOL_NAME "Triple Speed Ethernet"
set_global_assignment -name IP_TOOL_VERSION "9.1"
set_global_assignment -name VHDL_FILE [file join $::quartus(qip_path) "ip_stratixiv_tse_sgmii_lvds.vhd"]
set_global_assignment -name SEARCH_PATH [file join $::quartus(qip_path) "." ]
set_global_assignment -name SEARCH_PATH [file join $::quartus(qip_path) triple_speed_ethernet-library ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_align_sync.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_alt2gxb_arriagx.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_alt2gxb_basic.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_alt2gxb_gige.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_alt4gxb_gige.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_altgx_civgx_gige.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_altshifttaps.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_altsyncram_dpm_fifo.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_a_fifo_13.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_a_fifo_24.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_a_fifo_34.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_a_fifo_opt_1246.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_a_fifo_opt_14_44.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_a_fifo_opt_36_10.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_bin_cnt.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_carrier_sense.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_clk_cntl.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_clk_gen.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_colision_detect.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_crc328checker.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_crc328generator.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_crc32ctl8.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_crc32galois8.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_dc_fifo.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_dec10b8b.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_dec_func.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_dpram_16x32.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_dpram_8x32.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_enc8b10b.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_fifoless_mac_rx.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_fifoless_mac_tx.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_fifoless_retransmit_cntl.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_geth_pcs_wo_ratematch.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_gige_reset_ctrl.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_gmii_io.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_gray_cnt.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_gxb_aligned_rxsync.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_gxb_gige_inst.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_hashing.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_host_control.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_host_control_small.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_lb_read_cntl.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_lb_wrt_cntl.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_lfsr_10.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_loopback_ff.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_mac.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_mac_control.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_mac_pcs.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_mac_pcs_gige_woff.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_mac_pcs_pma.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_mac_pcs_pma_ena.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_mac_pcs_pma_gige.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_mac_pcs_pma_strx_gx_ena.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_mac_pcs_woff.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_mac_rx.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_mac_tx.v ]
set_global_assignment -name OCP_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_mac_woff.ocp ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_mac_woff.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_magic_detection.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_mdio.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_mdio_clk_gen.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_mdio_cntl.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_mdio_reg.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_mii_rx_if.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_mii_rx_if_pcs.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_mii_tx_if.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_mii_tx_if_pcs.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_multi_channel_arbiter.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_multi_mac.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_multi_mac_pcs.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_multi_mac_pcs_pma.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_multi_mac_pcs_pma_gige.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_pcs.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_pcs_control.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_pcs_host_control.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_pcs_pma.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_pcs_pma_gige.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_pma_lvds_rx.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_pma_lvds_tx.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_quad_16x32.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_quad_8x32.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_register_map.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_register_map_small.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_retransmit_cntl.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_rgmii_in1.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_rgmii_in4.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_rgmii_module.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_rgmii_out1.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_rgmii_out4.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_rx_converter.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_rx_counter_cntl.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_rx_encapsulation.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_rx_encapsulation_strx_gx.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_rx_ff.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_rx_ff_cntrl.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_rx_ff_cntrl_32.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_rx_ff_cntrl_32_shift16.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_rx_ff_length.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_rx_fifo_rd.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_rx_min_ff.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_rx_stat_extract.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_rx_sync.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_sdpm_altsyncram.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_sdpm_gen.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_sgmii_clk_cntl.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_sgmii_clk_div.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_sgmii_clk_enable.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_sgmii_clk_scheduler.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_shared_mac_control.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_shared_register_map.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_timing_adapter32.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_timing_adapter8.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_timing_adapter_fifo32.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_timing_adapter_fifo8.v ]
set_global_assignment -name OCP_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_top_1000_base_x.ocp ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_top_1000_base_x.v ]
set_global_assignment -name OCP_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_top_1000_base_x_strx_gx.ocp ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_top_1000_base_x_strx_gx.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_top_1geth.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_top_autoneg.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_top_fifoless_1geth.v ]
set_global_assignment -name OCP_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_top_gen_host.ocp ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_top_gen_host.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_top_mdio.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_top_multi_mac.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_top_multi_mac_pcs.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_top_multi_mac_pcs_gige.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_top_pcs.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_top_pcs_strx_gx.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_top_rx.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_top_rx_converter.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_top_sgmii.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_top_sgmii_strx_gx.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_top_tx.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_top_tx_converter.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_top_wo_fifo.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_top_wo_fifo_10_100_1000.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_top_w_fifo.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_top_w_fifo_10_100_1000.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_tx_converter.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_tx_counter_cntl.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_tx_encapsulation.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_tx_ff.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_tx_ff_cntrl.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_tx_ff_cntrl_32.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_tx_ff_cntrl_32_shift16.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_tx_ff_length.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_tx_ff_read_cntl.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_tx_min_ff.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) triple_speed_ethernet-library/altera_tse_tx_stat_extract.v ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) ip_stratixiv_tse_sgmii_lvds.vhd ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) ip_stratixiv_tse_sgmii_lvds.cmp ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) ip_stratixiv_tse_sgmii_lvds.bsf ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) ip_stratixiv_tse_sgmii_lvds.vho ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) ip_stratixiv_tse_sgmii_lvds.qip ]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) ip_stratixiv_tse_sgmii_lvds.html ]
libraries/technology/ip_stratixiv/tse_sgmii_lvds/ip_stratixiv_tse_sgmii_lvds_constraints.tcl 0 → 100644
+ 294
− 0
View file @ de029b85
#####################################################################################
# Copyright (C) 1991-2009 Altera Corporation
# Any megafunction design, and related netlist (encrypted or decrypted),
# support information, device programming or simulation file, and any other
# associated documentation or information provided by Altera or a partner
# under Altera's Megafunction Partnership Program may be used only
# to program PLD devices (but not masked PLD devices) from Altera. Any
# other use of such megafunction design, netlist, support information,
# device programming or simulation file, or any other related documentation
# or information is prohibited for any other purpose, including, but not
# limited to modification, reverse engineering, de-compiling, or use with
# any other silicon devices, unless such use is explicitly licensed under
# a separate agreement with Altera or a megafunction partner. Title to the
# intellectual property, including patents, copyrights, trademarks, trade
# secrets, or maskworks, embodied in any such megafunction design, netlist,
# support information, device programming or simulation file, or any other
# related documentation or information provided by Altera or a megafunction
# partner, remains with Altera, the megafunction partner, or their respective
# licensors. No other licenses, including any licenses needed under any third
# party's intellectual property, are provided herein.
#####################################################################################
#####################################################################################
# Altera Triple-Speed Ethernet Megacore TCL constraint file
#
# Generated on Wed Jun 16 16:45:07 CEST 2010
#
#####################################################################################
# General Option
set IS_SOPC 0
set VARIATION_NAME "ip_stratixiv_tse_sgmii_lvds"
set DEVICE_FAMILY "STRATIXIV"
set FROM_THE_VARIATION_NAME ""
set TO_THE_VARIATION_NAME ""
# MAC Option
set IS_MAC 1
set NUMBER_OF_CHANNEL 1
set IS_SMALLMAC 0
set IS_SMALLMAC_GIGE 0
set IS_FIFOLESS 0
set IS_HALFDUPLEX 0
set MII_INTERFACE "MII_GMII"
# PCS Option
set IS_PCS 1
set IS_SGMII 0
# PMA Option
set IS_PMA 1
set TRANSCEIVER_TYPE 1
# GXB Option
set IS_POWERDOWN 0
if { [ expr ( $IS_SOPC == 1 )] } {
set FROM_THE_VARIATION_NAME "_from_the_$VARIATION_NAME"
set TO_THE_VARIATION_NAME "_to_the_$VARIATION_NAME"
} else {
set FROM_THE_VARIATION_NAME ""
set TO_THE_VARIATION_NAME ""
}
if { [ expr ( $IS_FIFOLESS == 0 )] } {
# macPcs=
if { [ expr ($IS_MAC == 1) && ($IS_PCS == 1) && ($IS_PMA == 0)] } {
#Optimize I/O timing for TBI interface
set_instance_assignment -name FAST_INPUT_REGISTER ON -to tbi_rx_d${TO_THE_VARIATION_NAME}
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to tbi_tx_d${FROM_THE_VARIATION_NAME}
}
# pcs=
if { [ expr ($IS_MAC == 0) && ($IS_PCS == 1) && ($IS_PMA == 0)] } {
#Optimize I/O timing for MII interface
set_instance_assignment -name FAST_INPUT_REGISTER ON -to m_tx_d
set_instance_assignment -name FAST_INPUT_REGISTER ON -to m_tx_en
set_instance_assignment -name FAST_INPUT_REGISTER ON -to m_tx_err
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to m_rx_col
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to m_rx_crs
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to m_rx_d
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to m_rx_en
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to m_rx_err
#Optimize I/O timing for GMII interface
set_instance_assignment -name FAST_INPUT_REGISTER ON -to gm_tx_d
set_instance_assignment -name FAST_INPUT_REGISTER ON -to gm_tx_en
set_instance_assignment -name FAST_INPUT_REGISTER ON -to gm_tx_err
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to gm_rx_d
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to gm_rx_dv
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to gm_rx_err
#Optimize I/O timing for TBI interface
set_instance_assignment -name FAST_INPUT_REGISTER ON -to tbi_rx_d
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to tbi_tx_d
set_instance_assignment -name FAST_INPUT_REGISTER ON -to tbi_rx_d
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to tbi_tx_d
}
# pcsPma=
if { [ expr ($IS_MAC == 0) && ($IS_PCS == 1) && ($IS_PMA == 1)] } {
#Optimize I/O timing for MII interface
set_instance_assignment -name FAST_INPUT_REGISTER ON -to m_tx_d
set_instance_assignment -name FAST_INPUT_REGISTER ON -to m_tx_en
set_instance_assignment -name FAST_INPUT_REGISTER ON -to m_tx_err
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to m_rx_col
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to m_rx_crs
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to m_rx_d
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to m_rx_en
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to m_rx_err
#Optimize I/O timing for GMII interface
set_instance_assignment -name FAST_INPUT_REGISTER ON -to gm_tx_d
set_instance_assignment -name FAST_INPUT_REGISTER ON -to gm_tx_en
set_instance_assignment -name FAST_INPUT_REGISTER ON -to gm_tx_err
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to gm_rx_d
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to gm_rx_dv
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to gm_rx_err
}
# pmaTransceiver=
if { [ expr ($IS_PCS == 1) && ($IS_PMA == 1)] } {
if { [ expr ($TRANSCEIVER_TYPE == 0)] } {
if { [string match $DEVICE_FAMILY "STRATIXIV"]} {
#Optimize I/O timing for serdes interface
set_instance_assignment -name IO_STANDARD "1.4-V PCML" -to txp
set_instance_assignment -name IO_STANDARD "1.4-V PCML" -to rxp
} else {
# pmaTransceiverStratixIV=
#Optimize I/O timing for serdes interface
set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to txp
set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to rxp
}
}
if { [ expr ($TRANSCEIVER_TYPE == 1)] } {
# pmaLvds=
#Constrain MAC PCS reference clock
set_instance_assignment -name GLOBAL_SIGNAL ON -to ref_clk
#Optimize I/O timing for serdes interface
set_instance_assignment -name IO_STANDARD LVDS -to ref_clk
set_instance_assignment -name IO_STANDARD LVDS -to txp
set_instance_assignment -name IO_STANDARD LVDS -to rxp
}
}
# gmii=
if { [ expr ($IS_MAC == 1) && ($IS_PCS == 0) && ($IS_PMA == 0) && ([string match $MII_INTERFACE "MII_GMII"]) ] } {
#Optimize I/O timing for GMII network-side interface
set_instance_assignment -name FAST_INPUT_REGISTER ON -to gm_rx_d
set_instance_assignment -name FAST_INPUT_REGISTER ON -to gm_rx_dv
set_instance_assignment -name FAST_INPUT_REGISTER ON -to gm_rx_err
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to gm_tx_d
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to gm_tx_en
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to gm_tx_err
#Optimize I/O timing for MII network-side interface
set_instance_assignment -name FAST_INPUT_REGISTER ON -to m_rx_col
set_instance_assignment -name FAST_INPUT_REGISTER ON -to m_rx_crs
set_instance_assignment -name FAST_INPUT_REGISTER ON -to m_rx_d
set_instance_assignment -name FAST_INPUT_REGISTER ON -to m_rx_en
set_instance_assignment -name FAST_INPUT_REGISTER ON -to m_rx_err
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to m_tx_d
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to m_tx_en
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to m_tx_err
}
# rgmii=
if { [ expr ($IS_MAC == 1) && ($IS_PCS == 0) && ($IS_PMA == 0) && ([string match $MII_INTERFACE "RGMII"])] } {
#Optimize I/O timing for RGMII network-side interface
set_instance_assignment -name FAST_INPUT_REGISTER ON -to rx_control
set_instance_assignment -name FAST_INPUT_REGISTER ON -to rgmii_in
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to tx_control
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to rgmii_out
}
} else {
if { [ expr ($IS_FIFOLESS == 1) && ($IS_MAC == 1) && ($IS_PCS == 0) && ($IS_PMA == 0) ] } {
set_instance_assignment -name GLOBAL_SIGNAL "GLOBAL CLOCK" -to clk${TO_THE_VARIATION_NAME}
set_instance_assignment -name GLOBAL_SIGNAL ON -to reset${TO_THE_VARIATION_NAME}
for {set x 0} {$x < $NUMBER_OF_CHANNEL} {incr x} {
if { [ expr [string match $MII_INTERFACE "MII_GMII"] ] } {
#Optimize I/O timing for MII network-side interface
if { [ expr $IS_HALFDUPLEX == 1 ] } {
set_instance_assignment -name FAST_INPUT_REGISTER ON -to m_rx_col_${x}${TO_THE_VARIATION_NAME}
set_instance_assignment -name FAST_INPUT_REGISTER ON -to m_rx_crs_${x}${TO_THE_VARIATION_NAME}
}
set_instance_assignment -name FAST_INPUT_REGISTER ON -to m_rx_d_${x}${TO_THE_VARIATION_NAME}
set_instance_assignment -name FAST_INPUT_REGISTER ON -to m_rx_en_${x}${TO_THE_VARIATION_NAME}
set_instance_assignment -name FAST_INPUT_REGISTER ON -to m_rx_err_${x}${TO_THE_VARIATION_NAME}
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to m_tx_d_${x}${FROM_THE_VARIATION_NAME}
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to m_tx_en_${x}${FROM_THE_VARIATION_NAME}
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to m_tx_err_${x}${FROM_THE_VARIATION_NAME}
#Optimize I/O timing for GMII network-side interface
set_instance_assignment -name FAST_INPUT_REGISTER ON -to gm_rx_d_${x}${TO_THE_VARIATION_NAME}
set_instance_assignment -name FAST_INPUT_REGISTER ON -to gm_rx_dv_${x}${TO_THE_VARIATION_NAME}
set_instance_assignment -name FAST_INPUT_REGISTER ON -to gm_rx_err_${x}${TO_THE_VARIATION_NAME}
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to gm_tx_d_${x}${FROM_THE_VARIATION_NAME}
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to gm_tx_en_${x}${FROM_THE_VARIATION_NAME}
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to gm_tx_err_${x}${FROM_THE_VARIATION_NAME}
set_instance_assignment -name GLOBAL_SIGNAL "REGIONAL CLOCK" -to rx_clk_${x}${TO_THE_VARIATION_NAME}
set_instance_assignment -name GLOBAL_SIGNAL "REGIONAL CLOCK" -to tx_clk_${x}${TO_THE_VARIATION_NAME}
}
if { [ expr [string match $MII_INTERFACE "RGMII"] ] } {
#Optimize I/O timing for RGMII network-side interface
set_instance_assignment -name FAST_INPUT_REGISTER ON -to rx_control_${x}${TO_THE_VARIATION_NAME}
set_instance_assignment -name FAST_INPUT_REGISTER ON -to rgmii_in_${x}${TO_THE_VARIATION_NAME}
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to tx_control_${x}${FROM_THE_VARIATION_NAME}
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to rgmii_out_${x}${FROM_THE_VARIATION_NAME}
set_instance_assignment -name GLOBAL_SIGNAL "REGIONAL CLOCK" -to rx_clk_${x}${TO_THE_VARIATION_NAME}
#set_instance_assignment -name GLOBAL_SIGNAL "GLOBAL CLOCK" -to tx_clk_${x}${TO_THE_VARIATION_NAME}
}
}
}
if { [ expr ($IS_FIFOLESS == 1) && ($IS_MAC == 1) && ($IS_PCS == 1) && ($IS_PMA == 0) ] } {
set_instance_assignment -name GLOBAL_SIGNAL "GLOBAL CLOCK" -to clk${TO_THE_VARIATION_NAME}
set_instance_assignment -name GLOBAL_SIGNAL ON -to reset${TO_THE_VARIATION_NAME}
set_instance_assignment -name GLOBAL_SIGNAL "GLOBAL CLOCK" -to ref_clk${TO_THE_VARIATION_NAME}
for {set x 0} {$x < $NUMBER_OF_CHANNEL} {incr x} {
#Optimize I/O timing for TBI interface
set_instance_assignment -name FAST_INPUT_REGISTER ON -to tbi_rx_d_${x}${TO_THE_VARIATION_NAME}
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to tbi_tx_d_${x}${FROM_THE_VARIATION_NAME}
set_instance_assignment -name GLOBAL_SIGNAL "REGIONAL CLOCK" -to tbi_rx_clk_${x}${FROM_THE_VARIATION_NAME}
}
}
if { [ expr ($IS_FIFOLESS == 1) && ($IS_MAC == 1) && ($IS_PCS == 1) && ($IS_PMA == 1) ] } {
set_instance_assignment -name GLOBAL_SIGNAL "GLOBAL CLOCK" -to clk${TO_THE_VARIATION_NAME}
set_instance_assignment -name GLOBAL_SIGNAL ON -to reset${TO_THE_VARIATION_NAME}
set_instance_assignment -name GLOBAL_SIGNAL "GLOBAL CLOCK" -to ref_clk${TO_THE_VARIATION_NAME}
}
if { [ expr ($IS_FIFOLESS == 1) && ($IS_MAC == 1) && ($IS_PCS == 1) && ($IS_PMA == 1) && ($TRANSCEIVER_TYPE == 0) ] } {
for {set x 0} {$x < $NUMBER_OF_CHANNEL} {incr x} {
if { [string match $DEVICE_FAMILY "STRATIXIV"]} {
#Optimize I/O timing for serdes interface
set_instance_assignment -name IO_STANDARD "1.4-V PCML" -to txp_${x}${FROM_THE_VARIATION_NAME}
set_instance_assignment -name IO_STANDARD "1.4-V PCML" -to rxp_${x}${TO_THE_VARIATION_NAME}
} else {
#Optimize I/O timing for serdes interface
set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to txp_${x}${FROM_THE_VARIATION_NAME}
set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to rxp_${x}${TO_THE_VARIATION_NAME}
}
}
}
if { [ expr ($IS_FIFOLESS == 1) && ($IS_MAC == 1) && ($IS_PCS == 1) && ($IS_PMA == 1) && ($TRANSCEIVER_TYPE == 1) ] } {
set_instance_assignment -name IO_STANDARD LVDS -to ref_clk${TO_THE_VARIATION_NAME}
for {set x 0} {$x < $NUMBER_OF_CHANNEL} {incr x} {
set_instance_assignment -name IO_STANDARD LVDS -to txp_${x}${FROM_THE_VARIATION_NAME}
set_instance_assignment -name IO_STANDARD LVDS -to rxp_${x}${TO_THE_VARIATION_NAME}
}
}
}
export_assignments
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Please register or to comment