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Commit dd01778f authored by Eric Kooistra's avatar Eric Kooistra
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Merge branch 'master' into L2SDP-760

parents a7c7653c e162e5a8
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1 merge request!261Resolve L2SDP-760
Pipeline #31896 passed
...@@ -92,11 +92,16 @@ number_of_columns = 13 ...@@ -92,11 +92,16 @@ number_of_columns = 13
- - - - rx_lane_ctrl_7 0x00070008 1 RW uint32 b[2:0] - - - - - - - rx_lane_ctrl_7 0x00070008 1 RW uint32 b[2:0] - - -
- - - - rx_dll_ctrl 0x00070014 1 RW uint32 b[16:0] - - - - - - - rx_dll_ctrl 0x00070014 1 RW uint32 b[16:0] - - -
- - - - rx_syncn_sysref_ctrl 0x00070015 1 RW uint32 b[24:0] - - - - - - - rx_syncn_sysref_ctrl 0x00070015 1 RW uint32 b[24:0] - - -
- - - - rx_csr_sysref_always_on 0x00070015 1 RW uint32 b[1:1] - - - - - - - rx_csr_link_reinit 0x00070015 1 RW uint32 b[0:0] - - -
- - - - rx_csr_sysref_alwayson 0x00070015 1 RW uint32 b[1:1] - - -
- - - - rx_csr_sysref_singled 0x00070015 1 RW uint32 b[2:2] - - -
- - - - rx_csr_rbd_offset 0x00070015 1 RW uint32 b[10:3] - - - - - - - rx_csr_rbd_offset 0x00070015 1 RW uint32 b[10:3] - - -
- - - - rx_csr_lmfc_offset 0x00070015 1 RW uint32 b[19:12] - - - - - - - rx_csr_lmfc_offset 0x00070015 1 RW uint32 b[19:12] - - -
- - - - ctrl_reserve 0x00070016 1 RO uint32 b[31:0] - - -
- - - - rx_err0 0x00070018 1 RW uint32 b[8:0] - - - - - - - rx_err0 0x00070018 1 RW uint32 b[8:0] - - -
- - - - rx_err1 0x00070019 1 RW uint32 b[9:0] - - - - - - - rx_err1 0x00070019 1 RW uint32 b[9:0] - - -
- - - - rx_err_enable 0x0007001d 1 RW uint32 b[31:0] - - -
- - - - rx_err_link_reinit 0x0007001e 1 RW uint32 b[31:0] - - -
- - - - csr_dev_syncn 0x00070020 1 RO uint32 b[0:0] - - - - - - - csr_dev_syncn 0x00070020 1 RO uint32 b[0:0] - - -
- - - - csr_rbd_count 0x00070020 1 RO uint32 b[10:3] - - - - - - - csr_rbd_count 0x00070020 1 RO uint32 b[10:3] - - -
- - - - rx_status1 0x00070021 1 RW uint32 b[23:0] - - - - - - - rx_status1 0x00070021 1 RW uint32 b[23:0] - - -
......
...@@ -92,11 +92,16 @@ number_of_columns = 13 ...@@ -92,11 +92,16 @@ number_of_columns = 13
- - - - rx_lane_ctrl_7 0x00042008 1 RW uint32 b[2:0] - - - - - - - rx_lane_ctrl_7 0x00042008 1 RW uint32 b[2:0] - - -
- - - - rx_dll_ctrl 0x00042014 1 RW uint32 b[16:0] - - - - - - - rx_dll_ctrl 0x00042014 1 RW uint32 b[16:0] - - -
- - - - rx_syncn_sysref_ctrl 0x00042015 1 RW uint32 b[24:0] - - - - - - - rx_syncn_sysref_ctrl 0x00042015 1 RW uint32 b[24:0] - - -
- - - - rx_csr_sysref_always_on 0x00042015 1 RW uint32 b[1:1] - - - - - - - rx_csr_link_reinit 0x00042015 1 RW uint32 b[0:0] - - -
- - - - rx_csr_sysref_alwayson 0x00042015 1 RW uint32 b[1:1] - - -
- - - - rx_csr_sysref_singled 0x00042015 1 RW uint32 b[2:2] - - -
- - - - rx_csr_rbd_offset 0x00042015 1 RW uint32 b[10:3] - - - - - - - rx_csr_rbd_offset 0x00042015 1 RW uint32 b[10:3] - - -
- - - - rx_csr_lmfc_offset 0x00042015 1 RW uint32 b[19:12] - - - - - - - rx_csr_lmfc_offset 0x00042015 1 RW uint32 b[19:12] - - -
- - - - ctrl_reserve 0x00042016 1 RO uint32 b[31:0] - - -
- - - - rx_err0 0x00042018 1 RW uint32 b[8:0] - - - - - - - rx_err0 0x00042018 1 RW uint32 b[8:0] - - -
- - - - rx_err1 0x00042019 1 RW uint32 b[9:0] - - - - - - - rx_err1 0x00042019 1 RW uint32 b[9:0] - - -
- - - - rx_err_enable 0x0004201d 1 RW uint32 b[31:0] - - -
- - - - rx_err_link_reinit 0x0004201e 1 RW uint32 b[31:0] - - -
- - - - csr_dev_syncn 0x00042020 1 RO uint32 b[0:0] - - - - - - - csr_dev_syncn 0x00042020 1 RO uint32 b[0:0] - - -
- - - - csr_rbd_count 0x00042020 1 RO uint32 b[10:3] - - - - - - - csr_rbd_count 0x00042020 1 RO uint32 b[10:3] - - -
- - - - rx_status1 0x00042021 1 RW uint32 b[23:0] - - - - - - - rx_status1 0x00042021 1 RW uint32 b[23:0] - - -
......
...@@ -92,11 +92,16 @@ number_of_columns = 13 ...@@ -92,11 +92,16 @@ number_of_columns = 13
- - - - rx_lane_ctrl_7 0x00070008 1 RW uint32 b[2:0] - - - - - - - rx_lane_ctrl_7 0x00070008 1 RW uint32 b[2:0] - - -
- - - - rx_dll_ctrl 0x00070014 1 RW uint32 b[16:0] - - - - - - - rx_dll_ctrl 0x00070014 1 RW uint32 b[16:0] - - -
- - - - rx_syncn_sysref_ctrl 0x00070015 1 RW uint32 b[24:0] - - - - - - - rx_syncn_sysref_ctrl 0x00070015 1 RW uint32 b[24:0] - - -
- - - - rx_csr_sysref_always_on 0x00070015 1 RW uint32 b[1:1] - - - - - - - rx_csr_link_reinit 0x00070015 1 RW uint32 b[0:0] - - -
- - - - rx_csr_sysref_alwayson 0x00070015 1 RW uint32 b[1:1] - - -
- - - - rx_csr_sysref_singled 0x00070015 1 RW uint32 b[2:2] - - -
- - - - rx_csr_rbd_offset 0x00070015 1 RW uint32 b[10:3] - - - - - - - rx_csr_rbd_offset 0x00070015 1 RW uint32 b[10:3] - - -
- - - - rx_csr_lmfc_offset 0x00070015 1 RW uint32 b[19:12] - - - - - - - rx_csr_lmfc_offset 0x00070015 1 RW uint32 b[19:12] - - -
- - - - ctrl_reserve 0x00070016 1 RO uint32 b[31:0] - - -
- - - - rx_err0 0x00070018 1 RW uint32 b[8:0] - - - - - - - rx_err0 0x00070018 1 RW uint32 b[8:0] - - -
- - - - rx_err1 0x00070019 1 RW uint32 b[9:0] - - - - - - - rx_err1 0x00070019 1 RW uint32 b[9:0] - - -
- - - - rx_err_enable 0x0007001d 1 RW uint32 b[31:0] - - -
- - - - rx_err_link_reinit 0x0007001e 1 RW uint32 b[31:0] - - -
- - - - csr_dev_syncn 0x00070020 1 RO uint32 b[0:0] - - - - - - - csr_dev_syncn 0x00070020 1 RO uint32 b[0:0] - - -
- - - - csr_rbd_count 0x00070020 1 RO uint32 b[10:3] - - - - - - - csr_rbd_count 0x00070020 1 RO uint32 b[10:3] - - -
- - - - rx_status1 0x00070021 1 RW uint32 b[23:0] - - - - - - - rx_status1 0x00070021 1 RW uint32 b[23:0] - - -
......
...@@ -92,11 +92,16 @@ number_of_columns = 13 ...@@ -92,11 +92,16 @@ number_of_columns = 13
- - - - rx_lane_ctrl_7 0x00042008 1 RW uint32 b[2:0] - - - - - - - rx_lane_ctrl_7 0x00042008 1 RW uint32 b[2:0] - - -
- - - - rx_dll_ctrl 0x00042014 1 RW uint32 b[16:0] - - - - - - - rx_dll_ctrl 0x00042014 1 RW uint32 b[16:0] - - -
- - - - rx_syncn_sysref_ctrl 0x00042015 1 RW uint32 b[24:0] - - - - - - - rx_syncn_sysref_ctrl 0x00042015 1 RW uint32 b[24:0] - - -
- - - - rx_csr_sysref_always_on 0x00042015 1 RW uint32 b[1:1] - - - - - - - rx_csr_link_reinit 0x00042015 1 RW uint32 b[0:0] - - -
- - - - rx_csr_sysref_alwayson 0x00042015 1 RW uint32 b[1:1] - - -
- - - - rx_csr_sysref_singled 0x00042015 1 RW uint32 b[2:2] - - -
- - - - rx_csr_rbd_offset 0x00042015 1 RW uint32 b[10:3] - - - - - - - rx_csr_rbd_offset 0x00042015 1 RW uint32 b[10:3] - - -
- - - - rx_csr_lmfc_offset 0x00042015 1 RW uint32 b[19:12] - - - - - - - rx_csr_lmfc_offset 0x00042015 1 RW uint32 b[19:12] - - -
- - - - ctrl_reserve 0x00042016 1 RO uint32 b[31:0] - - -
- - - - rx_err0 0x00042018 1 RW uint32 b[8:0] - - - - - - - rx_err0 0x00042018 1 RW uint32 b[8:0] - - -
- - - - rx_err1 0x00042019 1 RW uint32 b[9:0] - - - - - - - rx_err1 0x00042019 1 RW uint32 b[9:0] - - -
- - - - rx_err_enable 0x0004201d 1 RW uint32 b[31:0] - - -
- - - - rx_err_link_reinit 0x0004201e 1 RW uint32 b[31:0] - - -
- - - - csr_dev_syncn 0x00042020 1 RO uint32 b[0:0] - - - - - - - csr_dev_syncn 0x00042020 1 RO uint32 b[0:0] - - -
- - - - csr_rbd_count 0x00042020 1 RO uint32 b[10:3] - - - - - - - csr_rbd_count 0x00042020 1 RO uint32 b[10:3] - - -
- - - - rx_status1 0x00042021 1 RW uint32 b[23:0] - - - - - - - rx_status1 0x00042021 1 RW uint32 b[23:0] - - -
......
...@@ -427,8 +427,7 @@ then: ...@@ -427,8 +427,7 @@ then:
13 git clone https://git.astron.nl/desp/radiohdl 13 git clone https://git.astron.nl/desp/radiohdl
14 git clone https://git.astron.nl/desp/args 14 git clone https://git.astron.nl/desp/args
15 git clone https://git.astron.nl/desp/upe_gear 15 git clone https://git.astron.nl/desp/upe_gear
37 . ./init_sdptr.sh 37 initsdp
19 . ./init_upe.sh
scp ~/.gitconfig kooistra@dop386:/home/kooistra # for default git user name and user email scp ~/.gitconfig kooistra@dop386:/home/kooistra # for default git user name and user email
...@@ -841,6 +840,9 @@ https://linuxize.com/ ...@@ -841,6 +840,9 @@ https://linuxize.com/
> passwd > passwd
# If login does not source .bashrc, then set bash as default shell and relogin
chsh -s /bin/bash
# Linux update via # Linux update via
# - system updates available icon and notifications icon in toolbar # - system updates available icon and notifications icon in toolbar
# - of via command line: # - of via command line:
......
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