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Commit d3e97ad8 authored by Eric Kooistra's avatar Eric Kooistra
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Corrected -label.

parent 4a5a2be6
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...@@ -141,7 +141,7 @@ for lib_dict in cm.listify(test_dicts): ...@@ -141,7 +141,7 @@ for lib_dict in cm.listify(test_dicts):
fp.write('onerror {quit}\n') fp.write('onerror {quit}\n')
# Use when -label tb_end to stop a tb or multi tb_tb that cannot be stopped by stopping all clocks # Use when -label tb_end to stop a tb or multi tb_tb that cannot be stopped by stopping all clocks
fp.write("when -label tb_end {tb_end == '1'} {\n") fp.write("when -label tb_end {tb_end == '1'} {\n")
fp.write(' echo "End of simulation due to -lable";\n') fp.write(' echo "End of simulation due to -label";\n')
fp.write(' echo ">>> SIMULATION END %s (Now = $Now)";\n' % tb_name) fp.write(' echo ">>> SIMULATION END %s (Now = $Now)";\n' % tb_name)
fp.write(' quit;\n') fp.write(' quit;\n')
fp.write('}\n') fp.write('}\n')
...@@ -168,16 +168,16 @@ for lib_dict in cm.listify(test_dicts): ...@@ -168,16 +168,16 @@ for lib_dict in cm.listify(test_dicts):
# . The tb_end is or-ed with the clocks, so tb_end <='1' stops all toggling and this ends the tb (see any tb, e.g. tb_dp_split.vhd) # . The tb_end is or-ed with the clocks, so tb_end <='1' stops all toggling and this ends the tb (see any tb, e.g. tb_dp_split.vhd)
# . For components that have some self ocillation the toggling does not stop so then: # . For components that have some self ocillation the toggling does not stop so then:
# - for manual tests in the GUI 'REPORT "Tb simulation finished." SEVERITY FAILURE' in the tb VHDL is used to stop the tb simulation # - for manual tests in the GUI 'REPORT "Tb simulation finished." SEVERITY FAILURE' in the tb VHDL is used to stop the tb simulation
# - for regression tests the "when -lable tb_end='1'" in the do file is used to stop the tb simulation # - for regression tests the "when -label tb_end='1'" in the do file is used to stop the tb simulation
# To make this scheme work it is neccessary to have some WAIT time between tb_end <='1' and the FAILURE. # To make this scheme work it is neccessary to have some WAIT time between tb_end <='1' and the FAILURE.
# . For multi tb_tb there needs to be a top level tb_end signal, even if it is not used, to ensure that the "when -lable tb_end='1'" # . For multi tb_tb there needs to be a top level tb_end signal, even if it is not used, to ensure that the "when -label tb_end='1'"
# can be applied (see e.g. tb_tb_mms_diag_block_gen.vhd). # can be applied (see e.g. tb_tb_mms_diag_block_gen.vhd).
# . For multi tb_tb that rely on the FAILURE to end the simulation there is a top level tb_end_vec signal that needs to be used to # . For multi tb_tb that rely on the FAILURE to end the simulation there is a top level tb_end_vec signal that needs to be used to
# raise a top level tb_end <= '1' when all sub tb have ended (see e.g. tb_tb_tech_mac_10g.vhd). # raise a top level tb_end <= '1' when all sub tb have ended (see e.g. tb_tb_tech_mac_10g.vhd).
# #
# Remarks on checking for 'Error' and 'Failure' to detect whether a tb has failed: # Remarks on checking for 'Error' and 'Failure' to detect whether a tb has failed:
# Make sure the tb has some WAIT time between "tb_end <= '1'" and 'REPORT "Tb simulation finished." SEVERITY FAILURE'. # Make sure the tb has some WAIT time between "tb_end <= '1'" and 'REPORT "Tb simulation finished." SEVERITY FAILURE'.
# The tb_end will stop the tb in the regression test (via when -lable tb_end='1') and the FAILURE will stop the tb # The tb_end will stop the tb in the regression test (via when -label tb_end='1') and the FAILURE will stop the tb
# in manual simulation in the GUI. The advantage is that the regression test can check also on 'Failure' to detect # in manual simulation in the GUI. The advantage is that the regression test can check also on 'Failure' to detect
# whether a tb has failed. # whether a tb has failed.
...@@ -251,7 +251,7 @@ if hdl_args.run: ...@@ -251,7 +251,7 @@ if hdl_args.run:
try: try:
sim_end = subprocess.check_output("egrep '>>> SIMULATION END' %s" % transcriptPathName, shell=True) sim_end = subprocess.check_output("egrep '>>> SIMULATION END' %s" % transcriptPathName, shell=True)
except subprocess.CalledProcessError: except subprocess.CalledProcessError:
fp.write('Error occured while running vcom for %s\n' % lib_name) fp.write('Error occured while running vcom or -label for %s\n' % lib_name)
totalNofFailed += 1 totalNofFailed += 1
else: else:
# Log the simulation run time # Log the simulation run time
......
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