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Commit cea27c26 authored by Reinier van der Walle's avatar Reinier van der Walle
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initial commit of sdp_beamformer_remote

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-------------------------------------------------------------------------------
--
-- Copyright 2020
-- ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
-- P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
--
-- Licensed under the Apache License, Version 2.0 (the "License");
-- you may not use this file except in compliance with the License.
-- You may obtain a copy of the License at
--
-- http://www.apache.org/licenses/LICENSE-2.0
--
-- Unless required by applicable law or agreed to in writing, software
-- distributed under the License is distributed on an "AS IS" BASIS,
-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-- See the License for the specific language governing permissions and
-- limitations under the License.
--
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
--
-- Author: R. van der Walle
-- Purpose:
-- . Implements the functionality of beamformer_local in node_sdp_beamformer.
-- Description:
-- The local BF function weights the subbands from the S_pn signal inputs and
-- adds them to form the local beamlet sum.
-- Remark:
-- .
-------------------------------------------------------------------------------
LIBRARY IEEE, common_lib, dp_lib;
USE IEEE.STD_LOGIC_1164.ALL;
USE common_lib.common_pkg.ALL;
USE common_lib.common_mem_pkg.ALL;
USE dp_lib.dp_stream_pkg.ALL;
USE work.sdp_pkg.ALL;
ENTITY sdp_beamformer_remote IS
GENERIC (
g_bf_weights_file_name : STRING := "UNUSED"
);
PORT (
dp_clk : IN STD_LOGIC;
dp_rst : IN STD_LOGIC;
in_sosi_arr : IN t_dp_sosi_arr(c_sdp_P_pfb-1 DOWNTO 0);
out_sosi : OUT t_dp_sosi;
mm_rst : IN STD_LOGIC;
mm_clk : IN STD_LOGIC;
ram_bf_weights_mosi : IN t_mem_mosi := c_mem_mosi_rst;
ram_bf_weights_miso : OUT t_mem_miso
);
END sdp_beamformer_remote;
ARCHITECTURE str OF sdp_beamformer_remote IS
CONSTANT c_data_w : NATURAL := c_nof_complex * c_sdp_W_beamlet_sum;
CONSTANT c_block_size : NATURAL := c_sdp_S_sub_bf * c_sdp_N_pol_bf;
CONSTANT c_fifo_size : NATURAL := 2** ceil_log2((c_block_size * 9) / 16); -- 1 block of 64 bit words rounded to the next power of 2 = 1024.
CONSTANT c_complex_adder_latency : NATURAL := ceil_log2(c_sdp_S_pn);
CONSTANT c_bf_weights_latency : NATURAL := 3;
CONSTANT c_total_latency : NATURAL := 4 + c_bf_weights_latency + c_complex_adder_latency;
CONSTANT c_complex_adder_sum_w : NATURAL := c_sdp_W_bf_product + ceil_log2(c_sdp_S_pn);
SIGNAL sub_sosi_arr : t_dp_sosi_arr(c_sdp_N_pol_bf*c_sdp_P_pfb-1 DOWNTO 0) := (OTHERS => c_dp_sosi_rst);
SIGNAL bf_weights_out_sosi_arr : t_dp_sosi_arr(c_sdp_N_pol_bf*c_sdp_P_pfb-1 DOWNTO 0) := (OTHERS => c_dp_sosi_rst);
SIGNAL bf_weights_x_sosi_arr : t_dp_sosi_arr(c_sdp_P_pfb-1 DOWNTO 0) := (OTHERS => c_dp_sosi_rst);
SIGNAL bf_weights_y_sosi_arr : t_dp_sosi_arr(c_sdp_P_pfb-1 DOWNTO 0) := (OTHERS => c_dp_sosi_rst);
SIGNAL deinterleaved_x_sosi_arr : t_dp_sosi_arr(c_sdp_S_pn-1 DOWNTO 0) := (OTHERS => c_dp_sosi_rst);
SIGNAL deinterleaved_y_sosi_arr : t_dp_sosi_arr(c_sdp_S_pn-1 DOWNTO 0) := (OTHERS => c_dp_sosi_rst);
SIGNAL interleave_out_sosi_arr : t_dp_sosi_arr(c_sdp_S_pn-1 DOWNTO 0) := (OTHERS => c_dp_sosi_rst);
SIGNAL complex_add_out_sosi : t_dp_sosi := c_dp_sosi_rst;
SIGNAL pipelined_in_sosi : t_dp_sosi := c_dp_sosi_rst;
SIGNAL dp_requantize_in_sosi : t_dp_sosi := c_dp_sosi_rst;
BEGIN
dispatch_sosi_arr(0) <= local_bf_sosi;
-- repacking beamlets re/im to data field.
p_wire_local_bf_sosi : PROCESS(local_bf_sosi)
BEGIN
dispatch_sosi_arr(0) <= local_bf_sosi;
dispatch_sosi_arr(0).data(c_sdp_W_beamlet_sum -1 DOWNTO 0) <= local_bf_sosi.re(c_sdp_W_beamlet_sum-1 DOWNTO 0);
dispatch_sosi_arr(0).data(c_nof_complex * c_sdp_W_beamlet_sum -1 DOWNTO c_sdp_W_beamlet_sum) <= local_bf_sosi.im(c_sdp_W_beamlet_sum-1 DOWNTO 0);
END PROCESS;
---------------------------------------------------------------
-- FIFO
---------------------------------------------------------------
u_dp_fifo_sc : ENTITY dp_lib.dp_fifo_sc
GENERIC MAP (
g_data_w => c_longword_w,
g_bsn_w => c_dp_stream_bsn_w,
g_use_bsn => TRUE,
g_use_sync => TRUE,
g_fifo_size => c_fifo_size
)
PORT MAP (
rst => dp_rst,
clk => dp_clk,
snk_in => from_ri_sosi,
src_in => dp_fifo_siso,
src_out => dp_fifo_sosi
);
---------------------------------------------------------------
-- Repack 64b to 36b
---------------------------------------------------------------
u_dp_repack_data_rx : ENTITY dp_lib.dp_repack_data
GENERIC MAP (
g_in_dat_w => c_longword_w,
g_in_nof_words => 9,
g_out_dat_w => c_data_w,
g_out_nof_words => 16,
g_pipeline_ready => TRUE -- Needed for src_in.ready to snk_out.ready.
)
PORT MAP (
rst => dp_rst,
clk => dp_clk,
snk_in => dp_fifo_sosi,
snk_out => dp_fifo_siso,
src_out => dispatch_sosi_arr(1)
);
---------------------------------------------------------------
-- dp_bsn_aligner_v2
---------------------------------------------------------------
u_mmp_dp_bsn_align_v2 : ENTITY dp_lib.mmp_dp_bsn_align_v2
GENERIC MAP(
-- for dp_bsn_align_v2
g_nof_streams => 2,
g_bsn_latency_max => 2,
g_nof_aligners_max => 1,
g_block_size => c_block_size,
g_data_w => c_data_w,
g_use_mm_output => FALSE,
g_rd_latency => 1,
-- for mms_dp_bsn_monitor_v2
g_nof_clk_per_sync => c_sdp_N_clk_sync_timeout, -- Using c_sdp_N_clk_sync_timeout as g_nof_clk_per_sync is used for BSN monitor timeout.
g_nof_input_bsn_monitors => 2,
g_use_bsn_output_monitor => TRUE
)
PORT MAP (
-- Memory-mapped clock domain
mm_rst => mm_rst,
mm_clk => mm_clk,
reg_bsn_align_copi => reg_bsn_align_copi,
reg_bsn_align_cipo => reg_bsn_align_cipo,
reg_input_monitor_copi => reg_bsn_monitor_v2_bsn_align_input_copi,
reg_input_monitor_cipo => reg_bsn_monitor_v2_bsn_align_input_cipo,
reg_output_monitor_copi => reg_bsn_monitor_v2_bsn_align_output_copi,
reg_output_monitor_cipo => reg_bsn_monitor_v2_bsn_align_output_cipo,
-- Streaming clock domain
dp_rst => dp_rst,
dp_clk => dp_clk,
-- Streaming input
in_sosi_arr => dispatch_sosi_arr,
out_sosi_arr => beamlets_data_sosi_arr
);
-- repacking beamlets data to re/im field.
p_wire_beamlets_sosi : PROCESS(beamlets_data_sosi_arr)
BEGIN
beamlets_sosi_arr(0) <= beamlets_data_sosi_arr(0);
beamlets_sosi_arr(1) <= beamlets_data_sosi_arr(1);
beamlets_sosi_arr(0).re(c_sdp_W_beamlet_sum-1 DOWNTO 0) <= beamlets_data_sosi_arr(0).data( c_sdp_W_beamlet_sum -1 DOWNTO 0);
beamlets_sosi_arr(0).im(c_sdp_W_beamlet_sum-1 DOWNTO 0) <= beamlets_data_sosi_arr(0).data(c_nof_complex * c_sdp_W_beamlet_sum -1 DOWNTO c_sdp_W_beamlet_sum);
beamlets_sosi_arr(1).re(c_sdp_W_beamlet_sum-1 DOWNTO 0) <= beamlets_data_sosi_arr(1).data( c_sdp_W_beamlet_sum -1 DOWNTO 0);
beamlets_sosi_arr(1).im(c_sdp_W_beamlet_sum-1 DOWNTO 0) <= beamlets_data_sosi_arr(1).data(c_nof_complex * c_sdp_W_beamlet_sum -1 DOWNTO c_sdp_W_beamlet_sum);
END PROCESS;
---------------------------------------------------------------
-- ADD
---------------------------------------------------------------
u_dp_complex_add : ENTITY dp_lib.dp_complex_add
GENERIC MAP(
g_nof_inputs => 2,
g_data_w => c_sdp_W_beamlet_sum
)
PORT MAP(
rst => dp_rst,
clk => dp_clk,
snk_in_arr => beamlets_sosi_arr,
src_out => i_bf_sum_sosi
);
bf_sum_sosi <= i_bf_sum_sosi;
---------------------------------------------------------------
-- Repack 36b to 64b
---------------------------------------------------------------
-- repacking xsel re/im to data field.
p_wire_xsel_sosi : PROCESS(xsel_sosi)
BEGIN
xsel_data_sosi <= xsel_sosi;
xsel_data_sosi.data( c_sdp_W_crosslet -1 DOWNTO 0) <= xsel_sosi.re(c_sdp_W_crosslet-1 DOWNTO 0);
xsel_data_sosi.data(c_nof_complex * c_sdp_W_crosslet -1 DOWNTO c_sdp_W_crosslet) <= xsel_sosi.im(c_sdp_W_crosslet-1 DOWNTO 0);
END PROCESS;
u_dp_repack_data_local : ENTITY dp_lib.dp_repack_data
GENERIC MAP (
g_in_dat_w => c_data_w,
g_in_nof_words => 16,
g_out_dat_w => c_longword_w,
g_out_nof_words => 9,
g_pipeline_ready => TRUE -- Needed for src_in.ready to snk_out.ready.
)
PORT MAP (
rst => dp_rst,
clk => dp_clk,
snk_in => i_bf_sum_sosi,
src_out => to_ri_sosi_sosi
);
END str;
......@@ -89,7 +89,7 @@ ENTITY mmp_dp_bsn_align_v2 IS
mm_copi : IN t_mem_copi := c_mem_copi_rst; -- read access to output block, all output streams share same mm_copi
mm_cipo_arr : OUT t_mem_cipo_arr(g_nof_streams-1 DOWNTO 0);
-- Output via streaming DP interface, when g_use_mm_output = TRUE.
-- Output via streaming DP interface, when g_use_mm_output = FALSE.
out_sosi_arr : OUT t_dp_sosi_arr(g_nof_streams-1 DOWNTO 0)
);
END mmp_dp_bsn_align_v2;
......
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