format correction

libraries/base/dp/src/vhdl/dp_block_validate_bsn_at_sync.vhd

@@ -194,7 +194,7 @@ BEGIN
   bsn_at_sync <= bs_sosi.bsn WHEN bs_sosi.sync = '1' ELSE bsn_at_sync_reg;
 
   bsn_ok      <= bsn_ok_reg WHEN in_sosi.sync = '0' OR TO_UINT(in_sosi.channel) /= g_check_channel ELSE 
-                '1'         WHEN in_sosi.bsn = bsn_at_sync ELSE '0';
+                 '1'        WHEN in_sosi.bsn = bsn_at_sync ELSE '0';
 
   out_valid   <= '1'    WHEN in_sosi.sop = '1' AND TO_UINT(in_sosi.channel) /= g_check_channel ELSE
                  bsn_ok WHEN in_sosi.sop = '1' AND TO_UINT(in_sosi.channel) = g_check_channel ELSE