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Commit cb41e048 authored by Reinier van der Walle's avatar Reinier van der Walle
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Merge branch 'L2SDP-854' into 'master' 

added 16G ddr4 IP and created example design.

Closes L2SDP-854

See merge request desp/hdl!290
parents e6769e2e 01fad539
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1 merge request!290added 16G ddr4 IP and created example design.
Pipeline #39080 passed
Stage: simulation
Stage: synthesis
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boards/uniboard2c/designs/refdesigns/ddr4/ip_arria10_e2sg_ddr4_16g_1600_ed.qar 0 → 100644
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boards/uniboard2c/designs/refdesigns/ddr4/unb2c_ed_synth_mb_I_16G.sof.tar.gz 0 → 100644
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boards/uniboard2c/designs/refdesigns/ddr4/unb2c_pins_mbII_ddr4_16g.tcl 0 → 100644
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set_location_assignment PIN_K15 -to CLK
set_location_assignment PIN_J15 -to "CLK(n)"
set_location_assignment PIN_N12 -to ETH_CLK
set_location_assignment PIN_K14 -to PPS
set_location_assignment PIN_J14 -to "PPS(n)"
set_location_assignment PIN_Y36 -to SA_CLK
set_location_assignment PIN_Y35 -to "SA_CLK(n)"
set_location_assignment PIN_AH9 -to SB_CLK
set_location_assignment PIN_AH10 -to "SB_CLK(n)"
set_location_assignment PIN_A29 -to emif_0_mem_mem_a[0]
set_location_assignment PIN_B29 -to emif_0_mem_mem_a[1]
set_location_assignment PIN_H29 -to emif_0_mem_mem_a[2]
set_location_assignment PIN_G29 -to emif_0_mem_mem_a[3]
set_location_assignment PIN_D29 -to emif_0_mem_mem_a[4]
set_location_assignment PIN_E29 -to emif_0_mem_mem_a[5]
set_location_assignment PIN_C29 -to emif_0_mem_mem_a[6]
set_location_assignment PIN_C28 -to emif_0_mem_mem_a[7]
set_location_assignment PIN_E30 -to emif_0_mem_mem_a[8]
set_location_assignment PIN_D30 -to emif_0_mem_mem_a[9]
set_location_assignment PIN_B28 -to emif_0_mem_mem_a[10]
set_location_assignment PIN_A28 -to emif_0_mem_mem_a[11]
set_location_assignment PIN_H27 -to emif_0_mem_mem_a[12]
set_location_assignment PIN_E28 -to emif_0_mem_mem_a[13]
set_location_assignment PIN_K28 -to emif_0_mem_mem_act_n[0]
set_location_assignment PIN_C16 -to emif_0_mem_mem_alert_n[0]
set_location_assignment PIN_C27 -to emif_0_mem_mem_ba[0]
set_location_assignment PIN_A27 -to emif_0_mem_mem_ba[1]
set_location_assignment PIN_B26 -to emif_0_mem_mem_bg[0]
set_location_assignment PIN_L27 -to emif_0_mem_mem_bg[1]
set_location_assignment PIN_F28 -to emif_0_mem_mem_a[15]
set_location_assignment PIN_E24 -to emif_0_mem_mem_dq[64] ;# was: MB_II_CB[0]
set_location_assignment PIN_J25 -to emif_0_mem_mem_dq[65] ;# was: MB_II_CB[1]
set_location_assignment PIN_A25 -to emif_0_mem_mem_dq[66] ;# was: MB_II_CB[2]
set_location_assignment PIN_G25 -to emif_0_mem_mem_dq[67] ;# was: MB_II_CB[3]
set_location_assignment PIN_D25 -to emif_0_mem_mem_dq[68] ;# was: MB_II_CB[4]
set_location_assignment PIN_K25 -to emif_0_mem_mem_dq[69] ;# was: MB_II_CB[5]
set_location_assignment PIN_D24 -to emif_0_mem_mem_dq[70] ;# was: MB_II_CB[6]
set_location_assignment PIN_F25 -to emif_0_mem_mem_dq[71] ;# was: MB_II_CB[7]
set_location_assignment PIN_N27 -to emif_0_mem_mem_ck[0] ;# was: MB_II_CK[0]
set_location_assignment PIN_M28 -to emif_0_mem_mem_ck_n[0] ;# was: MB_II_CK_n[0]
set_location_assignment PIN_K27 -to emif_0_mem_mem_CK[1] ;# was: MB_II_CK[1]
set_location_assignment PIN_J26 -to emif_0_mem_mem_CK_n[1] ;# was: MB_II_CK_n[1]
set_location_assignment PIN_N28 -to emif_0_mem_mem_cke[0] ;# was: MB_II_CKE[0]
set_location_assignment PIN_P26 -to emif_0_mem_mem_cke[1] ;# was: MB_II_CKE[1]
#set_location_assignment PIN_P26 -to cke1_export
set_instance_assignment -name IO_STANDARD "SSTL-12" -to cke1_export
set_location_assignment PIN_K29 -to emif_0_mem_mem_cs_n[0] ;# was: MB_II_CS[0]
set_location_assignment PIN_H26 -to emif_0_mem_mem_cs_n[1]
#set_location_assignment PIN_H26 -to cs1_export
set_instance_assignment -name IO_STANDARD "SSTL-12" -to cs1_export
set_location_assignment PIN_K30 -to emif_0_mem_mem_odt[0]
set_location_assignment PIN_R27 -to emif_0_mem_mem_odt[1]
#set_location_assignment PIN_R27 -to odt1_export
set_instance_assignment -name IO_STANDARD "SSTL-12" -to odt1_export
set_location_assignment PIN_A16 -to emif_0_mem_mem_dbi_n[0] ;# was: MB_II_DM[0]
set_location_assignment PIN_M21 -to emif_0_mem_mem_dbi_n[1] ;# was: MB_II_DM[1]
set_location_assignment PIN_K22 -to emif_0_mem_mem_dbi_n[2] ;# was: MB_II_DM[2]
set_location_assignment PIN_D19 -to emif_0_mem_mem_dbi_n[3] ;# was: MB_II_DM[3]
set_location_assignment PIN_G30 -to emif_0_mem_mem_dbi_n[4] ;# was: MB_II_DM[4]
set_location_assignment PIN_R32 -to emif_0_mem_mem_dbi_n[5] ;# was: MB_II_DM[5]
set_location_assignment PIN_G32 -to emif_0_mem_mem_dbi_n[6] ;# was: MB_II_DM[6]
set_location_assignment PIN_AC32 -to emif_0_mem_mem_dbi_n[7] ;# was: MB_II_DM[7]
set_location_assignment PIN_E25 -to emif_0_mem_mem_dbi_n[8] ;# was: MB_II_DM[8]
set_location_assignment PIN_F17 -to emif_0_mem_mem_dqs[0]
set_location_assignment PIN_L20 -to emif_0_mem_mem_dqs[1]
set_location_assignment PIN_J22 -to emif_0_mem_mem_dqs[2]
set_location_assignment PIN_B19 -to emif_0_mem_mem_dqs[3]
set_location_assignment PIN_L31 -to emif_0_mem_mem_dqs[4]
set_location_assignment PIN_P31 -to emif_0_mem_mem_dqs[5]
set_location_assignment PIN_N33 -to emif_0_mem_mem_dqs[6]
set_location_assignment PIN_T33 -to emif_0_mem_mem_dqs[7]
set_location_assignment PIN_A26 -to emif_0_mem_mem_dqs[8]
set_location_assignment PIN_R28 -to emif_0_mem_mem_par[0]
set_location_assignment PIN_G28 -to emif_0_mem_mem_a[16]
set_location_assignment PIN_J29 -to emif_0_pll_ref_clk_clk
#set_instance_assignment -name IO_STANDARD "SSTL-12" -to emif_0_pll_ref_clk_clk
set_instance_assignment -name IO_STANDARD "1.2 V" -to emif_0_pll_ref_clk_clk
set_location_assignment PIN_L28 -to emif_0_mem_mem_reset_n[0]
set_location_assignment PIN_J27 -to emif_0_oct_oct_rzqin
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_oct_oct_rzqin
#set_instance_assignment -name IO_STANDARD "SSTL-12" -to emif_0_oct_oct_rzqin
set_location_assignment PIN_F27 -to emif_0_mem_mem_a[14]
# qsfp leds
set_location_assignment PIN_BA33 -to emif_0_status_local_cal_fail
set_location_assignment PIN_BB33 -to emif_0_status_local_cal_success
set_location_assignment PIN_AV32 -to emif_0_tg_0_traffic_gen_fail
set_location_assignment PIN_AP31 -to emif_0_tg_0_traffic_gen_pass
set_location_assignment PIN_AT33 -to emif_0_tg_0_traffic_gen_timeout
set_location_assignment PIN_AF32 -to pll_locked_pll_locked
# testio(0)
set_location_assignment PIN_AN32 -to global_reset_reset_n
# testio(1)
set_location_assignment PIN_AP32 -to testio1
set_instance_assignment -name IO_STANDARD "1.8 V" -to testio1
# IO Standard Assignments from Gijs (excluding memory)
set_instance_assignment -name IO_STANDARD "1.8 V" -to ETH_CLK
set_instance_assignment -name IO_STANDARD LVDS -to ETH_SGIN[0]
set_instance_assignment -name IO_STANDARD LVDS -to "ETH_SGIN[0](n)"
set_instance_assignment -name IO_STANDARD LVDS -to ETH_SGIN[1]
set_instance_assignment -name IO_STANDARD LVDS -to "ETH_SGIN[1](n)"
set_instance_assignment -name IO_STANDARD LVDS -to ETH_SGOUT[0]
set_instance_assignment -name IO_STANDARD LVDS -to "ETH_SGOUT[0](n)"
set_instance_assignment -name IO_STANDARD LVDS -to ETH_SGOUT[1]
set_instance_assignment -name IO_STANDARD LVDS -to "ETH_SGOUT[1](n)"
set_instance_assignment -name IO_STANDARD LVDS -to SA_CLK
set_instance_assignment -name IO_STANDARD LVDS -to "SA_CLK(n)"
set_instance_assignment -name IO_STANDARD LVDS -to SB_CLK
set_instance_assignment -name IO_STANDARD LVDS -to "SB_CLK(n)"
set_instance_assignment -name IO_STANDARD LVDS -to BCK_REF_CLK
set_instance_assignment -name IO_STANDARD LVDS -to "BCK_REF_CLK(n)"
set_instance_assignment -name IO_STANDARD "1.8 V" -to TESTIO[0]
set_instance_assignment -name IO_STANDARD "1.8 V" -to TESTIO[1]
set_instance_assignment -name IO_STANDARD "1.8 V" -to TESTIO[2]
set_instance_assignment -name IO_STANDARD "1.8 V" -to TESTIO[3]
set_instance_assignment -name IO_STANDARD "1.8 V" -to TESTIO[4]
set_instance_assignment -name IO_STANDARD "1.8 V" -to TESTIO[5]
set_instance_assignment -name IO_STANDARD "1.8 V" -to VERSION[0]
set_instance_assignment -name IO_STANDARD "1.8 V" -to VERSION[1]
set_instance_assignment -name IO_STANDARD "1.8 V" -to WDI
#set_location_assignment PIN_AN32 -to TESTIO[0]
set_location_assignment PIN_AP32 -to TESTIO[1]
set_location_assignment PIN_AT30 -to TESTIO[2]
set_location_assignment PIN_BD31 -to TESTIO[3]
set_location_assignment PIN_AU30 -to TESTIO[4]
set_location_assignment PIN_BD30 -to TESTIO[5]
set_location_assignment PIN_AB12 -to VERSION[0]
set_location_assignment PIN_AB13 -to VERSION[1]
set_location_assignment PIN_BB30 -to WDI
# locations changed 30 sept
set_location_assignment PIN_K12 -to ETH_SGIN[0]
set_location_assignment PIN_J12 -to "ETH_SGIN[0](n)"
set_location_assignment PIN_AF33 -to ETH_SGIN[1]
set_location_assignment PIN_AE33 -to "ETH_SGIN[1](n)"
set_location_assignment PIN_H13 -to ETH_SGOUT[0]
set_location_assignment PIN_H12 -to "ETH_SGOUT[0](n)"
set_location_assignment PIN_AW31 -to ETH_SGOUT[1]
set_location_assignment PIN_AV31 -to "ETH_SGOUT[1](n)"
set_instance_assignment -name IO_STANDARD LVDS -to PPS
set_instance_assignment -name IO_STANDARD LVDS -to "PPS(n)"
set_instance_assignment -name IO_STANDARD LVDS -to CLK
set_instance_assignment -name IO_STANDARD LVDS -to "CLK(n)"
# Enable internal termination for LVDS inputs
set_instance_assignment -name INPUT_TERMINATION DIFFERENTIAL -to PPS
set_instance_assignment -name INPUT_TERMINATION DIFFERENTIAL -to CLK
set_instance_assignment -name INPUT_TERMINATION DIFFERENTIAL -to ETH_SGIN[0]
set_instance_assignment -name INPUT_TERMINATION DIFFERENTIAL -to ETH_SGIN[1]
set_location_assignment PIN_V9 -to BCK_REF_CLK
set_location_assignment PIN_V10 -to "BCK_REF_CLK(n)"
set_location_assignment PIN_AL32 -to CLKUSR
set_location_assignment PIN_M16 -to MB_EVENT
set_location_assignment PIN_A17 -to emif_0_mem_mem_dq[0]
set_location_assignment PIN_B16 -to emif_0_mem_mem_dq[1]
set_location_assignment PIN_D16 -to emif_0_mem_mem_dq[2]
set_location_assignment PIN_A18 -to emif_0_mem_mem_dq[3]
set_location_assignment PIN_B18 -to emif_0_mem_mem_dq[4]
set_location_assignment PIN_C17 -to emif_0_mem_mem_dq[5]
set_location_assignment PIN_E18 -to emif_0_mem_mem_dq[6]
set_location_assignment PIN_F18 -to emif_0_mem_mem_dq[7]
set_location_assignment PIN_R22 -to emif_0_mem_mem_dq[8]
set_location_assignment PIN_J20 -to emif_0_mem_mem_dq[9]
set_location_assignment PIN_L21 -to emif_0_mem_mem_dq[10]
set_location_assignment PIN_M20 -to emif_0_mem_mem_dq[11]
set_location_assignment PIN_J21 -to emif_0_mem_mem_dq[12]
set_location_assignment PIN_P21 -to emif_0_mem_mem_dq[13]
set_location_assignment PIN_R20 -to emif_0_mem_mem_dq[14]
set_location_assignment PIN_N21 -to emif_0_mem_mem_dq[15]
set_location_assignment PIN_L22 -to emif_0_mem_mem_dq[16]
set_location_assignment PIN_G20 -to emif_0_mem_mem_dq[17]
set_location_assignment PIN_H21 -to emif_0_mem_mem_dq[18]
set_location_assignment PIN_N22 -to emif_0_mem_mem_dq[19]
set_location_assignment PIN_P22 -to emif_0_mem_mem_dq[20]
set_location_assignment PIN_F20 -to emif_0_mem_mem_dq[21]
set_location_assignment PIN_G21 -to emif_0_mem_mem_dq[22]
set_location_assignment PIN_F21 -to emif_0_mem_mem_dq[23]
set_location_assignment PIN_E19 -to emif_0_mem_mem_dq[24]
set_location_assignment PIN_B20 -to emif_0_mem_mem_dq[25]
set_location_assignment PIN_A20 -to emif_0_mem_mem_dq[26]
set_location_assignment PIN_G19 -to emif_0_mem_mem_dq[27]
set_location_assignment PIN_D20 -to emif_0_mem_mem_dq[28]
set_location_assignment PIN_E20 -to emif_0_mem_mem_dq[29]
set_location_assignment PIN_D17 -to emif_0_mem_mem_dq[30]
set_location_assignment PIN_C18 -to emif_0_mem_mem_dq[31]
set_location_assignment PIN_F30 -to emif_0_mem_mem_dq[32]
set_location_assignment PIN_L30 -to emif_0_mem_mem_dq[33]
set_location_assignment PIN_M30 -to emif_0_mem_mem_dq[34]
set_location_assignment PIN_C31 -to emif_0_mem_mem_dq[35]
set_location_assignment PIN_D31 -to emif_0_mem_mem_dq[36]
set_location_assignment PIN_H31 -to emif_0_mem_mem_dq[37]
set_location_assignment PIN_J31 -to emif_0_mem_mem_dq[38]
set_location_assignment PIN_F31 -to emif_0_mem_mem_dq[39]
set_location_assignment PIN_P32 -to emif_0_mem_mem_dq[40]
set_location_assignment PIN_R30 -to emif_0_mem_mem_dq[41]
set_location_assignment PIN_U31 -to emif_0_mem_mem_dq[42]
set_location_assignment PIN_W31 -to emif_0_mem_mem_dq[43]
set_location_assignment PIN_P29 -to emif_0_mem_mem_dq[44]
set_location_assignment PIN_P30 -to emif_0_mem_mem_dq[45]
set_location_assignment PIN_V31 -to emif_0_mem_mem_dq[46]
set_location_assignment PIN_R29 -to emif_0_mem_mem_dq[47]
set_location_assignment PIN_M33 -to emif_0_mem_mem_dq[48]
set_location_assignment PIN_J33 -to emif_0_mem_mem_dq[49]
set_location_assignment PIN_H33 -to emif_0_mem_mem_dq[50]
set_location_assignment PIN_H32 -to emif_0_mem_mem_dq[51]
set_location_assignment PIN_J32 -to emif_0_mem_mem_dq[52]
set_location_assignment PIN_K33 -to emif_0_mem_mem_dq[53]
set_location_assignment PIN_K32 -to emif_0_mem_mem_dq[54]
set_location_assignment PIN_L32 -to emif_0_mem_mem_dq[55]
set_location_assignment PIN_AB33 -to emif_0_mem_mem_dq[56]
set_location_assignment PIN_AA32 -to emif_0_mem_mem_dq[57]
set_location_assignment PIN_W32 -to emif_0_mem_mem_dq[58]
set_location_assignment PIN_U33 -to emif_0_mem_mem_dq[59]
set_location_assignment PIN_Y33 -to emif_0_mem_mem_dq[60]
set_location_assignment PIN_AA33 -to emif_0_mem_mem_dq[61]
set_location_assignment PIN_V33 -to emif_0_mem_mem_dq[62]
set_location_assignment PIN_Y32 -to emif_0_mem_mem_dq[63]
set_location_assignment PIN_E17 -to emif_0_mem_mem_dqs_n[0]
set_location_assignment PIN_K20 -to emif_0_mem_mem_dqs_n[1]
set_location_assignment PIN_H22 -to emif_0_mem_mem_dqs_n[2]
set_location_assignment PIN_C19 -to emif_0_mem_mem_dqs_n[3]
set_location_assignment PIN_M31 -to emif_0_mem_mem_dqs_n[4]
set_location_assignment PIN_N31 -to emif_0_mem_mem_dqs_n[5]
set_location_assignment PIN_P33 -to emif_0_mem_mem_dqs_n[6]
set_location_assignment PIN_T32 -to emif_0_mem_mem_dqs_n[7]
set_location_assignment PIN_B25 -to emif_0_mem_mem_dqs_n[8]
set_location_assignment PIN_AJ31 -to altera_reserved_tck
set_location_assignment PIN_AK18 -to altera_reserved_tdi
set_location_assignment PIN_AH31 -to altera_reserved_ntrst
set_location_assignment PIN_AM29 -to altera_reserved_tdo
#set_location_assignment PIN_AV33 -to ~ALTERA_DATA0~
set_instance_assignment -name IO_STANDARD "SSTL-12" -to emif_0_mem_mem_a[0]
set_instance_assignment -name IO_STANDARD "SSTL-12" -to emif_0_mem_mem_a[1]
set_instance_assignment -name IO_STANDARD "SSTL-12" -to emif_0_mem_mem_a[2]
set_instance_assignment -name IO_STANDARD "SSTL-12" -to emif_0_mem_mem_a[3]
set_instance_assignment -name IO_STANDARD "SSTL-12" -to emif_0_mem_mem_a[4]
set_instance_assignment -name IO_STANDARD "SSTL-12" -to emif_0_mem_mem_a[5]
set_instance_assignment -name IO_STANDARD "SSTL-12" -to emif_0_mem_mem_a[6]
set_instance_assignment -name IO_STANDARD "SSTL-12" -to emif_0_mem_mem_a[7]
set_instance_assignment -name IO_STANDARD "SSTL-12" -to emif_0_mem_mem_a[8]
set_instance_assignment -name IO_STANDARD "SSTL-12" -to emif_0_mem_mem_a[9]
set_instance_assignment -name IO_STANDARD "SSTL-12" -to emif_0_mem_mem_a[10]
set_instance_assignment -name IO_STANDARD "SSTL-12" -to emif_0_mem_mem_a[11]
set_instance_assignment -name IO_STANDARD "SSTL-12" -to emif_0_mem_mem_a[12]
set_instance_assignment -name IO_STANDARD "SSTL-12" -to emif_0_mem_mem_a[13]
set_instance_assignment -name IO_STANDARD "SSTL-12" -to emif_0_mem_mem_act_n[0]
set_instance_assignment -name IO_STANDARD "SSTL-12" -to emif_0_mem_mem_ba[0]
set_instance_assignment -name IO_STANDARD "SSTL-12" -to emif_0_mem_mem_ba[1]
set_instance_assignment -name IO_STANDARD "SSTL-12" -to emif_0_mem_mem_bg[0]
set_instance_assignment -name IO_STANDARD "SSTL-12" -to emif_0_mem_mem_bg[1]
set_instance_assignment -name IO_STANDARD "SSTL-12" -to emif_0_mem_mem_a[15]
set_instance_assignment -name IO_STANDARD "DIFFERENTIAL 1.2-V SSTL" -to emif_0_mem_mem_ck[0]
set_instance_assignment -name IO_STANDARD "DIFFERENTIAL 1.2-V SSTL" -to emif_0_mem_mem_CK[1]
set_instance_assignment -name IO_STANDARD "SSTL-12" -to emif_0_mem_mem_cke[0]
set_instance_assignment -name IO_STANDARD "SSTL-12" -to emif_0_mem_mem_cs_n[0]
set_instance_assignment -name IO_STANDARD "SSTL-12" -to emif_0_mem_mem_par[0]
set_instance_assignment -name IO_STANDARD "SSTL-12" -to emif_0_mem_mem_a[16]
set_instance_assignment -name IO_STANDARD "1.2 V" -to emif_0_mem_mem_reset_n[0]
set_instance_assignment -name IO_STANDARD "SSTL-12" -to emif_0_mem_mem_a[14]
set_instance_assignment -name IO_STANDARD "SSTL-12" -to emif_0_mem_mem_odt[0]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_alert_n[0]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[64]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[65]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[66]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[67]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[68]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[69]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[70]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[71]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dbi_n[0]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dbi_n[1]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dbi_n[2]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dbi_n[3]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dbi_n[4]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dbi_n[5]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dbi_n[6]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dbi_n[7]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dbi_n[8]
set_instance_assignment -name IO_STANDARD "DIFFERENTIAL 1.2-V POD" -to emif_0_mem_mem_dqs[0]
set_instance_assignment -name IO_STANDARD "DIFFERENTIAL 1.2-V POD" -to emif_0_mem_mem_dqs[1]
set_instance_assignment -name IO_STANDARD "DIFFERENTIAL 1.2-V POD" -to emif_0_mem_mem_dqs[2]
set_instance_assignment -name IO_STANDARD "DIFFERENTIAL 1.2-V POD" -to emif_0_mem_mem_dqs[3]
set_instance_assignment -name IO_STANDARD "DIFFERENTIAL 1.2-V POD" -to emif_0_mem_mem_dqs[4]
set_instance_assignment -name IO_STANDARD "DIFFERENTIAL 1.2-V POD" -to emif_0_mem_mem_dqs[5]
set_instance_assignment -name IO_STANDARD "DIFFERENTIAL 1.2-V POD" -to emif_0_mem_mem_dqs[6]
set_instance_assignment -name IO_STANDARD "DIFFERENTIAL 1.2-V POD" -to emif_0_mem_mem_dqs[7]
set_instance_assignment -name IO_STANDARD "DIFFERENTIAL 1.2-V POD" -to emif_0_mem_mem_dqs[8]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[0]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[1]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[2]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[3]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[4]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[5]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[6]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[7]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[8]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[9]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[10]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[11]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[12]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[13]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[14]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[15]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[16]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[17]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[18]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[19]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[20]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[21]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[22]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[23]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[24]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[25]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[26]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[27]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[28]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[29]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[30]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[31]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[32]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[33]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[34]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[35]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[36]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[37]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[38]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[39]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[40]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[41]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[42]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[43]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[44]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[45]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[46]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[47]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[48]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[49]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[50]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[51]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[52]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[53]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[54]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[55]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[56]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[57]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[58]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[59]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[60]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[61]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[62]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[63]
boards/uniboard2c/designs/refdesigns/ddr4/unb2c_pins_mbI_ddr4_16g.tcl 0 → 100644
+ 383
− 0
View file @ cb41e048
set_location_assignment PIN_K15 -to CLK
set_location_assignment PIN_J15 -to "CLK(n)"
set_location_assignment PIN_N12 -to ETH_CLK
set_location_assignment PIN_K14 -to PPS
set_location_assignment PIN_J14 -to "PPS(n)"
set_location_assignment PIN_Y36 -to SA_CLK
set_location_assignment PIN_Y35 -to "SA_CLK(n)"
set_location_assignment PIN_AH9 -to SB_CLK
set_location_assignment PIN_AH10 -to "SB_CLK(n)"
# Memory pins read back from quartus chip planner
set_location_assignment PIN_AP20 -to emif_0_mem_mem_a[0]
set_location_assignment PIN_AR20 -to emif_0_mem_mem_a[1]
set_location_assignment PIN_AP19 -to emif_0_mem_mem_a[2]
set_location_assignment PIN_AR19 -to emif_0_mem_mem_a[3]
set_location_assignment PIN_AR18 -to emif_0_mem_mem_a[4]
set_location_assignment PIN_AT17 -to emif_0_mem_mem_a[5]
set_location_assignment PIN_AU19 -to emif_0_mem_mem_a[6]
set_location_assignment PIN_AT18 -to emif_0_mem_mem_a[7]
set_location_assignment PIN_AL17 -to emif_0_mem_mem_a[8]
set_location_assignment PIN_AM18 -to emif_0_mem_mem_a[9]
set_location_assignment PIN_AM19 -to emif_0_mem_mem_a[10]
set_location_assignment PIN_AN19 -to emif_0_mem_mem_a[11]
set_location_assignment PIN_BA17 -to emif_0_mem_mem_a[12]
set_location_assignment PIN_BD17 -to emif_0_mem_mem_a[13]
set_location_assignment PIN_AY18 -to emif_0_mem_mem_act_n[0]
set_location_assignment PIN_AV29 -to emif_0_mem_mem_alert_n[0]
set_location_assignment PIN_BB16 -to emif_0_mem_mem_ba[0]
set_location_assignment PIN_BD16 -to emif_0_mem_mem_ba[1]
set_location_assignment PIN_BC16 -to emif_0_mem_mem_bg[0]
set_location_assignment PIN_AW19 -to emif_0_mem_mem_bg[1]
set_location_assignment PIN_BA15 -to emif_0_mem_mem_a[15]
set_location_assignment PIN_BC21 -to emif_0_mem_mem_dq[64]
set_location_assignment PIN_BA22 -to emif_0_mem_mem_dq[65]
set_location_assignment PIN_BD21 -to emif_0_mem_mem_dq[66]
set_location_assignment PIN_BB20 -to emif_0_mem_mem_dq[67]
set_location_assignment PIN_BA20 -to emif_0_mem_mem_dq[68]
set_location_assignment PIN_BD20 -to emif_0_mem_mem_dq[69]
set_location_assignment PIN_AY20 -to emif_0_mem_mem_dq[70]
set_location_assignment PIN_AY22 -to emif_0_mem_mem_dq[71]
set_location_assignment PIN_AU18 -to emif_0_mem_mem_ck[0]
set_location_assignment PIN_AV18 -to emif_0_mem_mem_ck_n[0]
set_location_assignment PIN_AT16 -to emif_0_mem_mem_CK[1]
set_location_assignment PIN_AU16 -to emif_0_mem_mem_CK_n[1]
set_location_assignment PIN_BB19 -to emif_0_mem_mem_cke[0]
set_location_assignment PIN_AP16 -to emif_0_mem_mem_cke[1]
#set_location_assignment PIN_AP16 -to cke1_export
set_instance_assignment -name IO_STANDARD "SSTL-12" -to cke1_export
set_location_assignment PIN_AY19 -to emif_0_mem_mem_cs_n[0]
set_location_assignment PIN_AN16 -to emif_0_mem_mem_cs_n[1]
#set_location_assignment PIN_AN16 -to cs1_export
set_instance_assignment -name IO_STANDARD "SSTL-12" -to cs1_export
set_location_assignment PIN_BD19 -to emif_0_mem_mem_odt[0]
set_location_assignment PIN_AR17 -to emif_0_mem_mem_odt[1]
#set_location_assignment PIN_AR17 -to odt1_export
set_instance_assignment -name IO_STANDARD "SSTL-12" -to odt1_export
set_location_assignment PIN_BC29 -to emif_0_mem_mem_dbi_n[0]
set_location_assignment PIN_AR27 -to emif_0_mem_mem_dbi_n[1]
set_location_assignment PIN_BD24 -to emif_0_mem_mem_dbi_n[2]
set_location_assignment PIN_AM23 -to emif_0_mem_mem_dbi_n[3]
set_location_assignment PIN_AU12 -to emif_0_mem_mem_dbi_n[4]
set_location_assignment PIN_AU13 -to emif_0_mem_mem_dbi_n[5]
set_location_assignment PIN_AM14 -to emif_0_mem_mem_dbi_n[6]
set_location_assignment PIN_AM16 -to emif_0_mem_mem_dbi_n[7]
set_location_assignment PIN_BA21 -to emif_0_mem_mem_dbi_n[8]
set_location_assignment PIN_BA28 -to emif_0_mem_mem_dqs[0]
set_location_assignment PIN_AM28 -to emif_0_mem_mem_dqs[1]
set_location_assignment PIN_AV24 -to emif_0_mem_mem_dqs[2]
set_location_assignment PIN_AN24 -to emif_0_mem_mem_dqs[3]
set_location_assignment PIN_BC14 -to emif_0_mem_mem_dqs[4]
set_location_assignment PIN_AW14 -to emif_0_mem_mem_dqs[5]
set_location_assignment PIN_AN12 -to emif_0_mem_mem_dqs[6]
set_location_assignment PIN_AK15 -to emif_0_mem_mem_dqs[7]
set_location_assignment PIN_BC22 -to emif_0_mem_mem_dqs[8]
set_location_assignment PIN_BC18 -to emif_0_mem_mem_par[0]
set_location_assignment PIN_BB15 -to emif_0_mem_mem_a[16]
set_location_assignment PIN_AW17 -to emif_0_pll_ref_clk_clk
#set_instance_assignment -name IO_STANDARD "SSTL-12" -to emif_0_pll_ref_clk_clk
set_instance_assignment -name IO_STANDARD "1.2 V" -to emif_0_pll_ref_clk_clk
set_location_assignment PIN_AV19 -to emif_0_mem_mem_reset_n[0]
set_location_assignment PIN_AY17 -to emif_0_oct_oct_rzqin
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_oct_oct_rzqin
#set_instance_assignment -name IO_STANDARD "SSTL-12" -to emif_0_oct_oct_rzqin
set_location_assignment PIN_BC17 -to emif_0_mem_mem_a[14]
# qsfp leds
set_location_assignment PIN_BA33 -to emif_0_status_local_cal_fail
set_location_assignment PIN_BB33 -to emif_0_status_local_cal_success
set_location_assignment PIN_AV32 -to emif_0_tg_0_traffic_gen_fail
set_location_assignment PIN_AP31 -to emif_0_tg_0_traffic_gen_pass
set_location_assignment PIN_AT33 -to emif_0_tg_0_traffic_gen_timeout
set_location_assignment PIN_AF32 -to pll_locked_pll_locked
# testio(0)
set_location_assignment PIN_AN32 -to global_reset_reset_n
# testio(1)
set_location_assignment PIN_AP32 -to testio1
set_instance_assignment -name IO_STANDARD "1.8 V" -to testio1
# IO Standard Assignments from Gijs (excluding memory)
set_instance_assignment -name IO_STANDARD "1.8 V" -to ETH_CLK
set_instance_assignment -name IO_STANDARD LVDS -to ETH_SGIN[0]
set_instance_assignment -name IO_STANDARD LVDS -to "ETH_SGIN[0](n)"
set_instance_assignment -name IO_STANDARD LVDS -to ETH_SGIN[1]
set_instance_assignment -name IO_STANDARD LVDS -to "ETH_SGIN[1](n)"
set_instance_assignment -name IO_STANDARD LVDS -to ETH_SGOUT[0]
set_instance_assignment -name IO_STANDARD LVDS -to "ETH_SGOUT[0](n)"
set_instance_assignment -name IO_STANDARD LVDS -to ETH_SGOUT[1]
set_instance_assignment -name IO_STANDARD LVDS -to "ETH_SGOUT[1](n)"
set_instance_assignment -name IO_STANDARD LVDS -to SA_CLK
set_instance_assignment -name IO_STANDARD LVDS -to "SA_CLK(n)"
set_instance_assignment -name IO_STANDARD LVDS -to SB_CLK
set_instance_assignment -name IO_STANDARD LVDS -to "SB_CLK(n)"
set_instance_assignment -name IO_STANDARD LVDS -to BCK_REF_CLK
set_instance_assignment -name IO_STANDARD LVDS -to "BCK_REF_CLK(n)"
set_instance_assignment -name IO_STANDARD "1.8 V" -to TESTIO[0]
set_instance_assignment -name IO_STANDARD "1.8 V" -to TESTIO[1]
set_instance_assignment -name IO_STANDARD "1.8 V" -to TESTIO[2]
set_instance_assignment -name IO_STANDARD "1.8 V" -to TESTIO[3]
set_instance_assignment -name IO_STANDARD "1.8 V" -to TESTIO[4]
set_instance_assignment -name IO_STANDARD "1.8 V" -to TESTIO[5]
set_instance_assignment -name IO_STANDARD "1.8 V" -to VERSION[0]
set_instance_assignment -name IO_STANDARD "1.8 V" -to VERSION[1]
set_instance_assignment -name IO_STANDARD "1.8 V" -to WDI
#set_location_assignment PIN_AN32 -to TESTIO[0]
set_location_assignment PIN_AP32 -to TESTIO[1]
set_location_assignment PIN_AT30 -to TESTIO[2]
set_location_assignment PIN_BD31 -to TESTIO[3]
set_location_assignment PIN_AU30 -to TESTIO[4]
set_location_assignment PIN_BD30 -to TESTIO[5]
set_location_assignment PIN_AB12 -to VERSION[0]
set_location_assignment PIN_AB13 -to VERSION[1]
set_location_assignment PIN_BB30 -to WDI
# locations changed 30 sept
set_location_assignment PIN_K12 -to ETH_SGIN[0]
set_location_assignment PIN_J12 -to "ETH_SGIN[0](n)"
set_location_assignment PIN_AF33 -to ETH_SGIN[1]
set_location_assignment PIN_AE33 -to "ETH_SGIN[1](n)"
set_location_assignment PIN_H13 -to ETH_SGOUT[0]
set_location_assignment PIN_H12 -to "ETH_SGOUT[0](n)"
set_location_assignment PIN_AW31 -to ETH_SGOUT[1]
set_location_assignment PIN_AV31 -to "ETH_SGOUT[1](n)"
set_instance_assignment -name IO_STANDARD LVDS -to PPS
set_instance_assignment -name IO_STANDARD LVDS -to "PPS(n)"
set_instance_assignment -name IO_STANDARD LVDS -to CLK
set_instance_assignment -name IO_STANDARD LVDS -to "CLK(n)"
# Enable internal termination for LVDS inputs
set_instance_assignment -name INPUT_TERMINATION DIFFERENTIAL -to PPS
set_instance_assignment -name INPUT_TERMINATION DIFFERENTIAL -to CLK
set_instance_assignment -name INPUT_TERMINATION DIFFERENTIAL -to ETH_SGIN[0]
set_instance_assignment -name INPUT_TERMINATION DIFFERENTIAL -to ETH_SGIN[1]
set_location_assignment PIN_V9 -to BCK_REF_CLK
set_location_assignment PIN_V10 -to "BCK_REF_CLK(n)"
set_location_assignment PIN_AL32 -to CLKUSR
set_location_assignment PIN_M16 -to MB_EVENT
set_location_assignment PIN_AU29 -to emif_0_mem_mem_dq[0]
set_location_assignment PIN_BC28 -to emif_0_mem_mem_dq[1]
set_location_assignment PIN_AY29 -to emif_0_mem_mem_dq[2]
set_location_assignment PIN_BB28 -to emif_0_mem_mem_dq[3]
set_location_assignment PIN_BB29 -to emif_0_mem_mem_dq[4]
set_location_assignment PIN_AW29 -to emif_0_mem_mem_dq[5]
set_location_assignment PIN_BC27 -to emif_0_mem_mem_dq[6]
set_location_assignment PIN_BD29 -to emif_0_mem_mem_dq[7]
set_location_assignment PIN_AR28 -to emif_0_mem_mem_dq[8]
set_location_assignment PIN_AR29 -to emif_0_mem_mem_dq[9]
set_location_assignment PIN_AV27 -to emif_0_mem_mem_dq[10]
set_location_assignment PIN_AU28 -to emif_0_mem_mem_dq[11]
set_location_assignment PIN_AW27 -to emif_0_mem_mem_dq[12]
set_location_assignment PIN_AT28 -to emif_0_mem_mem_dq[13]
set_location_assignment PIN_AV28 -to emif_0_mem_mem_dq[14]
set_location_assignment PIN_AP27 -to emif_0_mem_mem_dq[15]
set_location_assignment PIN_BC24 -to emif_0_mem_mem_dq[16]
set_location_assignment PIN_BB24 -to emif_0_mem_mem_dq[17]
set_location_assignment PIN_BB23 -to emif_0_mem_mem_dq[18]
set_location_assignment PIN_AW22 -to emif_0_mem_mem_dq[19]
set_location_assignment PIN_BA23 -to emif_0_mem_mem_dq[20]
set_location_assignment PIN_BC23 -to emif_0_mem_mem_dq[21]
set_location_assignment PIN_AY23 -to emif_0_mem_mem_dq[22]
set_location_assignment PIN_AY24 -to emif_0_mem_mem_dq[23]
set_location_assignment PIN_AP22 -to emif_0_mem_mem_dq[24]
set_location_assignment PIN_AN23 -to emif_0_mem_mem_dq[25]
set_location_assignment PIN_AR23 -to emif_0_mem_mem_dq[26]
set_location_assignment PIN_AT23 -to emif_0_mem_mem_dq[27]
set_location_assignment PIN_AU23 -to emif_0_mem_mem_dq[28]
set_location_assignment PIN_AV23 -to emif_0_mem_mem_dq[29]
set_location_assignment PIN_AR24 -to emif_0_mem_mem_dq[30]
set_location_assignment PIN_AP24 -to emif_0_mem_mem_dq[31]
set_location_assignment PIN_AV12 -to emif_0_mem_mem_dq[32]
set_location_assignment PIN_AY13 -to emif_0_mem_mem_dq[33]
set_location_assignment PIN_BD14 -to emif_0_mem_mem_dq[34]
set_location_assignment PIN_AY12 -to emif_0_mem_mem_dq[35]
set_location_assignment PIN_BA13 -to emif_0_mem_mem_dq[36]
set_location_assignment PIN_BA12 -to emif_0_mem_mem_dq[37]
set_location_assignment PIN_AW12 -to emif_0_mem_mem_dq[38]
set_location_assignment PIN_BB13 -to emif_0_mem_mem_dq[39]
set_location_assignment PIN_AV13 -to emif_0_mem_mem_dq[40]
set_location_assignment PIN_AR13 -to emif_0_mem_mem_dq[41]
set_location_assignment PIN_AR15 -to emif_0_mem_mem_dq[42]
set_location_assignment PIN_AP15 -to emif_0_mem_mem_dq[43]
set_location_assignment PIN_AT15 -to emif_0_mem_mem_dq[44]
set_location_assignment PIN_AU14 -to emif_0_mem_mem_dq[45]
set_location_assignment PIN_AU15 -to emif_0_mem_mem_dq[46]
set_location_assignment PIN_AV14 -to emif_0_mem_mem_dq[47]
set_location_assignment PIN_AM13 -to emif_0_mem_mem_dq[48]
set_location_assignment PIN_AT13 -to emif_0_mem_mem_dq[49]
set_location_assignment PIN_AT12 -to emif_0_mem_mem_dq[50]
set_location_assignment PIN_AP14 -to emif_0_mem_mem_dq[51]
set_location_assignment PIN_AN13 -to emif_0_mem_mem_dq[52]
set_location_assignment PIN_AK13 -to emif_0_mem_mem_dq[53]
set_location_assignment PIN_AM12 -to emif_0_mem_mem_dq[54]
set_location_assignment PIN_AL13 -to emif_0_mem_mem_dq[55]
set_location_assignment PIN_AH13 -to emif_0_mem_mem_dq[56]
set_location_assignment PIN_AL15 -to emif_0_mem_mem_dq[57]
set_location_assignment PIN_AM15 -to emif_0_mem_mem_dq[58]
set_location_assignment PIN_AJ14 -to emif_0_mem_mem_dq[59]
set_location_assignment PIN_AJ12 -to emif_0_mem_mem_dq[60]
set_location_assignment PIN_AL16 -to emif_0_mem_mem_dq[61]
set_location_assignment PIN_AK12 -to emif_0_mem_mem_dq[62]
set_location_assignment PIN_AH14 -to emif_0_mem_mem_dq[63]
set_location_assignment PIN_AY28 -to emif_0_mem_mem_dqs_n[0]
set_location_assignment PIN_AN28 -to emif_0_mem_mem_dqs_n[1]
set_location_assignment PIN_AU24 -to emif_0_mem_mem_dqs_n[2]
set_location_assignment PIN_AM24 -to emif_0_mem_mem_dqs_n[3]
set_location_assignment PIN_BB14 -to emif_0_mem_mem_dqs_n[4]
set_location_assignment PIN_AY14 -to emif_0_mem_mem_dqs_n[5]
set_location_assignment PIN_AP12 -to emif_0_mem_mem_dqs_n[6]
set_location_assignment PIN_AK14 -to emif_0_mem_mem_dqs_n[7]
set_location_assignment PIN_BD22 -to emif_0_mem_mem_dqs_n[8]
set_location_assignment PIN_AJ31 -to altera_reserved_tck
set_location_assignment PIN_AK18 -to altera_reserved_tdi
set_location_assignment PIN_AH31 -to altera_reserved_ntrst
set_location_assignment PIN_AM29 -to altera_reserved_tdo
#set_location_assignment PIN_AV33 -to ~ALTERA_DATA0~
set_instance_assignment -name IO_STANDARD "SSTL-12" -to emif_0_mem_mem_a[0]
set_instance_assignment -name IO_STANDARD "SSTL-12" -to emif_0_mem_mem_a[1]
set_instance_assignment -name IO_STANDARD "SSTL-12" -to emif_0_mem_mem_a[2]
set_instance_assignment -name IO_STANDARD "SSTL-12" -to emif_0_mem_mem_a[3]
set_instance_assignment -name IO_STANDARD "SSTL-12" -to emif_0_mem_mem_a[4]
set_instance_assignment -name IO_STANDARD "SSTL-12" -to emif_0_mem_mem_a[5]
set_instance_assignment -name IO_STANDARD "SSTL-12" -to emif_0_mem_mem_a[6]
set_instance_assignment -name IO_STANDARD "SSTL-12" -to emif_0_mem_mem_a[7]
set_instance_assignment -name IO_STANDARD "SSTL-12" -to emif_0_mem_mem_a[8]
set_instance_assignment -name IO_STANDARD "SSTL-12" -to emif_0_mem_mem_a[9]
set_instance_assignment -name IO_STANDARD "SSTL-12" -to emif_0_mem_mem_a[10]
set_instance_assignment -name IO_STANDARD "SSTL-12" -to emif_0_mem_mem_a[11]
set_instance_assignment -name IO_STANDARD "SSTL-12" -to emif_0_mem_mem_a[12]
set_instance_assignment -name IO_STANDARD "SSTL-12" -to emif_0_mem_mem_a[13]
set_instance_assignment -name IO_STANDARD "SSTL-12" -to emif_0_mem_mem_act_n[0]
set_instance_assignment -name IO_STANDARD "SSTL-12" -to emif_0_mem_mem_ba[0]
set_instance_assignment -name IO_STANDARD "SSTL-12" -to emif_0_mem_mem_ba[1]
set_instance_assignment -name IO_STANDARD "SSTL-12" -to emif_0_mem_mem_bg[0]
set_instance_assignment -name IO_STANDARD "SSTL-12" -to emif_0_mem_mem_bg[1]
set_instance_assignment -name IO_STANDARD "SSTL-12" -to emif_0_mem_mem_a[15]
set_instance_assignment -name IO_STANDARD "DIFFERENTIAL 1.2-V SSTL" -to emif_0_mem_mem_ck[0]
set_instance_assignment -name IO_STANDARD "DIFFERENTIAL 1.2-V SSTL" -to emif_0_mem_mem_CK[1]
set_instance_assignment -name IO_STANDARD "SSTL-12" -to emif_0_mem_mem_cke[0]
set_instance_assignment -name IO_STANDARD "SSTL-12" -to emif_0_mem_mem_cs_n[0]
set_instance_assignment -name IO_STANDARD "SSTL-12" -to emif_0_mem_mem_par[0]
set_instance_assignment -name IO_STANDARD "SSTL-12" -to emif_0_mem_mem_a[16]
set_instance_assignment -name IO_STANDARD "1.2 V" -to emif_0_mem_mem_reset_n[0]
set_instance_assignment -name IO_STANDARD "SSTL-12" -to emif_0_mem_mem_a[14]
set_instance_assignment -name IO_STANDARD "SSTL-12" -to emif_0_mem_mem_odt[0]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_alert_n[0]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[64]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[65]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[66]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[67]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[68]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[69]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[70]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[71]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dbi_n[0]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dbi_n[1]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dbi_n[2]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dbi_n[3]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dbi_n[4]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dbi_n[5]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dbi_n[6]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dbi_n[7]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dbi_n[8]
set_instance_assignment -name IO_STANDARD "DIFFERENTIAL 1.2-V POD" -to emif_0_mem_mem_dqs[0]
set_instance_assignment -name IO_STANDARD "DIFFERENTIAL 1.2-V POD" -to emif_0_mem_mem_dqs[1]
set_instance_assignment -name IO_STANDARD "DIFFERENTIAL 1.2-V POD" -to emif_0_mem_mem_dqs[2]
set_instance_assignment -name IO_STANDARD "DIFFERENTIAL 1.2-V POD" -to emif_0_mem_mem_dqs[3]
set_instance_assignment -name IO_STANDARD "DIFFERENTIAL 1.2-V POD" -to emif_0_mem_mem_dqs[4]
set_instance_assignment -name IO_STANDARD "DIFFERENTIAL 1.2-V POD" -to emif_0_mem_mem_dqs[5]
set_instance_assignment -name IO_STANDARD "DIFFERENTIAL 1.2-V POD" -to emif_0_mem_mem_dqs[6]
set_instance_assignment -name IO_STANDARD "DIFFERENTIAL 1.2-V POD" -to emif_0_mem_mem_dqs[7]
set_instance_assignment -name IO_STANDARD "DIFFERENTIAL 1.2-V POD" -to emif_0_mem_mem_dqs[8]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[0]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[1]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[2]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[3]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[4]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[5]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[6]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[7]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[8]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[9]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[10]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[11]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[12]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[13]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[14]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[15]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[16]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[17]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[18]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[19]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[20]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[21]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[22]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[23]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[24]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[25]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[26]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[27]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[28]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[29]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[30]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[31]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[32]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[33]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[34]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[35]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[36]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[37]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[38]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[39]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[40]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[41]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[42]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[43]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[44]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[45]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[46]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[47]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[48]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[49]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[50]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[51]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[52]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[53]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[54]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[55]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[56]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[57]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[58]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[59]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[60]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[61]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[62]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to emif_0_mem_mem_dq[63]
libraries/technology/ip_arria10_e2sg/ddr4_16g_1600/compile_ip.tcl 0 → 100644
+ 34
− 0
View file @ cb41e048
#------------------------------------------------------------------------------
#
# Copyright (C) 2017
# ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
# JIVE (Joint Institute for VLBI in Europe) <http://www.jive.nl/>
# P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
#
# This program is free software: you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation, either version 3 of the License, or
# (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program. If not, see <http://www.gnu.org/licenses/>.
#
#------------------------------------------------------------------------------
# This file is based on generated file mentor/msim_setup.tcl.
# - the values for modelsim_search_libraries key in the hdllib.cfg follow from altera libraries vmap section in the msim_setup.tcl
# - vmap for the IP specific libraries and compile all IP source files into those libraries similar as in the msim_setup.tcl
# - replace QSYS_SIMDIR by IP_DIR
# - if the testbench is also generated with QSYS then only the IP_TBDIR files are needed, because these also contain the source files.
#vlib ./work/ ;# Assume library work already exist
set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e2sg_ddr4_16g_1600/sim"
vcom "$IP_DIR/ip_arria10_e2sg_ddr4_16g_1600.vhd"
libraries/technology/ip_arria10_e2sg/ddr4_16g_1600/copy_hex_files.tcl 0 → 100644
+ 38
− 0
View file @ cb41e048
#------------------------------------------------------------------------------
#
# Copyright (C) 2015
# ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
# JIVE (Joint Institute for VLBI in Europe) <http://www.jive.nl/>
# P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
#
# This program is free software: you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation, either version 3 of the License, or
# (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program. If not, see <http://www.gnu.org/licenses/>.
#
#------------------------------------------------------------------------------
# This file is based on Qsys-generated file generated/sim/mentor/msim_setup.tcl
set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e2sg_ddr4_16g_1600/sim"
# Copy ROM/RAM files to simulation directory
if {[file isdirectory $IP_DIR]} {
#file copy -force $IP_DIR/../altera_emif_arch_nf_151/sim/ip_arria10_e2sg_ddr4_16g_1600_altera_emif_arch_nf_151_4thorvi_seq_cal_sim.hex ./
#file copy -force $IP_DIR/../altera_emif_arch_nf_151/sim/ip_arria10_e2sg_ddr4_16g_1600_altera_emif_arch_nf_151_4thorvi_seq_cal_synth.hex ./
#file copy -force $IP_DIR/../altera_emif_arch_nf_151/sim/ip_arria10_e2sg_ddr4_16g_1600_altera_emif_arch_nf_151_4thorvi_seq_params_sim.hex ./
#file copy -force $IP_DIR/../altera_emif_arch_nf_151/sim/ip_arria10_e2sg_ddr4_16g_1600_altera_emif_arch_nf_151_4thorvi_seq_params_synth.hex ./
file copy -force $IP_DIR/../altera_avalon_onchip_memory2_1920/sim/seq_cal_soft_m20k.hex ./
file copy -force $IP_DIR/../altera_emif_arch_nf_191/sim/ip_arria10_e2sg_ddr4_16g_1600_altera_emif_arch_nf_191_qssf3hq_seq_cal.hex ./
file copy -force $IP_DIR/../altera_emif_arch_nf_191/sim/ip_arria10_e2sg_ddr4_16g_1600_altera_emif_arch_nf_191_qssf3hq_seq_params_sim.hex ./
file copy -force $IP_DIR/../altera_emif_arch_nf_191/sim/ip_arria10_e2sg_ddr4_16g_1600_altera_emif_arch_nf_191_qssf3hq_seq_params_synth.hex ./
}
libraries/technology/ip_arria10_e2sg/ddr4_16g_1600/hdllib.cfg 0 → 100644
+ 25
− 0
View file @ cb41e048
hdl_lib_name = ip_arria10_e2sg_ddr4_16g_1600
hdl_library_clause_name = ip_arria10_e2sg_ddr4_16g_1600_altera_emif_1910
hdl_lib_uses_synth =
hdl_lib_uses_sim = ip_arria10_e2sg_altera_emif_cal_slave_nf_191 ip_arria10_e2sg_altera_avalon_onchip_memory2_1920 ip_arria10_e2sg_altera_mm_interconnect_191 ip_arria10_e2sg_altera_reset_controller_191 ip_arria10_e2sg_altera_emif_arch_nf_191 ip_arria10_e2sg_altera_avalon_mm_bridge_191 ip_arria10_e2sg_altera_merlin_slave_translator_191 ip_arria10_e2sg_altera_avalon_sc_fifo_191 ip_arria10_e2sg_altera_ip_col_if_191 ip_arria10_e2sg_altera_jtag_dc_streaming_191 ip_arria10_e2sg_alt_mem_if_jtag_master_191 ip_arria10_e2sg_altera_avalon_st_bytes_to_packets_1910 ip_arria10_e2sg_altera_avalon_packets_to_master_1910 ip_arria10_e2sg_channel_adapter_191 ip_arria10_e2sg_timing_adapter_191 ip_arria10_e2sg_altera_avalon_st_packets_to_bytes_1910 ip_arria10_e2sg_altera_emif_1910 ip_arria10_e2sg_altera_merlin_master_translator_191
hdl_lib_technology = ip_arria10_e2sg
synth_files =
test_bench_files =
[modelsim_project_file]
modelsim_compile_ip_files =
$RADIOHDL_WORK/libraries/technology/ip_arria10_e2sg/ddr4_16g_1600/compile_ip.tcl
[quartus_project_file]
quartus_qip_files =
$RADIOHDL_BUILD_DIR/<buildset_name>/qsys-generate/ip_arria10_e2sg_ddr4_16g_1600/ip_arria10_e2sg_ddr4_16g_1600.qip
[generate_ip_libs]
qsys-generate_ip_files =
ip_arria10_e2sg_ddr4_16g_1600.ip
libraries/technology/ip_arria10_e2sg/ddr4_16g_1600/ip_arria10_e2sg_ddr4_16g_1600.ip 0 → 100644
+ 10392
− 0
View file @ cb41e048
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