Added prefix 'func_' to xgmii functions.

libraries/base/common/src/vhdl/common_interface_layers_pkg.vhd

@@ -55,9 +55,9 @@ PACKAGE common_interface_layers_pkg IS
   CONSTANT c_xgmii_c_start     : STD_LOGIC_VECTOR(c_xgmii_nof_lanes-1 DOWNTO 0) := x"01"; --b'00000001' as byte 0 contains START word FB
   CONSTANT c_xgmii_c_term      : STD_LOGIC_VECTOR(c_xgmii_nof_lanes-1 DOWNTO 0) := x"F8"; --b'11111000' as byte 3 contains TERMINATE word FD, bytes 7..4 are IDLE.
 
-  FUNCTION xgmii_dc( data : IN STD_LOGIC_VECTOR(c_xgmii_data_w-1 DOWNTO 0); ctrl : IN STD_LOGIC_VECTOR(c_xgmii_nof_lanes-1 DOWNTO 0)) RETURN STD_LOGIC_VECTOR;
-  FUNCTION xgmii_d( data_ctrl: IN STD_LOGIC_VECTOR(c_xgmii_w-1 DOWNTO 0)) RETURN STD_LOGIC_VECTOR;
-  FUNCTION xgmii_c( data_ctrl: IN STD_LOGIC_VECTOR(c_xgmii_w-1 DOWNTO 0)) RETURN STD_LOGIC_VECTOR;
+  FUNCTION func_xgmii_dc( data : IN STD_LOGIC_VECTOR(c_xgmii_data_w-1 DOWNTO 0); ctrl : IN STD_LOGIC_VECTOR(c_xgmii_nof_lanes-1 DOWNTO 0)) RETURN STD_LOGIC_VECTOR;
+  FUNCTION func_xgmii_d( data_ctrl: IN STD_LOGIC_VECTOR(c_xgmii_w-1 DOWNTO 0)) RETURN STD_LOGIC_VECTOR;
+  FUNCTION func_xgmii_c( data_ctrl: IN STD_LOGIC_VECTOR(c_xgmii_w-1 DOWNTO 0)) RETURN STD_LOGIC_VECTOR;
 
   TYPE t_xgmii_dc_arr IS ARRAY(INTEGER RANGE <>) OF STD_LOGIC_VECTOR(c_xgmii_w-1 DOWNTO 0);
   TYPE t_xgmii_d_arr IS ARRAY(INTEGER RANGE <>) OF STD_LOGIC_VECTOR(c_xgmii_data_w-1 DOWNTO 0);
@@ -71,7 +71,7 @@ PACKAGE BODY common_interface_layers_pkg IS
   -- (November 2011) page 3-11: SDR XGMII Tx Interface for the proper mapping.
 
   -- Combine separate data and control bits into one XGMII SLV.
-  FUNCTION xgmii_dc( data : IN STD_LOGIC_VECTOR(c_xgmii_data_w-1 DOWNTO 0); ctrl : IN STD_LOGIC_VECTOR(c_xgmii_nof_lanes-1 DOWNTO 0)) RETURN STD_LOGIC_VECTOR IS  
+  FUNCTION func_xgmii_dc( data : IN STD_LOGIC_VECTOR(c_xgmii_data_w-1 DOWNTO 0); ctrl : IN STD_LOGIC_VECTOR(c_xgmii_nof_lanes-1 DOWNTO 0)) RETURN STD_LOGIC_VECTOR IS  
     VARIABLE data_ctrl_out : STD_LOGIC_VECTOR(c_xgmii_w-1 DOWNTO 0);
   BEGIN
     -- Lane 0:
@@ -103,7 +103,7 @@ PACKAGE BODY common_interface_layers_pkg IS
   END;
 
   -- Extract the data bits from combined data+ctrl XGMII SLV.
-  FUNCTION xgmii_d( data_ctrl: IN STD_LOGIC_VECTOR(c_xgmii_w-1 DOWNTO 0)) RETURN STD_LOGIC_VECTOR IS
+  FUNCTION func_xgmii_d( data_ctrl: IN STD_LOGIC_VECTOR(c_xgmii_w-1 DOWNTO 0)) RETURN STD_LOGIC_VECTOR IS
     VARIABLE data_out : STD_LOGIC_VECTOR(c_xgmii_data_w-1 DOWNTO 0);
   BEGIN
     -- Lane 0:
@@ -127,7 +127,7 @@ PACKAGE BODY common_interface_layers_pkg IS
   END;
 
   -- Extract the control bits from combined data+ctrl XGMII SLV.
-  FUNCTION xgmii_c( data_ctrl: IN STD_LOGIC_VECTOR(c_xgmii_w-1 DOWNTO 0)) RETURN STD_LOGIC_VECTOR IS
+  FUNCTION func_xgmii_c( data_ctrl: IN STD_LOGIC_VECTOR(c_xgmii_w-1 DOWNTO 0)) RETURN STD_LOGIC_VECTOR IS
     VARIABLE ctrl_out : STD_LOGIC_VECTOR(c_xgmii_nof_lanes-1 DOWNTO 0);
   BEGIN
     -- Lane 0:

libraries/io/tr_10GbE/src/vhdl/tr_10GbE.vhd

@@ -653,10 +653,9 @@ BEGIN
 
     no_lpbk_xgmii: IF g_lpbk_xgmii = FALSE generate
       gen_arrays : for i in 0 to g_nof_macs-1 generate	    
-        tx_parallel_data(64*i+63 downto 64*i)  <= xgmii_d(mac_xgmii_tx_dc_arr(i));
-        tx_control(8*i+7 downto 8*i)           <= xgmii_c(mac_xgmii_tx_dc_arr(i));
-        mac_xgmii_rx_dc_arr(i)                 <= xgmii_dc(rx_parallel_data(64*i+63 downto 64*i),
-                                                  rx_control(8*i+7 downto 8*i));
+        tx_parallel_data(64*i+63 downto 64*i)  <= func_xgmii_d(mac_xgmii_tx_dc_arr(i));
+        tx_control(8*i+7 downto 8*i)           <= func_xgmii_c(mac_xgmii_tx_dc_arr(i));
+        mac_xgmii_rx_dc_arr(i)                 <= func_xgmii_dc(rx_parallel_data(64*i+63 downto 64*i), rx_control(8*i+7 downto 8*i));
       end generate gen_arrays;
     end generate;
 

libraries/io/tr_xaui/src/vhdl/tr_xaui.vhd

@@ -263,10 +263,10 @@ BEGIN
     -----------------------------------------------------------------------------
     gen_sosi_io: IF g_use_xgmii=FALSE GENERATE
  
-      xgmii_tx_dc(i) <= xgmii_dc(xgmii_tx_d(i), xgmii_tx_c(i));
+      xgmii_tx_dc(i) <= func_xgmii_dc(xgmii_tx_d(i), xgmii_tx_c(i));
   
-      xgmii_rx_d(i) <= xgmii_d(xgmii_rx_dc(i));
-      xgmii_rx_c(i) <= xgmii_c(xgmii_rx_dc(i));
+      xgmii_rx_d(i) <= func_xgmii_d(xgmii_rx_dc(i));
+      xgmii_rx_c(i) <= func_xgmii_c(xgmii_rx_dc(i));
   
       tx_siso_arr(i).ready <= '0' WHEN txc_rx_channelaligned_dly(i) = '0' ELSE tx_framer_siso_arr(i).ready;
       tx_siso_arr(i).xon   <= txc_rx_channelaligned_dly(i);

libraries/io/tr_xaui/tb/vhdl/sim_xaui.vhd

@@ -74,10 +74,10 @@ BEGIN
  
   gen_nof_xaui : FOR i IN g_nof_xaui-1 DOWNTO 0 GENERATE
 
-    xgmii_tx_d_arr(i) <= xgmii_d(xgmii_tx_dc_arr(i));
-    xgmii_tx_c_arr(i) <= xgmii_c(xgmii_tx_dc_arr(i));
+    xgmii_tx_d_arr(i) <= func_xgmii_d(xgmii_tx_dc_arr(i));
+    xgmii_tx_c_arr(i) <= func_xgmii_c(xgmii_tx_dc_arr(i));
 
-    xgmii_rx_dc_arr(i) <= xgmii_dc(xgmii_rx_d_arr(i), xgmii_rx_c_arr(i));
+    xgmii_rx_dc_arr(i) <= func_xgmii_dc(xgmii_rx_d_arr(i), xgmii_rx_c_arr(i));
     
     u_areset_tx_rdy : ENTITY common_lib.common_areset
     GENERIC MAP(

libraries/technology/ip_stratixiv/phy_xaui/tb_ip_stratixiv_phy_xaui.vhd

@@ -111,11 +111,11 @@ BEGIN
   END PROCESS;
   
   -- Combine data and control into XGMII
-  xgmii_tx_dc <= xgmii_dc(xgmii_tx_d, xgmii_tx_c);
+  xgmii_tx_dc <= func_xgmii_dc(xgmii_tx_d, xgmii_tx_c);
 
   -- Extract data (d) from combined data+control (dc) XGMII
-  xgmii_rx_d <= xgmii_d(xgmii_rx_dc);
-  xgmii_rx_c <= xgmii_c(xgmii_rx_dc);
+  xgmii_rx_d <= func_xgmii_d(xgmii_rx_dc);
+  xgmii_rx_c <= func_xgmii_c(xgmii_rx_dc);
 
   -- DUT:
   u_ip_phy_xaui : ENTITY work.ip_stratixiv_phy_xaui_0