Connected missing mb_I_ref_rst via ctrl_unb2_board instance.

boards/uniboard2/designs/unb2_test/src/vhdl/unb2_test.vhd

@@ -433,6 +433,9 @@ BEGIN
     dp_rst_in                => dp_rst,
     dp_clk_in                => dp_clk,
 
+    mb_I_ref_rst             => mb_I_ref_rst,
+    mb_II_ref_rst            => mb_II_ref_rst,
+    
     -- Toggle WDI
     pout_wdi                 => pout_wdi,
 
@@ -505,6 +508,9 @@ BEGIN
     -- . I2C Interface to Sensors
     SENS_SC                  => SENS_SC,
     SENS_SD                  => SENS_SD,        
+    -- . DDR reference clock domains reset creation
+    MB_I_REF_CLK             => MB_I_REF_CLK,
+    MB_II_REF_CLK            => MB_II_REF_CLK,
     -- . 1GbE Control Interface
     ETH_CLK                  => ETH_CLK,
     ETH_SGIN                 => ETH_SGIN,