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RTSD
HDL
Commits
c722ba87
Commit
c722ba87
authored
10 years ago
by
Pepping
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- Made bigger bsn_monitorspan
parent
62741f35
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applications/unb1_reorder/quartus/sopc_unb1_reorder.sopc
+61
-61
61 additions, 61 deletions
applications/unb1_reorder/quartus/sopc_unb1_reorder.sopc
with
61 additions
and
61 deletions
applications/unb1_reorder/quartus/sopc_unb1_reorder.sopc
+
61
−
61
View file @
c722ba87
...
...
@@ -14,7 +14,7 @@
{
datum baseAddress
{
value = "
720
";
value = "
1104
";
type = "long";
}
}
...
...
@@ -97,109 +97,109 @@
type = "long";
}
}
element r
eg_wdi
.mem
element r
am_diag_data_buffer_im
.mem
{
datum _lockedAddress
{
value = "1";
type = "boolean";
}
datum baseAddress
{
value = "
12288
";
value = "
262144
";
type = "long";
}
}
element
reg_diag_data_buffer_re
.mem
element
pio_pps
.mem
{
datum baseAddress
{
value = "
256
";
value = "
1112
";
type = "long";
}
}
element reg_diag_
data_buffer_im
.mem
element reg_diag_
bg
.mem
{
datum baseAddress
{
value = "1
28
";
value = "1
024
";
type = "long";
}
}
element r
o
m_
system_info
.mem
element r
a
m_
diag_data_buffer_re
.mem
{
datum _lockedAddress
{
value = "1";
type = "boolean";
}
datum baseAddress
{
value = "
409
6";
value = "
39321
6";
type = "long";
}
}
element
pio_pps
.mem
element
reg_diag_data_buffer_re
.mem
{
datum baseAddress
{
value = "
728
";
value = "
256
";
type = "long";
}
}
element r
am_diag_data_buffer_im
.mem
element r
eg_unb_sens
.mem
{
datum baseAddress
{
value = "
262144
";
value = "
480
";
type = "long";
}
}
element r
am_diag_data_buffer_re
.mem
element r
eg_bsn_monitor
.mem
{
datum baseAddress
{
value = "
393216
";
value = "
512
";
type = "long";
}
}
element r
eg_diag_bg
.mem
element r
om_system_info
.mem
{
datum _lockedAddress
{
value = "1";
type = "boolean";
}
datum baseAddress
{
value = "
6
40";
value = "40
96
";
type = "long";
}
}
element r
eg_bsn_monitor
.mem
element r
am_ss_ss_wide
.mem
{
datum baseAddress
{
value = "38
4
";
value = "3
276
8";
type = "long";
}
}
element reg_
unb_sens
.mem
element reg_
wdi
.mem
{
datum _lockedAddress
{
value = "1";
type = "boolean";
}
datum baseAddress
{
value = "
60
8";
value = "
1228
8";
type = "long";
}
}
element ram_
ss_ss_wide
.mem
element ram_
diag_bg
.mem
{
datum baseAddress
{
value = "
3276
8";
value = "
52428
8";
type = "long";
}
}
element r
am
_diag_
bg
.mem
element r
eg
_diag_
data_buffer_im
.mem
{
datum baseAddress
{
value = "
52428
8";
value = "
12
8";
type = "long";
}
}
...
...
@@ -215,7 +215,7 @@
{
datum baseAddress
{
value = "
512
";
value = "
384
";
type = "long";
}
}
...
...
@@ -286,7 +286,7 @@
}
datum baseAddress
{
value = "
672
";
value = "
1056
";
type = "long";
}
}
...
...
@@ -378,11 +378,19 @@
type = "int";
}
}
element pio_wdi.s1
{
datum baseAddress
{
value = "1088";
type = "long";
}
}
element timer_0.s1
{
datum baseAddress
{
value = "
576
";
value = "
448
";
type = "long";
}
}
...
...
@@ -403,15 +411,7 @@
{
datum baseAddress
{
value = "688";
type = "long";
}
}
element pio_wdi.s1
{
datum baseAddress
{
value = "704";
value = "1072";
type = "long";
}
}
...
...
@@ -440,8 +440,8 @@
<parameter
name=
"maxAdditionalLatency"
value=
"0"
/>
<parameter
name=
"projectName"
value=
"unb1_reorder.qpf"
/>
<parameter
name=
"sopcBorderPoints"
value=
"true"
/>
<parameter
name=
"systemHash"
value=
"-4
2915926488
"
/>
<parameter
name=
"timeStamp"
value=
"1427
107370112
"
/>
<parameter
name=
"systemHash"
value=
"-4
4271126507
"
/>
<parameter
name=
"timeStamp"
value=
"1427
205044735
"
/>
<parameter
name=
"useTestBenchNamingPattern"
value=
"false"
/>
<module
kind=
"clock_source"
version=
"11.1"
enabled=
"1"
name=
"clk_0"
>
<parameter
name=
"clockFrequency"
value=
"25000000"
/>
...
...
@@ -542,7 +542,7 @@
<parameter
name=
"dcache_numTCDM"
value=
"_0"
/>
<parameter
name=
"dcache_lineSize"
value=
"_32"
/>
<parameter
name=
"dcache_bursts"
value=
"false"
/>
<parameter
name=
"dataSlaveMapParam"
>
<![CDATA[<address-map><slave name='pio_system_info.mem' start='0x0' end='0x80' /><slave name='reg_diag_data_buffer_im.mem' start='0x80' end='0x100' /><slave name='reg_diag_data_buffer_re.mem' start='0x100' end='0x180' /><slave name='
reg_bsn_monitor.mem
' start='0x180' end='0x
20
0' /><slave name='
avs_eth_0.mms_reg
' start='0x
20
0' end='0x
24
0' /><slave name='
timer_0.s1
' start='0x
24
0' end='0x2
6
0' /><slave name='reg_
unb_sens
.mem' start='0x2
6
0' end='0x
28
0' /><slave name='reg_diag_bg.mem' start='0x
28
0' end='0x2
A
0' /><slave name='altpll_0.pll_slave' start='0x2
A
0' end='0x
2B
0' /><slave name='pio_debug_wave.s1' start='0x
2B
0' end='0x
2C
0' /><slave name='pio_wdi.s1' start='0x
2C
0' end='0x
2D
0' /><slave name='jtag_uart_0.avalon_jtag_slave' start='0x
2D
0' end='0x
2D
8' /><slave name='pio_pps.mem' start='0x
2D
8' end='0x
2E
0' /><slave name='rom_system_info.mem' start='0x1000' end='0x2000' /><slave name='avs_eth_0.mms_tse' start='0x2000' end='0x3000' /><slave name='reg_wdi.mem' start='0x3000' end='0x3008' /><slave name='cpu_0.jtag_debug_module' start='0x3800' end='0x4000' /><slave name='avs_eth_0.mms_ram' start='0x4000' end='0x5000' /><slave name='ram_ss_ss_wide.mem' start='0x8000' end='0x10000' /><slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' /><slave name='ram_diag_data_buffer_im.mem' start='0x40000' end='0x60000' /><slave name='ram_diag_data_buffer_re.mem' start='0x60000' end='0x80000' /><slave name='ram_diag_bg.mem' start='0x80000' end='0xA0000' /></address-map>]]>
</parameter>
<parameter
name=
"dataSlaveMapParam"
>
<![CDATA[<address-map><slave name='pio_system_info.mem' start='0x0' end='0x80' /><slave name='reg_diag_data_buffer_im.mem' start='0x80' end='0x100' /><slave name='reg_diag_data_buffer_re.mem' start='0x100' end='0x180' /><slave name='
avs_eth_0.mms_reg
' start='0x180' end='0x
1C
0' /><slave name='
timer_0.s1
' start='0x
1C
0' end='0x
1E
0' /><slave name='
reg_unb_sens.mem
' start='0x
1E
0' end='0x2
0
0' /><slave name='reg_
bsn_monitor
.mem' start='0x2
0
0' end='0x
40
0' /><slave name='reg_diag_bg.mem' start='0x
40
0' end='0x
4
20' /><slave name='altpll_0.pll_slave' start='0x
4
20' end='0x
43
0' /><slave name='pio_debug_wave.s1' start='0x
43
0' end='0x
44
0' /><slave name='pio_wdi.s1' start='0x
44
0' end='0x
45
0' /><slave name='jtag_uart_0.avalon_jtag_slave' start='0x
45
0' end='0x
45
8' /><slave name='pio_pps.mem' start='0x
45
8' end='0x
46
0' /><slave name='rom_system_info.mem' start='0x1000' end='0x2000' /><slave name='avs_eth_0.mms_tse' start='0x2000' end='0x3000' /><slave name='reg_wdi.mem' start='0x3000' end='0x3008' /><slave name='cpu_0.jtag_debug_module' start='0x3800' end='0x4000' /><slave name='avs_eth_0.mms_ram' start='0x4000' end='0x5000' /><slave name='ram_ss_ss_wide.mem' start='0x8000' end='0x10000' /><slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' /><slave name='ram_diag_data_buffer_im.mem' start='0x40000' end='0x60000' /><slave name='ram_diag_data_buffer_re.mem' start='0x60000' end='0x80000' /><slave name='ram_diag_bg.mem' start='0x80000' end='0xA0000' /></address-map>]]>
</parameter>
<parameter
name=
"dataAddrWidth"
value=
"20"
/>
<parameter
name=
"customInstSlavesSystemInfo"
value=
"<info/>"
/>
<parameter
name=
"cpuReset"
value=
"false"
/>
...
...
@@ -882,7 +882,7 @@ q]]></parameter>
<parameter
name=
"AUTO_SYSTEM_CLOCK_RATE"
value=
"50000000"
/>
</module>
<module
kind=
"avs_common_mm"
version=
"1.0"
enabled=
"1"
name=
"reg_bsn_monitor"
>
<parameter
name=
"g_adr_w"
value=
"
5
"
/>
<parameter
name=
"g_adr_w"
value=
"
7
"
/>
<parameter
name=
"g_dat_w"
value=
"32"
/>
<parameter
name=
"AUTO_SYSTEM_CLOCK_RATE"
value=
"50000000"
/>
</module>
...
...
@@ -927,7 +927,7 @@ q]]></parameter>
start=
"cpu_0.data_master"
end=
"jtag_uart_0.avalon_jtag_slave"
>
<parameter
name=
"arbitrationPriority"
value=
"1"
/>
<parameter
name=
"baseAddress"
value=
"0x0
2d
0"
/>
<parameter
name=
"baseAddress"
value=
"0x0
45
0"
/>
</connection>
<connection
kind=
"interrupt"
...
...
@@ -942,7 +942,7 @@ q]]></parameter>
start=
"cpu_0.data_master"
end=
"altpll_0.pll_slave"
>
<parameter
name=
"arbitrationPriority"
value=
"1"
/>
<parameter
name=
"baseAddress"
value=
"0x02
a
0"
/>
<parameter
name=
"baseAddress"
value=
"0x0
4
20"
/>
</connection>
<connection
kind=
"clock"
version=
"11.1"
start=
"altpll_0.c0"
end=
"cpu_0.clk"
/>
<connection
...
...
@@ -967,7 +967,7 @@ q]]></parameter>
start=
"cpu_0.data_master"
end=
"pio_debug_wave.s1"
>
<parameter
name=
"arbitrationPriority"
value=
"1"
/>
<parameter
name=
"baseAddress"
value=
"0x0
2b
0"
/>
<parameter
name=
"baseAddress"
value=
"0x0
43
0"
/>
</connection>
<connection
kind=
"clock"
version=
"11.1"
start=
"altpll_0.c0"
end=
"pio_wdi.clk"
/>
<connection
...
...
@@ -976,7 +976,7 @@ q]]></parameter>
start=
"cpu_0.data_master"
end=
"pio_wdi.s1"
>
<parameter
name=
"arbitrationPriority"
value=
"1"
/>
<parameter
name=
"baseAddress"
value=
"0x0
2c
0"
/>
<parameter
name=
"baseAddress"
value=
"0x0
44
0"
/>
</connection>
<connection
kind=
"clock"
version=
"11.1"
start=
"altpll_0.c0"
end=
"timer_0.clk"
/>
<connection
...
...
@@ -985,7 +985,7 @@ q]]></parameter>
start=
"cpu_0.data_master"
end=
"timer_0.s1"
>
<parameter
name=
"arbitrationPriority"
value=
"1"
/>
<parameter
name=
"baseAddress"
value=
"0x0
24
0"
/>
<parameter
name=
"baseAddress"
value=
"0x0
1c
0"
/>
</connection>
<connection
kind=
"interrupt"
version=
"11.1"
start=
"cpu_0.d_irq"
end=
"timer_0.irq"
>
<parameter
name=
"irqNumber"
value=
"1"
/>
...
...
@@ -1001,7 +1001,7 @@ q]]></parameter>
start=
"cpu_0.data_master"
end=
"reg_unb_sens.mem"
>
<parameter
name=
"arbitrationPriority"
value=
"1"
/>
<parameter
name=
"baseAddress"
value=
"0x0
26
0"
/>
<parameter
name=
"baseAddress"
value=
"0x0
1e
0"
/>
</connection>
<connection
kind=
"clock"
...
...
@@ -1036,7 +1036,7 @@ q]]></parameter>
start=
"cpu_0.data_master"
end=
"pio_pps.mem"
>
<parameter
name=
"arbitrationPriority"
value=
"1"
/>
<parameter
name=
"baseAddress"
value=
"0x0
2d
8"
/>
<parameter
name=
"baseAddress"
value=
"0x0
45
8"
/>
</connection>
<connection
kind=
"clock"
version=
"11.1"
start=
"altpll_0.c0"
end=
"reg_wdi.system"
/>
<connection
...
...
@@ -1058,7 +1058,7 @@ q]]></parameter>
start=
"cpu_0.data_master"
end=
"reg_diag_bg.mem"
>
<parameter
name=
"arbitrationPriority"
value=
"1"
/>
<parameter
name=
"baseAddress"
value=
"0x0
28
0"
/>
<parameter
name=
"baseAddress"
value=
"0x0
40
0"
/>
</connection>
<connection
kind=
"clock"
...
...
@@ -1149,7 +1149,7 @@ q]]></parameter>
start=
"cpu_0.data_master"
end=
"reg_bsn_monitor.mem"
>
<parameter
name=
"arbitrationPriority"
value=
"1"
/>
<parameter
name=
"baseAddress"
value=
"0x0
18
0"
/>
<parameter
name=
"baseAddress"
value=
"0x0
20
0"
/>
</connection>
<connection
kind=
"clock"
version=
"11.1"
start=
"altpll_0.c0"
end=
"avs_eth_0.mm"
/>
<connection
...
...
@@ -1166,7 +1166,7 @@ q]]></parameter>
start=
"cpu_0.data_master"
end=
"avs_eth_0.mms_reg"
>
<parameter
name=
"arbitrationPriority"
value=
"1"
/>
<parameter
name=
"baseAddress"
value=
"0x0
20
0"
/>
<parameter
name=
"baseAddress"
value=
"0x0
18
0"
/>
</connection>
<connection
kind=
"avalon"
...
...
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